Re: [PATCH] arm64: renesas: r8a7795: tidyup audma definition order

Hi Simon I want to know current status of this patch > From: Kuninori Morimoto > > Current r8a7795.dtsi defines audma -> ipmmu -> dma order. > Because of this order, dma can connect to ipmmu, but > audma can't connect to it. > This patch moves audma order as

Re: [PATCH 1/2] net: phy: leds: Clear phy_num_led_triggers on failure to avoid crash

On 01/24/2017 07:41 AM, Geert Uytterhoeven wrote: > phy_attach_direct() ignores errors returned by > phy_led_triggers_register(). I think that's OK, as LED triggers can be > considered a non-critical feature. > > However, this causes problems later: > - phy_led_trigger_change_speed() will

RE: [PATCH v3 2/2] clocksource: Add renesas-ostm timer driver

Hi Daniel, On Tuesday, January 24, 2017, Daniel Lezcano wrote: > > > > +early_platform_init("earlytimer", _timer); > > > > +subsys_initcall(ostm_init); module_exit(ostm_exit); > > > > + > > > > +MODULE_AUTHOR("Chris Brandt"); > > > > +MODULE_DESCRIPTION("Renesas OSTM Timer Driver"); > > > >

Re: [PATCH 2/2] net: phy: leds: Fix truncated LED trigger names

> diff --git a/include/linux/phy.h b/include/linux/phy.h > index 5c9d2529685fe215..f6ab919528ab3627 100644 > --- a/include/linux/phy.h > +++ b/include/linux/phy.h > @@ -25,7 +25,6 @@ > #include > #include > #include > -#include > > #include > > @@ -339,6 +338,8 @@ struct

[PATCH V8 1/2] iio: adc: Add Renesas GyroADC bindings

Add DT bindings for the Renesas RCar GyroADC block. This block is a simple 4/8-channel ADC which samples 12/15/24 bits of data every cycle from all channels. Signed-off-by: Marek Vasut Cc: Geert Uytterhoeven Cc: Simon Horman

[PATCH V8 2/2] iio: adc: Add Renesas GyroADC driver

Add IIO driver for the Renesas RCar GyroADC block. This block is a simple 4/8-channel ADC which samples 12/15/24 bits of data every cycle from all channels. Signed-off-by: Marek Vasut Cc: Geert Uytterhoeven Cc: Simon Horman

[PATCH/RFC v3 net] ravb: unmap descriptors when freeing rings

From: Kazuya Mizuguchi "swiotlb buffer is full" errors occur after repeated initialisation of a device - f.e. suspend/resume or ip link set up/down. This is because memory mapped using dma_map_single() in ravb_ring_format() and ravb_start_xmit() is not released.

Re: [PATCH 1/2] iio: adc: Add Renesas GyroADC bindings

Hi Marek, On Tue, Jan 24, 2017 at 5:39 PM, Marek Vasut wrote: > On 01/24/2017 08:30 AM, Geert Uytterhoeven wrote: >> On Tue, Jan 24, 2017 at 12:15 AM, Marek Vasut wrote: >>> What about this ? >>> >>> - compatible: Should be "renesas,-gyroadc",

Re: [PATCH 1/2] iio: adc: Add Renesas GyroADC bindings

On 01/24/2017 08:30 AM, Geert Uytterhoeven wrote: > Hi Marek, > > On Tue, Jan 24, 2017 at 12:15 AM, Marek Vasut wrote: >> On 01/23/2017 09:41 PM, Geert Uytterhoeven wrote: >>> On Mon, Jan 23, 2017 at 8:56 PM, Marek Vasut wrote: On 01/23/2017

RE: [PATCH] ARM: dts: r7s72100: add power-domains to mmcif

On Tuesday, January 24, 2017, Simon Horman wrote: > On Mon, Jan 23, 2017 at 04:12:16PM +0100, Geert Uytterhoeven wrote: > > On Mon, Jan 23, 2017 at 3:13 PM, Chris Brandt > wrote: > > > Signed-off-by: Chris Brandt > > > > Reported-by: Geert

About DU DRM

Hello Laurent and all, I am tracking complete files of DU in my source tree linux 4.9 one by one .I know it is not an easy task to study completely but now it is really interesting for me.. first of all I am saying my ultimate goal here,I want to get track the whole route of image/video

RE: [RFC] Runtime PM on the RZ/A series is never going to work right

Hi Geert, On Tuesday, January 24, 2017, Geert Uytterhoeven wrote: > > From what I can tell, that makes the register space readable...but the > > IP block is not fully functional unless you delay a little. > > If you know the minimum delay needed, and it's not too long, it can be > added to the

Re: [PATCH] drivers: firmware: psci: Use __pa_symbol for cpu_resume

On Tue, Jan 24, 2017 at 03:33:51PM +, Mark Rutland wrote: > On Tue, Jan 24, 2017 at 04:30:19PM +0100, Geert Uytterhoeven wrote: > > If CONFIG_DEBUG_VIRTUAL=y, during s2ram: > > > > virt_to_phys used for non-linear address: ff80085db280 > > (cpu_resume+0x0/0x20) > > [

Re: [PATCH 3/3] sh_eth: stop using bare numbers for EESIPR values

On 01/23/2017 11:00 AM, Geert Uytterhoeven wrote: Now that we have almost all EESIPR bits declared (and those that are still not are most probably reserved anyway) we can at last replace the bare numbers used for 'sh_eth_cpu_data::eesipr_value' initializers with the bit names ORed

Re: [PATCH 1/3] sh_eth: rename EESIPR bits

Hello! On 01/23/2017 10:39 AM, Geert Uytterhoeven wrote: Since the commit b0ca2a21f769 ("sh_eth: Add support of SH7763 to sh_eth") the *enum* declaring the EESIPR bits (interrupt mask) went out of sync with the *enum* declaring the EESR bits (interrupt status) WRT bit naming and

Re: [PATCH 2/3] sh_eth: add missing EESIPR bits

On 01/23/2017 10:41 AM, Geert Uytterhoeven wrote: Renesas SH77{34|63} manuals describe more EESIPR bits than the current driver. Declare the new bits with the end goal of using the bit names instead of the bare numbers for the 'sh_eth_cpu_data::eesipr_value' initializers... Signed-off-by:

[PATCH 0/2] net: phy: leds: Fix truncated LED trigger names and crashes

Hi David, I started seeing crashes during s2ram and poweroff on all my ARM boards, like: Unable to handle kernel NULL pointer dereference at virtual address ... [] (__list_del_entry_valid) from [] (led_trigger_unregister+0x34/0xcc) [] (led_trigger_unregister)

[PATCH 2/2] net: phy: leds: Fix truncated LED trigger names

Commit 4567d686f5c6d955 ("phy: increase size of MII_BUS_ID_SIZE and bus_id") increased the size of MII bus IDs, but forgot to update the private definition in . This may cause: 1. Truncation of LED trigger names, 2. Duplicate LED trigger names, 3. Failures registering LED triggers, 4.

[PATCH 1/2] net: phy: leds: Clear phy_num_led_triggers on failure to avoid crash

phy_attach_direct() ignores errors returned by phy_led_triggers_register(). I think that's OK, as LED triggers can be considered a non-critical feature. However, this causes problems later: - phy_led_trigger_change_speed() will access the array phy_device.phy_led_triggers, which has been

Re: [PATCH] drivers: firmware: psci: Use __pa_symbol for cpu_resume

On Tue, Jan 24, 2017 at 04:30:19PM +0100, Geert Uytterhoeven wrote: > If CONFIG_DEBUG_VIRTUAL=y, during s2ram: > > virt_to_phys used for non-linear address: ff80085db280 > (cpu_resume+0x0/0x20) > [ cut here ] > WARNING: CPU: 0 PID: 1628 at

[PATCH] drivers: firmware: psci: Use __pa_symbol for cpu_resume

If CONFIG_DEBUG_VIRTUAL=y, during s2ram: virt_to_phys used for non-linear address: ff80085db280 (cpu_resume+0x0/0x20) [ cut here ] WARNING: CPU: 0 PID: 1628 at arch/arm64/mm/physaddr.c:14 __virt_to_phys+0x28/0x60 ... [] __virt_to_phys+0x28/0x60

RE: [PATCH v3 2/2] clocksource: Add renesas-ostm timer driver

Hi Daniel, On Tuesday, January 24, 2017, Daniel Lezcano wrote: > > > > +early_platform_init("earlytimer", _timer); > > > > +subsys_initcall(ostm_init); module_exit(ostm_exit); > > > > + > > > > +MODULE_AUTHOR("Chris Brandt"); > > > > +MODULE_DESCRIPTION("Renesas OSTM Timer Driver"); > > > >

Re: [RFC] Runtime PM on the RZ/A series is never going to work right

Hi Chris, On Tue, Jan 24, 2017 at 3:20 PM, Chris Brandt wrote: > On Tuesday, January 24, 2017, Geert Uytterhoeven wrote: >> > Therefore, before I start firing off patches to remove runtime PM for >> RZ/A, does anyone have an opinion one way of the other >> >> Please

Re: [PATCH v3 2/2] clocksource: Add renesas-ostm timer driver

On Tue, Jan 24, 2017 at 04:45:47AM +, Chris Brandt wrote: Hi Chris, [ ... ] > > > + bool "Renesas OSTM timer driver" if COMPILE_TEST > > > + depends on GENERIC_CLOCKEVENTS > > > + select CLKSRC_MMIO > > > + default SYS_SUPPORTS_RENESAS_OSTM > > > > - default SYS_SUPPORTS_RENESAS_OSTM > >

RE: [RFC] Runtime PM on the RZ/A series is never going to work right

Hi Geert, On Tuesday, January 24, 2017, Geert Uytterhoeven wrote: > > Therefore, before I start firing off patches to remove runtime PM for > RZ/A, does anyone have an opinion one way of the other > > Please have a look at Section 55.3.5 ("Module Standby Function"), which I > had never read

Re: [PATCH] arm64: Use __pa_symbol for empty_zero_page

On Tue, Jan 24, 2017 at 12:43:40PM +0100, Geert Uytterhoeven wrote: > If CONFIG_DEBUG_VIRTUAL=y and CONFIG_ARM64_SW_TTBR0_PAN=y: > > virt_to_phys used for non-linear address: ff8008cc > (empty_zero_page+0x0/0x1000) > WARNING: CPU: 0 PID: 0 at arch/arm64/mm/physaddr.c:14 >

Re: [PATCH] ARM: dts: r7s72100: add power-domains to mmcif

On Mon, Jan 23, 2017 at 04:12:16PM +0100, Geert Uytterhoeven wrote: > On Mon, Jan 23, 2017 at 3:13 PM, Chris Brandt > wrote: > > Signed-off-by: Chris Brandt > > Reported-by: Geert Uytterhoeven > Acked-by: Geert

Re: [PATCH v3 0/3] ARM: dts: add ostm support for r7s72100

On Mon, Jan 23, 2017 at 08:55:17AM -0500, Chris Brandt wrote: > This patch set enables the use of the newly created driver > renesas-ostm.c for the r7s72100 SoC. Thanks Chris, I have queued this series up for v4.11. It should appear in net-next in linux-next day or so.

[PATCH] arm64: Use __pa_symbol for empty_zero_page

If CONFIG_DEBUG_VIRTUAL=y and CONFIG_ARM64_SW_TTBR0_PAN=y: virt_to_phys used for non-linear address: ff8008cc (empty_zero_page+0x0/0x1000) WARNING: CPU: 0 PID: 0 at arch/arm64/mm/physaddr.c:14 __virt_to_phys+0x28/0x60 ... [] __virt_to_phys+0x28/0x60 []

Re: [Lager(H2)-V4.10-rc2]: QSPI-FLASH: Warning message happened when writing a data file to SPI-FLASH

Hi Cyrille, On Tue, Jan 24, 2017 at 11:11 AM, Cyrille Pitchen wrote: > Le 24/01/2017 à 08:43, Geert Uytterhoeven a écrit : >> CC linux-mtd >> >> On Tue, Jan 24, 2017 at 7:34 AM, DongCV wrote: >>> I've tested the linux v4.10-rc2 for Gen2 Lager and

Re: [PATCH/RFC 2/2] iommu/ipmmu-vmsa: Opt-in slave devices based on ES version

Hi Geert, On Mon, Jan 23, 2017 at 9:50 PM, Geert Uytterhoeven wrote: > Hi Magnus, > > On Mon, Jan 23, 2017 at 1:12 PM, Magnus Damm wrote: >> From: Magnus Damm >> >> Match on r8a7795 ES2 and enable a certain DMA

Re: [PATCH v2 2/7] serial: sh-sci: consider DR (data ready) bit adequately

On Mon, Jan 23, 2017 at 5:04 PM, Ulrich Hecht wrote: > To allow operation with a higher RX FIFO interrupt threshold in PIO > mode, it is necessary to consider the DR bit ("FIFO not full, but no > data received for 1.5 frames") as an indicator that data can be read.

Re: [PATCH v2 4/7] serial: sh-sci: increase RX FIFO trigger defaults for (H)SCIF

On Mon, Jan 23, 2017 at 5:04 PM, Ulrich Hecht wrote: > Signed-off-by: Ulrich Hecht Reviewed-by: Geert Uytterhoeven > @@ -2736,15 +2742,19 @@ static int sci_init_single(struct platform_device > *dev, >

Re: [PATCH v2 6/7] serial: sh-sci: make RX FIFO parameters tunable via sysfs

On Mon, Jan 23, 2017 at 5:04 PM, Ulrich Hecht wrote: > Allows tuning of the RX FIFO fill threshold and timeout. (The latter is > only applicable to SCIFA and SCIFB). > > Signed-off-by: Ulrich Hecht Reviewed-by: Geert Uytterhoeven

RE: [PATCH/RFC 1/2] arm64: mm: Silently allow devices lacking IOMMU group

Hi Robin, >> Consider failure of iommu_get_domain_for_dev() as non-critical and >> get rid of the warning printout. This allows IOMMU properties to be >> included in the DTB even though the kernel is configured with >> CONFIG_IOMMU_API=n or in case a particular IOMMU driver refuses to >> enable

Re: [PATCH v2 7/7] arm64: dts: r8a7796: salvator-x: add SCIF1 (DEBUG1)

Hi Uli, On Mon, Jan 23, 2017 at 5:04 PM, Ulrich Hecht wrote: > Enables the SCIF hooked up to the DEBUG1 connector. > > Signed-off-by: Ulrich Hecht Reviewed-by: Geert Uytterhoeven > --- >