Re: [PATCH v3] media: platform: rcar_imr: add IMR-LSX3 support

On Wed, Jun 28, 2017 at 10:56:23PM +0300, Sergei Shtylyov wrote: > Add support for the image renderer light SRAM extended 3 (IMR-LSX3) found > only in the R-Car V2H (R8A7792) SoC. It differs from IMR-LX4 in that it > supports only planar video formats but can use the video capture data for > the

Re: [PATCH 7/8] clk: vc5: Add bindings for IDT VersaClock 5P49V6901

Hi Marek, On Thu, Jun 29, 2017 at 5:49 PM, Marek Vasut wrote: > On 06/29/2017 01:38 PM, Geert Uytterhoeven wrote: >> On Thu, Jun 29, 2017 at 12:18 PM, Marek Vasut wrote: >>> From: Marek Vasut >>> >>> IDT VersaClock 6

Re: [PATCH/RFC v2 0/5] clk: renesas: rcar-gen3: Restore clocks during resume

Hi Niklas, On Thu, Jun 29, 2017 at 5:18 PM, Niklas Söderlund wrote: > On 2017-06-29 15:25:15 +0200, Geert Uytterhoeven wrote: >> During PSCI system suspend, R-Car Gen3 SoCs are powered down, and their >> clock register state is lost. Note that as the boot loader

RE: [bug report] mmc: tmio-mmc: add support for 32bit data port

Hello Dan, On Thursday, June 29, 2017, Dan Carpenter wrote: > > Hello Chris Brandt, > > The patch 8185e51f358a: "mmc: tmio-mmc: add support for 32bit data > port" from Sep 12, 2016, leads to the following static checker > warning: > > drivers/mmc/host/tmio_mmc_core.c:415

[PATCH v1.1 2/2] drm: rcar-du: Repair vblank for DRM page flips using the VSP1

A recent change to the frame completion handling has changed the order in which the vblank timestamps are updated. To fix this requires handling the vblank events on the frame end event which comes from the VSP1 driver on Gen3 instead. Prevent the CRTC IRQ from being enabled on Gen3 hardware and

Re: [PATCH 7/8] clk: vc5: Add bindings for IDT VersaClock 5P49V6901

On 06/29/2017 01:38 PM, Geert Uytterhoeven wrote: > Hi Marek, > > On Thu, Jun 29, 2017 at 12:18 PM, Marek Vasut wrote: >> From: Marek Vasut >> >> IDT VersaClock 6 5P49V6901 has 4 clock outputs, 4 fractional dividers. >> Input clock source

Re: [PATCH 8/8] clk: vc5: Add support for IDT VersaClock 5P49V6901

On 06/29/2017 01:41 PM, Geert Uytterhoeven wrote: > Hi Marek, > > On Thu, Jun 29, 2017 at 12:18 PM, Marek Vasut wrote: >> From: Marek Vasut >> >> Update IDT VersaClock 6 driver to support 5P49V6901. This chip has > > Update the IDT

Re: [PATCH/RFC v2 0/5] clk: renesas: rcar-gen3: Restore clocks during resume

Hi Geert, Thanks for your hard work! On 2017-06-29 15:25:15 +0200, Geert Uytterhoeven wrote: > Hi all, > > During PSCI system suspend, R-Car Gen3 SoCs are powered down, and their > clock register state is lost. Note that as the boot loader skips most > initialization after resume, clock

Re: [PATCH v1 2/2] drm: rcar-du: Repair vblank for DRM page flips using the VSP1

> @@ -658,10 +660,14 @@ static irqreturn_t rcar_du_crtc_irq(int irq, void *arg) > rcar_du_crtc_write(rcrtc, DSRCR, status & DSRCR_MASK); > > if (status & DSSR_FRM) { > - drm_crtc_handle_vblank(>crtc); > - > - if (rcdu->info->gen < 3) > + /* > +

[PATCH v1 2/2] drm: rcar-du: Repair vblank for DRM page flips using the VSP1

A recent change to the frame completion handling has changed the order in which the vblank timestamps are updated. To fix this requires handling the vblank events on the frame end event which comes from the VSP1 driver on Gen3 instead. Prevent the CRTC IRQ from being enabled on Gen3 hardware and

[PATCH v1 0/2] drm: rcar-du: Repair vblank event handling

The recent changes to the rcar-du driver to fix a race condition inadvertently change the order of which vblanks are reported. Correct this by handling vblank events in the same completion handler. This removes the need for the IRQ handler on DU instances which are sourced by a VSP1. For other

[PATCH v1 1/2] drm: rcar-du: Enable the FRM interrupt for vblank

The rcar_du_crtc_{enable,disable}_vblank functions are configured to control the VBE interrupt event. The implementation of interlaced support in the rcar-du changes the required behavior such that vblanks are handled on frame end events, but does not update the enable register to reflect this.

[PATCH/RFC v2 0/5] clk: renesas: rcar-gen3: Restore clocks during resume

Hi all, During PSCI system suspend, R-Car Gen3 SoCs are powered down, and their clock register state is lost. Note that as the boot loader skips most initialization after resume, clock register state differs from the state encountered during normal system boot, too. Hence after s2ram,

[PATCH/RFC v2 5/5] clk: renesas: rcar-gen3: Restore R clock during resume

On R-Car Gen3 systems, PSCI system suspend powers down the SoC, losing clock configuration. Register a notifier to save/restore the RCKCR register during system suspend/resume. Signed-off-by: Geert Uytterhoeven --- v2: - New. --- drivers/clk/renesas/clk-div6.c |

[PATCH/RFC v2 2/5] clk: renesas: cpg-mssr: Add support to restore core clocks during resume

On R-Car Gen3 systems, PSCI system suspend powers down the SoC, possibly losing clock configuration. Hence add a notifier chain that can be used by core clocks to save/restore clock state during system suspend/resume. The implementation of the actual clock state save/restore operations is

[PATCH/RFC v2 3/5] clk: renesas: div6: Restore clock state during resume

On R-Car Gen3 systems, PSCI system suspend powers down the SoC, losing clock configuration. Register an (optional) notifier to restore the DIV6 clock state during system resume. As DIV6 clocks can be picky w.r.t. modifying multiple register fields at once, restore is not implemented by blindly

[PATCH/RFC v2 1/5] clk: renesas: cpg-mssr: Restore module clocks during resume

During PSCI system suspend, R-Car Gen3 SoCs are powered down, and their clock register state is lost. Note that as the boot loader skips most initialization after system resume, clock register state differs from the state encountered during normal system boot, too. Hence after s2ram, some

[PATCH] clk: renesas: div6: Document fields used for parent selection

Add the missing documentation for the fields in struct div6_clock related to parent selection for DIV6 clocks with selectable parents, as found in R/SH-Mobile SoCs. Fixes: c6d67fb037f4eaaf ("clk: shmobile: div6: support selectable-input clocks") Signed-off-by: Geert Uytterhoeven

[PATCH/RFC v2 4/5] clk: renesas: rcar-gen3: Restore SDHI clocks during resume

On R-Car Gen3 systems, PSCI system suspend powers down the SoC, losing clock configuration. Register a notifier to save/restore SDHI clock registers during system suspend/resume. This is implemented using the cpg_simple_notifier abstraction, which can be reused for others clocks that just need

Re: Clocks used by another OS/CPU

Hi Dirk, On Thu, Jun 29, 2017 at 3:18 PM, Dirk Behme wrote: > On 29.06.2017 13:18, Geert Uytterhoeven wrote: >> On Thu, Jun 29, 2017 at 12:28 PM, Dirk Behme >> wrote: >>> On 29.06.2017 11:27, Geert Uytterhoeven wrote: TL;DR: Clocks may be

Re: Clocks used by another OS/CPU

On 29.06.2017 13:18, Geert Uytterhoeven wrote: Hi Dirk, On Thu, Jun 29, 2017 at 12:28 PM, Dirk Behme wrote: On 29.06.2017 11:27, Geert Uytterhoeven wrote: CC clock, ARM, DT, PM people TL;DR: Clocks may be in use by another CPU not running Linux, while Linux disables

Re: [git pull] pinctrl: sh-pfc: Updates for v4.13 (take two)

Hi Linus, On Thu, Jun 29, 2017 at 3:07 PM, Linus Walleij wrote: > On Wed, Jun 28, 2017 at 7:10 PM, Geert Uytterhoeven > wrote: >> The following changes since commit c8bac70f079bb3ecaf9a716f141f3d85cef27231: >> >> pinctrl: sh-pfc: r8a7794: Add

Re: [git pull] pinctrl: sh-pfc: Updates for v4.13 (take two)

On Wed, Jun 28, 2017 at 7:10 PM, Geert Uytterhoeven wrote: > Hi Linus, > > The following changes since commit c8bac70f079bb3ecaf9a716f141f3d85cef27231: > > pinctrl: sh-pfc: r8a7794: Add R8A7745 support (2017-05-16 13:53:15 +0200) > > are available in the git

Re: Clocks used by another OS/CPU

On 29.06.2017 14:45, Geert Uytterhoeven wrote: Hi Dirk, On Thu, Jun 29, 2017 at 2:07 PM, Dirk Behme wrote: On 29.06.2017 13:56, Geert Uytterhoeven wrote: On Thu, Jun 29, 2017 at 11:27 AM, Geert Uytterhoeven wrote: CC clock, ARM, DT, PM people

Re: Clocks used by another OS/CPU

Hi Dirk, On Thu, Jun 29, 2017 at 2:07 PM, Dirk Behme wrote: > On 29.06.2017 13:56, Geert Uytterhoeven wrote: >> On Thu, Jun 29, 2017 at 11:27 AM, Geert Uytterhoeven >> wrote: >>> CC clock, ARM, DT, PM people >>> >>> TL;DR: Clocks may be in use by

Re: [PATCH v2] pinctrl: generic: Add output-enable property

On Thu, Jun 22, 2017 at 12:00 PM, Jacopo Mondi wrote: > Add output-enable generic pin configuration property. > This properties allows enabling/disabling pin's output capabilities > without actually driving any value on the line. > > --- > v1->v2: > - Expand the

Re: [PATCH v2] gpio: rcar: Add R8A7743 (RZ/G1M) support

On Wed, Jun 21, 2017 at 4:27 PM, Biju Das wrote: > Renesas RZ/G1M (R8A7743) SoC GPIO blocks are identical to the R-Car Gen2 > family. Add support for its GPIO controllers. > > Signed-off-by: Biju Das > Reviewed-by: Chris Paterson

Re: [PATCH v7 2/2] media: rcar-csi2: add Renesas R-Car MIPI CSI-2 receiver driver

Hi Hans, Thanks for your feedback. On 2017-06-19 13:44:22 +0200, Hans Verkuil wrote: > On 06/12/2017 04:48 PM, Niklas Söderlund wrote: > > Hi Hans, > > > > Thanks for your comments. > > > > On 2017-05-29 13:16:23 +0200, Hans Verkuil wrote: > > > On 05/24/2017 02:13 AM, Niklas Söderlund wrote:

Re: Clocks used by another OS/CPU

On 29.06.2017 13:56, Geert Uytterhoeven wrote: Hi Dirk, On Thu, Jun 29, 2017 at 11:27 AM, Geert Uytterhoeven wrote: CC clock, ARM, DT, PM people TL;DR: Clocks may be in use by another CPU not running Linux, while Linux disables them as being unused. Of course this is

Re: Clocks used by another OS/CPU (was: Re: [RFC PATCH] clk: renesas: cpg-mssr: Add interface for critical core clocks)

Hi Dirk, On Thu, Jun 29, 2017 at 11:27 AM, Geert Uytterhoeven wrote: > CC clock, ARM, DT, PM people > > TL;DR: Clocks may be in use by another CPU not running Linux, while Linux > disables them as being unused. > Of course this is not limited to clocks, but also to e.g. PM

Re: [PATCH 8/8] clk: vc5: Add support for IDT VersaClock 5P49V6901

Hi Marek, On Thu, Jun 29, 2017 at 12:18 PM, Marek Vasut wrote: > From: Marek Vasut > > Update IDT VersaClock 6 driver to support 5P49V6901. This chip has Update the IDT VersaClock5 driver to support the VersaClock6 5P49V6901? > two clock

Re: [PATCH 1/3] drm: rcar-du: use of_graph_get_remote_endpoint()

Hi Laurent, On Thu, Jun 29, 2017 at 1:26 PM, Laurent Pinchart wrote: > On Thursday 29 Jun 2017 13:22:14 Geert Uytterhoeven wrote: >> On Thu, Jun 29, 2017 at 12:44 PM, Laurent Pinchart wrote: >> > On Wednesday 28 Jun 2017 00:32:17 Kuninori Morimoto wrote: >> >>

Re: [PATCH 1/3] drm: rcar-du: use of_graph_get_remote_endpoint()

Hi Geert, On Thursday 29 Jun 2017 13:22:14 Geert Uytterhoeven wrote: > On Thu, Jun 29, 2017 at 12:44 PM, Laurent Pinchart wrote: > > On Wednesday 28 Jun 2017 00:32:17 Kuninori Morimoto wrote: > >> From: Kuninori Morimoto > >> > >> Now, we can use

Re: Clocks used by another OS/CPU (was: Re: [RFC PATCH] clk: renesas: cpg-mssr: Add interface for critical core clocks)

Hi Dirk, On Thu, Jun 29, 2017 at 12:28 PM, Dirk Behme wrote: > On 29.06.2017 11:27, Geert Uytterhoeven wrote: >> CC clock, ARM, DT, PM people >> >> TL;DR: Clocks may be in use by another CPU not running Linux, while Linux >> disables them as being unused. >> >> On Mon,

Re: [PATCH 1/3] drm: rcar-du: use of_graph_get_remote_endpoint()

Hi Morimoto-san, Thank you for the patch. On Wednesday 28 Jun 2017 00:32:17 Kuninori Morimoto wrote: > From: Kuninori Morimoto > > Now, we can use of_graph_get_remote_endpoint(). Let's use it. > > Signed-off-by: Kuninori Morimoto

Re: Clocks used by another OS/CPU (was: Re: [RFC PATCH] clk: renesas: cpg-mssr: Add interface for critical core clocks)

On 29.06.2017 11:27, Geert Uytterhoeven wrote: Hi Dirk, CC clock, ARM, DT, PM people TL;DR: Clocks may be in use by another CPU not running Linux, while Linux disables them as being unused. On Mon, Jun 26, 2017 at 1:30 PM, Dirk Behme wrote: With commit 72f5df2c2bbb6

[PATCH 7/8] clk: vc5: Add bindings for IDT VersaClock 5P49V6901

From: Marek Vasut IDT VersaClock 6 5P49V6901 has 4 clock outputs, 4 fractional dividers. Input clock source can be taken from either external crystal or from external reference clock. Signed-off-by: Marek Vasut Cc: Alexey Firago

[PATCH 5/8] clk: vc5: Split clock input mux and predivider

From: Marek Vasut Split the VC5 clock input mux and the predivider to more accurately model the hardware and fix the previously incorrect assumption that both the OUT_SEL_I2CB and the PLL are fed from the predivider. It is in fact the clock input mux output which

[PATCH 6/8] clk: vc5: Add support for the input frequency doubler

From: Marek Vasut The VersaClock 6 has an input frequency doubler between the input clock mux and the predivider. Add new capability flag and support for this frequency doubler block into the driver. Signed-off-by: Marek Vasut Cc:

[PATCH 4/8] clk: vc5: Configure the output buffer input mux on prepare

From: Marek Vasut The output buffer input mux can be configured in either of three states -- disabled, input from FOD, input from previous output. Once the .prepare() callback of the output buffer is called, the output buffer input mux must be set to either input

[PATCH 8/8] clk: vc5: Add support for IDT VersaClock 5P49V6901

From: Marek Vasut Update IDT VersaClock 6 driver to support 5P49V6901. This chip has two clock inputs (external XTAL or external CLKIN), four fractional dividers (FODs) and five clock outputs (four universal clock outputs and one reference clock output at

[PATCH 3/8] clk: vc5: Do not warn about disabled output buffer input muxes

From: Marek Vasut The output buffer input mux can be configured in either of three states -- disabled, input from FOD, input from previous output. If the output buffer input mux is set to disabled, the code in vc5_clk_out_get_parent() would consider this an invalid

[PATCH 2/8] clk: vc5: Fix trivial typo

From: Marek Vasut Fix trivial typo in vc5_clk_out_unprepare() , s/Enable/Disable/ . Signed-off-by: Marek Vasut Cc: Stephen Boyd Cc: Alexey Firago Cc: Michael Turquette

[PATCH 1/8] clk: vc5: Prevent division by zero on unconfigured outputs

From: Marek Vasut In case the initial values of the FOD registers are not configured in the OTP or by the bootloader, it is possible that the FOD registers will contain zeroes. The code in vc5_fod_recalc_rate() immediately feeds the FOD divider value obtained from

[PATCH v6.1 1/3] media: adv748x: Add adv7481, adv7482 bindings

From: Kieran Bingham Create device tree bindings documentation for the ADV748x. The ADV748x supports both the ADV7481 and ADV7482 chips which provide analogue decoding and HDMI receiving capabilities Signed-off-by: Kieran Bingham

Re: [PATCH v6 1/3] media: adv748x: Add adv7181, adv7182 bindings

Hi Kieran, Thank you for the patch. On Tuesday 27 Jun 2017 16:03:32 Kieran Bingham wrote: > From: Kieran Bingham > > Create device tree bindings documentation for the ADV748x. > The ADV748x supports both the ADV7481 and ADV7482 chips which > provide

Re: [PATCH v2 1/2] drm: rcar-du: Add a VSP channel index to the vsps DT property

Hi Rob, On Wednesday 28 Jun 2017 18:18:07 Rob Herring wrote: > On Mon, Jun 26, 2017 at 07:29:29PM +0300, Laurent Pinchart wrote: > > On some R-Car SoCs a single VSP can serve multiple DU channels through > > multiple LIF instances in the VSP. The current DT bindings don't support > > specifying

Re: [PATCH v6 1/3] media: adv748x: Add adv7181, adv7182 bindings

On 29/06/17 10:37, Geert Uytterhoeven wrote: > On Tue, Jun 27, 2017 at 5:03 PM, Kieran Bingham wrote: >> From: Kieran Bingham >> >> Create device tree bindings documentation for the ADV748x. >> The ADV748x supports both the ADV7481

Re: [PATCH v6 1/3] media: adv748x: Add adv7181, adv7182 bindings

On Tue, Jun 27, 2017 at 5:03 PM, Kieran Bingham wrote: > From: Kieran Bingham > > Create device tree bindings documentation for the ADV748x. > The ADV748x supports both the ADV7481 and ADV7482 chips which > provide analogue decoding

Clocks used by another OS/CPU (was: Re: [RFC PATCH] clk: renesas: cpg-mssr: Add interface for critical core clocks)

Hi Dirk, CC clock, ARM, DT, PM people TL;DR: Clocks may be in use by another CPU not running Linux, while Linux disables them as being unused. On Mon, Jun 26, 2017 at 1:30 PM, Dirk Behme wrote: > With commit 72f5df2c2bbb6 ("clk: renesas: cpg-mssr: Migrate to >