Re: [git pull] clk: renesas: Updates for v4.17

Quoting Geert Uytterhoeven (2018-03-02 02:17:52) > Hi Mike, Stephen, > > The following changes since commit 7928b2cbe55b2a410a0f5c1f154610059c57b1b2: > > Linux 4.16-rc1 (2018-02-11 15:04:29 -0800) > > are available in the git repository at: > >

[PATCH] arm64: dts: renesas: v3msk: add EtherAVB pins

Add the (previously omitted) EtherAVB pin data to the V3M Starter Kit board's device tree. Signed-off-by: Sergei Shtylyov <sergei.shtyl...@cogentembedded.com> --- The patch is against the 'renesas-devel-20180314-v4.16-rc5' tag of Simon's 'renesas.git repo. It depends on the R8A77970 PFC

[PATCH v2] arm64: dts: renesas: eagle: add EtherAVB pins

Add the (previously omitted) EtherAVB pin data to the Eagle board's device tree. Signed-off-by: Sergei Shtylyov <sergei.shtyl...@cogentembedded.com> --- The patch is against the 'renesas-devel-20180314-v4.16-rc5' tag of Simon's 'renesas.git repo. It depends on the R8A77970 PFC driver

Re: [PATCH v3 2/3] drm: bridge: Add thc63lvd1024 LVDS decoder driver

On 03/14/2018 09:04 PM, jacopo mondi wrote: >>> Add DRM bridge driver for Thine THC63LVD1024 LVDS to digital parallel >>> output decoder. >>> >>> Signed-off-by: Jacopo Mondi >> [...] >>> diff --git a/drivers/gpu/drm/bridge/thc63lvd1024.c >>>

Re: [PATCH v3 2/3] drm: bridge: Add thc63lvd1024 LVDS decoder driver

Hi Sergei, thanks for review On Wed, Mar 14, 2018 at 08:09:52PM +0300, Sergei Shtylyov wrote: > On 03/13/2018 05:30 PM, Jacopo Mondi wrote: > > > Add DRM bridge driver for Thine THC63LVD1024 LVDS to digital parallel > > output decoder. > > > > Signed-off-by: Jacopo Mondi

Re: [PATCH v3 2/3] drm: bridge: Add thc63lvd1024 LVDS decoder driver

On 03/13/2018 05:30 PM, Jacopo Mondi wrote: > Add DRM bridge driver for Thine THC63LVD1024 LVDS to digital parallel > output decoder. > > Signed-off-by: Jacopo Mondi [...] > diff --git a/drivers/gpu/drm/bridge/thc63lvd1024.c > b/drivers/gpu/drm/bridge/thc63lvd1024.c

Re: [PATCH 1/3] rcar-vin: remove duplicated check of state in irq handler

Hi Jacopo, On 2018-03-14 16:17:33 +0100, Jacopo Mondi wrote: > Hi Niklas, Kieran, > > On Tue, Mar 13, 2018 at 06:56:54PM +0100, Niklas Söderlund wrote: > > Hi Kieran, > > > > Thanks for your feedback. > > > > On 2018-03-13 17:42:25 +0100, Kieran Bingham wrote: > > > Hi Niklas, > > > > > > Thanks

Re: [PATCH/RFC 1/2] PM / wakeup: Add callback for wake-up change notification

On 03/14/2018 02:26 PM, Geert Uytterhoeven wrote: > Add a callback to inform a device that his wake-up setting has been s/his/its/. > changed. This allows a device to synchronize device configuration with > an external user action. > > E.g. on systems using a Rohm BD9571MWV PMIC and a

Re: [GIT PULL FOR renesas-drivers] vsp1/du/interlaced/v2

Hi Kieran, On Wed, Mar 14, 2018 at 4:46 PM, Kieran Bingham wrote: > Please consider including this release in renesas-drivers. > > -- > Regards > > Kieran > > The following changes since commit 397eb3811ec096d0ceefa1dbea2d0ae68feb0587: > > media: vsp1:

[GIT PULL FOR renesas-drivers] vsp1/du/interlaced/v2

Hi Geert, Please consider including this release in renesas-drivers. -- Regards Kieran The following changes since commit 397eb3811ec096d0ceefa1dbea2d0ae68feb0587: media: vsp1: Move video configuration to a cached dlb (2018-03-07 21:19:29 +) are available in the git repository at:

Re: [PATCH 1/3] rcar-vin: remove duplicated check of state in irq handler

Hi Niklas, Kieran, On Tue, Mar 13, 2018 at 06:56:54PM +0100, Niklas Söderlund wrote: > Hi Kieran, > > Thanks for your feedback. > > On 2018-03-13 17:42:25 +0100, Kieran Bingham wrote: > > Hi Niklas, > > > > Thanks for the patch series :) - I've been looking forward to seeing this > > one ! > > >

Re: [PATCH v2 2/3] arm64: dts: renesas: salvator-common: Configure PMIC for DDR Backup Power

Hello! On 03/14/2018 03:09 PM, Geert Uytterhoeven wrote: > On Salvator-X(S), all of the DDR0, DDR1, DDR0C, and DDR1C power rails > need to be kept powered when backup mode is enabled. Reflect this in > the "rohm,ddr-backup-power" property for the BD9571MWV PMIC node. > > The accessory power

Re: [PATCH] arm64: dts: renesas: v3msk: add SCIF0 pins

On Wed, Mar 14, 2018 at 02:14:27PM +0100, Geert Uytterhoeven wrote: > On Tue, Mar 13, 2018 at 8:26 PM, Sergei Shtylyov > wrote: > > Add the (previously omitted) SCIF0 pin data to the V3M Starter Kit board's > > device tree. > > > > Signed-off-by: Sergei

Re: [PATCH] pinctrl: sh-pfc: r8a77970: add EtherAVB pin groups

Hi Sergei, On Tue, Mar 13, 2018 at 8:54 PM, Sergei Shtylyov wrote: > Add the EtherAVB pin groups to the R8A77970 PFC driver. > > Signed-off-by: Sergei Shtylyov Thanks! Reviewed-by: Geert Uytterhoeven

RE: [PATCH v7] ARM: shmobile: Add watchdog support

Hello Simon, > Subject: Re: [PATCH v7] ARM: shmobile: Add watchdog support > > On Wed, Mar 14, 2018 at 11:13:53AM +, Fabrizio Castro wrote: > > On R-Car Gen2 and RZ/G1 platforms, we use the SBAR registers to make non > > boot CPUs run a routine designed to bring up SMP and deal with hot plug.

Re: [PATCH] arm64: dts: renesas: v3msk: add SCIF0 pins

On Tue, Mar 13, 2018 at 8:26 PM, Sergei Shtylyov wrote: > Add the (previously omitted) SCIF0 pin data to the V3M Starter Kit board's > device tree. > > Signed-off-by: Sergei Shtylyov Reviewed-by: Geert Uytterhoeven

Re: [PATCH v7] ARM: shmobile: Add watchdog support

On Wed, Mar 14, 2018 at 11:13:53AM +, Fabrizio Castro wrote: > On R-Car Gen2 and RZ/G1 platforms, we use the SBAR registers to make non > boot CPUs run a routine designed to bring up SMP and deal with hot plug. > The value contained in the SBAR registers is not initialized by a WDT > triggered

[PATCH v2 0/3] arm64: dts: renesas: salvator-x(s)/ulcb: Configure PMIC for DDR Backup Power

Hi Simon, Magnus, The ROHM BD9571MWV PMIC on the Renesas Salvator-X(S) and ULCB development boards supports DDR Backup Power, which means that the DDR power rails can be kept powered while the main SoC is powered down. This patch series is the DT counterpart of the series "[PATCH v2 0/4]

[PATCH v2 3/3] arm64: dts: renesas: ulcb: Configure PMIC for DDR Backup Power

On the R-Car Starter Kit Premier/Pro, all of the DDR0, DDR1, DDR0C, and DDR1C power rails need to be kept powered when backup mode is enabled. Reflect this in the "rohm,ddr-backup-power" property for the BD9571MWV PMIC node. The accessory power switch (SW8) is a momentary switch, hense specify

[PATCH v2 2/3] arm64: dts: renesas: salvator-common: Configure PMIC for DDR Backup Power

On Salvator-X(S), all of the DDR0, DDR1, DDR0C, and DDR1C power rails need to be kept powered when backup mode is enabled. Reflect this in the "rohm,ddr-backup-power" property for the BD9571MWV PMIC node. The accessory power switch (SW23) is a toggle switch, hense specify "rohm,rstbmode-level".

[PATCH v2 1/3] arm64: dts: renesas: ulcb: Add BD9571 PMIC

Add a device node for the ROHM BD9571MWV PMIC. This was based on the example in the DT binding documentation, but using IRQ0 instead of a GPIO interrupt, as that matches the schematics, and because INTC-EX is a simpler block. Signed-off-by: Geert Uytterhoeven --- v2:

Re: [PATCH] PCI: fix semicolon.cocci warnings

On Wed, Mar 07, 2018 at 09:34:29AM +0100, Julia Lawall wrote: > From: Fengguang Wu > > Remove unneeded semicolon. > > Generated by: scripts/coccinelle/misc/semicolon.cocci > > Signed-off-by: Fengguang Wu > Signed-off-by: Julia Lawall

[PATCH/RFC 0/2] regulator: bd9571mwv: Add support for toggle power switches

Hi all, The ROHM BD9571MWV PMIC on the Renesas Salvator-X(S) and ULCB development boards supports DDR Backup Power, which means that the DDR power rails can be kept powered while the main SoC is powered down. This patch series extends the support for DDR backup mode[1] to systems with

[PATCH/RFC 1/2] PM / wakeup: Add callback for wake-up change notification

Add a callback to inform a device that his wake-up setting has been changed. This allows a device to synchronize device configuration with an external user action. E.g. on systems using a Rohm BD9571MWV PMIC and a toggle accessory power switch, the system suspend procedure is: 1. Configure

[PATCH/RFC 2/2] regulator: bd9571mwv: Add support for toggle power switches

Extend the existing support for backup mode to toggle power switches. With a toggle power switch (or level signal), the following steps must be followed exactly: 1. Configure PMIC for backup mode, 2. Switch accessory power switch off, to prepare for system suspend, which is a manual

[PATCH v7] ARM: shmobile: Add watchdog support

On R-Car Gen2 and RZ/G1 platforms, we use the SBAR registers to make non boot CPUs run a routine designed to bring up SMP and deal with hot plug. The value contained in the SBAR registers is not initialized by a WDT triggered reset, which means that after a WDT triggered reset we jump to the SMP

[PATCH v2 1/4] dt-bindings: mfd: bd9571mwv: Document DDR Backup Mode properties

Document the new optional properties related to DDR Backup Mode and toggle/momentary power switches. Signed-off-by: Geert Uytterhoeven --- v2: - Improve property description, - Add properties for power switch type. ---

[PATCH v2 4/4] regulator: bd9571mwv: Add support for DDR backup mode

The BD9571MWV PMIC supports DDR backup mode, which keeps one or more DDR rails powered while the main SoC is powered down. Which DDR rails are to be kept powered is board-specific, and controlled using the optional "rohm,ddr-backup-power" DT property. In the absence of this property, backup mode

[PATCH v2 0/4] regulator: bd9571mwv: Add support for DDR backup mode

Hi all, The ROHM BD9571MWV PMIC on the Renesas Salvator-X(S) and ULCB development boards supports DDR Backup Power, which means that the DDR power rails can be kept powered while the main SoC is powered down. Currently performing a system suspend/resume cycle involves several manual

[PATCH v2 3/4] mfd: bd9571mwv: Allow DDR Backup Power register access

Enable read/write access to the BD9571MWV_BKUP_MODE_CNT register, which is amongst others used to configure DDR Backup Power. Signed-off-by: Geert Uytterhoeven --- Acked-for-MFD-by: Lee Jones v2: - Expand "a.o.", - Add Acked-for-MFD-by (for

[PATCH v2 2/4] mfd: bd9571mwv: Add DDR Backup Power register bit definitions

Add definitions for the KEEPON_* bits in the "BKUP Mode Cnt" register, which control the DDR rails to be kept powered when backup mode is enabled. Signed-off-by: Geert Uytterhoeven Acked-by: Lee Jones --- v2: - Add Acked-by. ---

RE: [PATCH v6 01/26] ARM: shmobile: Add watchdog support

Hi Geert, > Subject: Re: [PATCH v6 01/26] ARM: shmobile: Add watchdog support > > Hi Fabrizio, > > On Wed, Feb 28, 2018 at 6:40 PM, Fabrizio Castro > wrote: > > On R-Car Gen2 and RZ/G1 platforms, we use the SBAR registers to make non > > boot CPUs run a routine

Re: [PATCH v3 2/3] drm: bridge: Add thc63lvd1024 LVDS decoder driver

Hi Andrzej, thanks for review On Wed, Mar 14, 2018 at 09:42:36AM +0100, Andrzej Hajda wrote: > On 13.03.2018 15:30, Jacopo Mondi wrote: > > Add DRM bridge driver for Thine THC63LVD1024 LVDS to digital parallel > > output decoder. > > IMO converter suits here better, but it is just suggestion.

Re: [PATCH 1/3] dt-bindings: iommu: ipmmu-vmsa: Add device tree support for r8a774[35]

On Wed, Mar 07, 2018 at 09:09:21AM +0100, Simon Horman wrote: > [CC Alex Williamson] > > It looks like the last patch to this file was taken by Alex. > Perhaps he would be willing to take this one too if it it was > reposted with him CCed. Alex was taking care of IOMMU patches while I was off at

Re: [PATCH v3 1/3] dt-bindings: display: bridge: Document THC63LVD1024 LVDS decoder

Hi Andrzej, sorry for the mess :( On Wed, Mar 14, 2018 at 09:15:42AM +0100, Andrzej Hajda wrote: > On 13.03.2018 15:30, Jacopo Mondi wrote: > > Document Thine THC63LVD1024 LVDS decoder device tree bindings. > > > > Signed-off-by: Jacopo Mondi > > --- > >

Re: [PATCH v3 2/3] drm: bridge: Add thc63lvd1024 LVDS decoder driver

On 13.03.2018 15:30, Jacopo Mondi wrote: > Add DRM bridge driver for Thine THC63LVD1024 LVDS to digital parallel > output decoder. IMO converter suits here better, but it is just suggestion. > > Signed-off-by: Jacopo Mondi > --- > drivers/gpu/drm/bridge/Kconfig

Re: [PATCH v2 02/11] media: vsp1: Remove packed attributes from aligned structures

On Tue, Mar 13, 2018 at 7:05 PM, Kieran Bingham wrote: > The use of the packed attribute can cause a performance penalty for > all accesses to the struct members, as the compiler will assume that the > structure has the potential to have an unaligned base.

Re: [PATCH v5 00/26] Fix watchdog on Renesas R-Car Gen2 and RZ/G1

Hi Simon, On Tue, Mar 13, 2018 at 9:05 PM, Simon Horman wrote: > On Thu, Mar 01, 2018 at 11:20:11AM +0100, Geert Uytterhoeven wrote: >> On Fri, Feb 23, 2018 at 9:14 AM, Simon Horman wrote: >> > On Thu, Feb 22, 2018 at 09:38:39AM +0100, Geert Uytterhoeven

Re: [PATCH v3 1/3] dt-bindings: display: bridge: Document THC63LVD1024 LVDS decoder

On 13.03.2018 15:30, Jacopo Mondi wrote: > Document Thine THC63LVD1024 LVDS decoder device tree bindings. > > Signed-off-by: Jacopo Mondi > --- > .../bindings/display/bridge/thine,thc63lvd1024.txt | 63 > ++ > 1 file changed, 63 insertions(+) >