Since commit 9ec36cafe43b ("of/irq: do irq resolution in platform_get_irq")
platform_get_irq() can return -EPROBE_DEFER. However, the driver overrides
an error returned by that function with -ENOENT which breaks the deferred
probing. Propagate upstream an error code returned by platform_get_irq()
On Mon, Oct 08, 2018 at 09:34:45AM +0200, Simon Horman wrote:
> On Thu, Oct 04, 2018 at 05:07:47PM +0100, Biju Das wrote:
> > Add support for r8a7744. The Renesas RZ/G1N (R8A7744) PCIe controller
> > is identical to the R-Car Gen2 family.
> >
> > Signed-off-by: Biju Das
> > Reviewed-by: Chris
Fallback to PIO never really worked due to various reasons (sh-sci
driver issues and dmaengine framework limitations).
There are three places where DMA submission can fall, and the driver
should fall back to PIO:
1. sci_submit_rx(),
2. sci_dma_rx_complete(),
3. work_fn_tx().
This RFC fixes
On Mon, 8 Oct 2018 09:51:47 +0100, Fabrizio Castro wrote:
> The RZ/G1C (a.k.a. R8A77470) comes with three SDHI interfaces,
> SDHI0 and SDHI2 are compatible with R-Car Gen2 SDHIs, and
> SDHI1 is compatible with R-Car Gen3 SDHIs, as it comes with an
> internal DMAC, therefore SDHI1 is fully
On Fri, 12 Oct 2018 07:29:24 -0500, Chris Brandt wrote:
> Document support for the RZ/A2 (R7S9210) SoC.
>
> Signed-off-by: Chris Brandt
> Reviewed-by: Geert Uytterhoeven
> ---
> v2:
> * Documented that R7S9210 has 2 clocks
> ---
> Documentation/devicetree/bindings/mmc/tmio_mmc.txt | 3 ++-
>
On 10/12/2018 02:21 PM, Simon Horman wrote:
>>> Describe THS/CIVM in the R8A77970 device tree.
>>>
>>> Based on the original (and large) patches by Vladimir Barinov.
>>>
>>> Signed-off-by: Vladimir Barinov
>>> Signed-off-by: Sergei Shtylyov
>>>
>>> ---
>>> This patch is against the
Not all (H)SCIF devices support DMA, and failure to set it up is not
normally a cause for concern. This patch demotes the associated warning to
debug output.
Inspired by BSP patch "sci: sh-sci: Fix transfer sequence of unsupport DMA
transfer" (6beb1f98d3bd30) by Hiromitsu Yamasaki.
Document support for the RZ/A2 (R7S9210) SoC.
Signed-off-by: Chris Brandt
Reviewed-by: Geert Uytterhoeven
---
v2:
* Documented that R7S9210 has 2 clocks
---
Documentation/devicetree/bindings/mmc/tmio_mmc.txt | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git
The SDHI/MMC controller in the RZ/A2 is almost the same as R-Car gen3, but
with some minor differences.
Signed-off-by: Chris Brandt
---
v4:
* Fixed spelling in #define
v3:
* Removed extra space in Kconfig
* Removed unneeded parentheses
v2:
* Made comment clearer
---
drivers/mmc/host/Kconfig
Basically the same HW block that was used in R-Car Gen 3 is used in
RZ/A2 (with only a couple small differences).
Not sure if you're going to like the Kconfig change or not.
Chris Brandt (3):
clk: renesas: r7s9210: Add SDHI clocks
mmc: renesas_sdhi_internal_dmac: Add R7S9210 support
Add SDHI clocks for RZ/A2
Signed-off-by: Chris Brandt
Reviewed-by: Geert Uytterhoeven
---
drivers/clk/renesas/r7s9210-cpg-mssr.c | 5 +
1 file changed, 5 insertions(+)
diff --git a/drivers/clk/renesas/r7s9210-cpg-mssr.c
b/drivers/clk/renesas/r7s9210-cpg-mssr.c
index
> Even after you pointed that out...I had to stare real hard to see it. I
> guess the brain corrects what you see.
Yes. c57d3e7a9391 ("i2c-dev: Fix typo in ioctl name reference") fixed
something in 2015 which was around forever. I had to look twice at this
patch as well.
> I was getting
Hi Wolfram,
On Friday, October 12, 2018, Wolfram Sang wrote:
> > +/* RZ/A2 does not have the ADRR_MODE bit */
> > +#define SDHI_INTERNAL_DMAC_ADRR_MODE_FIXED 2
>
> First, there is a typo: s/ADRR/ADDR/g
Thanks!
Even after you pointed that out...I had to stare real hard to see it. I
guess the
On Thu, Oct 04, 2018 at 05:21:34PM +0100, Biju Das wrote:
> Document r8a7744 specific compatible strings. No driver change is
> needed as the fallback compatible string "renesas,tpu" activates the
> right code in the driver.
>
> Signed-off-by: Biju Das
> Reviewed-by: Chris Paterson
> ---
> This
On Thu, Oct 04, 2018 at 05:17:19PM +0100, Biju Das wrote:
> Document RZ/G1N (R8A7744) SoC bindings.
>
> Signed-off-by: Biju Das
> Reviewed-by: Chris Paterson
> ---
> This patch is tested against next-20181004
> ---
> Documentation/devicetree/bindings/pwm/renesas,pwm-rcar.txt | 1 +
> 1 file
On Thu, Oct 11, 2018 at 09:30:02AM +0200, Niklas Söderlund wrote:
> Hi Geert,
>
> On 2018-10-11 09:02:22 +0200, Geert Uytterhoeven wrote:
> > Hi Niklas,
> >
> > On Thu, Oct 11, 2018 at 12:11 AM Niklas Söderlund
> > wrote:
> > > On 2018-10-10 22:18:11 +0300, Sergei Shtylyov wrote:
> > > >
On Mon, Oct 01, 2018 at 10:57:39PM +0300, Sergei Shtylyov wrote:
> Document the R-Car V3{M|H} (R8A779{7|8}0) SoC in the Renesas R-Car PWM
> bindings. R8A77970's hardware is a generic R-Car gen3 PWM, while R8A77980
> has an extra error injection register...
>
> Signed-off-by: Sergei Shtylyov
>
On Wed, Oct 10, 2018 at 09:12:54AM +0200, Geert Uytterhoeven wrote:
> On Tue, Oct 9, 2018 at 9:50 PM Sergei Shtylyov
> wrote:
> > Describe THS/CIVM in the R8A77970 device tree.
> >
> > Based on the original (and large) patches by Vladimir Barinov.
> >
> > Signed-off-by: Vladimir Barinov
> >
On Sat, Sep 22, 2018 at 10:57:29PM +0300, Sergei Shtylyov wrote:
> Document the R-Car V3{M|H} (R8A779{7|8}0) SoC in the Renesas TPU bindings;
> the TPU hardware in those is the Renesas standard 4-channel timer pulse
> unit.
>
> Signed-off-by: Sergei Shtylyov
>
> ---
> This patch is against
On Wed, Oct 10, 2018 at 02:39:18PM +0200, Geert Uytterhoeven wrote:
> On Tue, Oct 9, 2018 at 9:39 AM Yoshihiro Kaneko wrote:
> > This patch adds DMA properties to the MSIOF device nodes of R8A77990 SoC.
> >
> > Signed-off-by: Yoshihiro Kaneko
>
> Reviewed-by: Geert Uytterhoeven
> Tested-by:
On Sat, Sep 22, 2018 at 10:43:24PM +0300, Sergei Shtylyov wrote:
> The "compatible" property description contradicts even the example given:
> it only says that there must be a single value while the example has the
> fallback value too -- which makes much more sense. Moreover, the generic
>
On Wed, Oct 10, 2018 at 11:25:30AM +0200, Geert Uytterhoeven wrote:
> On Mon, Oct 8, 2018 at 11:53 AM Fabrizio Castro
> wrote:
> > Add device tree nodes for the I2C[0123] controllers. Also, add
> > the aliases node.
> >
> > Signed-off-by: Fabrizio Castro
> > Reviewed-by: Biju Das
>
>
> As you can imagine, it does have this bit. And it worked fine from me.
> But the chip guys said they found something not right with it, so they
> removed it from the v1.0 Hardware Manual.
Do you happen to know if this applies for Gen3 SDHI as well?
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Hi Chris,
> +/* RZ/A2 does not have the ADRR_MODE bit */
> +#define SDHI_INTERNAL_DMAC_ADRR_MODE_FIXED 2
First, there is a typo: s/ADRR/ADDR/g
Also, I think it would make the code much more comprehensible if this
macro was named SDHI_INTERNAL_DMAC_ADDR_MODE_BROKEN. Or maybe
On Wed, Sep 26, 2018 at 01:45:47AM +, Kuninori Morimoto wrote:
>
> From: Kuninori Morimoto
>
> This patch updates license to use SPDX-License-Identifier
> instead of verbose license text.
>
> Signed-off-by: Kuninori Morimoto
> Reviewed-by: Simon Horman
> ---
> Thierry
>
> 2weeks past,
On Wed, Sep 26, 2018 at 01:45:17AM +, Kuninori Morimoto wrote:
>
> From: Kuninori Morimoto
>
> This patch updates license to use SPDX-License-Identifier
> instead of verbose license text.
>
> Signed-off-by: Kuninori Morimoto
> Reviewed-by: Simon Horman
> ---
> Thierry
>
> 2weeks past,
This fixes the check for unused mdio bus setting and the following static
checker warning:
drivers/pinctrl/pinctrl-rzn1.c:198 rzn1_pinctrl_mdio_select()
warn: always true condition '(ipctl->mdio_func[mdio] >= 0) => (0-u32max >= 0)'
Reported-by: Dan Carpenter
Signed-off-by: Phil Edworthy
---
Hi Shimoda-San,
Thanks for the patch.
> -Original Message-
> From: linux-renesas-soc-ow...@vger.kernel.org ow...@vger.kernel.org> On Behalf Of Yoshihiro Shimoda
> Sent: 09 October 2018 11:45
> To: ho...@verge.net.au; magnus.d...@gmail.com
> Cc: linux-renesas-soc@vger.kernel.org;
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