> On November 16, 2018 at 9:42 AM Geert Uytterhoeven
> wrote:
>
>
> Hi Uli,
>
> On Fri, Nov 16, 2018 at 8:21 AM Ulrich Hecht wrote:
> > Used by I2C controllers 0, 3 and 5 in R8A7795 and R8A7796 SoCs.
> >
> > Signed-off-by: Ulrich Hecht
>
> Thanks for your patch!
>
> Reviewed-by: Geert Uy
On Fri, Nov 16, 2018, at 11:15 AM, Lucas Stach wrote:
> Am Donnerstag, den 15.11.2018, 23:16 +0100 schrieb Fernando Ramos:
> > This patch unifies the naming of DRM functions for reference counting as
> > requested on Documentation/gpu/todo.rst
> >
> > > Signed-off-by: Fernando Ramos
> > ---
> >
On Fri, Nov 16, 2018 at 05:01:28PM +0100, Uwe Kleine-König wrote:
> Other than that I think the patch is fine
Thinking again, I wonder why not just do:
static inline struct clk *clk_get_optional(struct device *dev, const char *id)
{
struct clk *c = clk_get(dev, id);
if (c == ERR_
On Fri, Nov 16, 2018 at 02:59:32PM +, Phil Edworthy wrote:
> Quite a few drivers get an optional clock, e.g. a clock required to
> access a peripheral's registers that is always enabled on some devices.
> This adds the of_clk_get_by_name_optional() function for this purpose.
>
> This function
Hi Geert,
On Friday, November 16, 2018, Geert Uytterhoeven wrote:
> > We can have Geert give his opinion on the topic since it was his
> > suggestion to begin with.
> >
> >
> > > I'm sorry this is more work, and again, it might be post-poned imo,
> > > provided you drop this change you have introd
clk_get_optional() returns NULL if not found instead of -ENOENT,
otherwise the behaviour is the same as clk_get().
Signed-off-by: Phil Edworthy
---
arch/unicore32/kernel/clock.c | 11 +++
1 file changed, 11 insertions(+)
diff --git a/arch/unicore32/kernel/clock.c b/arch/unicore32/kernel
clk_get_optional() returns NULL if not found instead of -ENOENT,
otherwise the behaviour is the same as clk_get().
Signed-off-by: Phil Edworthy
---
arch/mips/ar7/clock.c | 11 +++
1 file changed, 11 insertions(+)
diff --git a/arch/mips/ar7/clock.c b/arch/mips/ar7/clock.c
index 6b64fd96d
clk_get_optional() returns NULL if not found instead of -ENOENT,
otherwise the behaviour is the same as clk_get().
Signed-off-by: Phil Edworthy
---
arch/mips/loongson64/lemote-2f/clock.c | 11 +++
1 file changed, 11 insertions(+)
diff --git a/arch/mips/loongson64/lemote-2f/clock.c
b/ar
Quite a few drivers get an optional clock, e.g. a clock required to
access a peripheral's registers that is always enabled on some devices.
This adds the of_clk_get_by_name_optional() function for this purpose.
This function behaves the same as of_clk_get_by_name() except that it
will return NULL
clk_get_optional() returns NULL if not found instead of -ENOENT,
otherwise the behaviour is the same as clk_get().
Signed-off-by: Phil Edworthy
---
arch/m68k/coldfire/clk.c | 11 +++
1 file changed, 11 insertions(+)
diff --git a/arch/m68k/coldfire/clk.c b/arch/m68k/coldfire/clk.c
index
This adds clk_get_optional() and devm_clk_get_optional() functions to get
optional clocks.
They behave the same as (devm_)clk_get except where there is no clock
producer. In this case, instead of returning -ENOENT, the function
returns NULL. This makes error checking simpler and allows
clk_prepare_
Quite a few drivers get an optional clock, e.g. a bus clock required to
access peripheral's registers that is always enabled on some devices. This
series adds of_clk_get_by_name_optional(), clk_get_optional() and
devm_clk_get_optional() functions for this purpose.
The functions behave the same as
On Thu, Nov 15, 2018 at 03:47:10PM +0100, Marek Vasut wrote:
> On 11/15/2018 03:33 PM, Simon Horman wrote:
> > On Wed, Nov 14, 2018 at 04:32:05PM +0100, Marek Vasut wrote:
> >> On 11/13/2018 04:22 PM, Geert Uytterhoeven wrote:
> >>> Enable R-Car Gen3 PCIe PHY support, which is needed for PCIe to fu
On Fri, Nov 16, 2018 at 02:48:42PM +0100, Geert Uytterhoeven wrote:
> For consistency with arm64, where vendors have a single Kconfig symbol
> in arch/arm64/Kconfig.platforms.
>
> Signed-off-by: Geert Uytterhoeven
Thanks Geert,
applied for v4.21.
On Fri, Nov 16, 2018 at 02:48:41PM +0100, Geert Uytterhoeven wrote:
> arch/arm64/Kconfig.platforms has SoC-specific Kconfig symbols for
> Renesas SoCs, while other vendors have only a single Kconfig symbol.
>
> Increase consistency with other vendors by moving the SoC-specific
> Kconfig symbols to
On Fri, Nov 16, 2018 at 02:38:03PM +0100, Geert Uytterhoeven wrote:
> Unlike all other family-specific Kconfig symbols for Renesas ARM SoCs,
> ARCH_RZN1 is user-visible. As this symbol is already selected by the
> SoC-specific ARCH_R9A06G032 symbol, there is no need for that.
>
> Hide ARCH_RZN1 f
arch/arm64/Kconfig.platforms has SoC-specific Kconfig symbols for
Renesas SoCs, while other vendors have only a single Kconfig symbol.
Increase consistency with other vendors by moving the SoC-specific
Kconfig symbols to drivers/soc/renesas/Kconfig.
Increase consistency with R-Car Gen1 and Gen2 S
For consistency with arm64, where vendors have a single Kconfig symbol
in arch/arm64/Kconfig.platforms.
Signed-off-by: Geert Uytterhoeven
---
v2:
- Move family-specific Kconfig symbols, too.
---
arch/arm/mach-shmobile/Kconfig | 126
drivers/soc/renesas/Kconfig|
Hi all,
As pointed out by Arnd[*], there are lots of SoC-specific Kconfig
symbols in the Renesas section of arch/arm64/Kconfig.platforms, while
other vendors expose a single Kconfig symbol there.
Hence this patch series moves them to drivers/soc/renesas/Kconfig,
reducing the footprint and
Unlike all other family-specific Kconfig symbols for Renesas ARM SoCs,
ARCH_RZN1 is user-visible. As this symbol is already selected by the
SoC-specific ARCH_R9A06G032 symbol, there is no need for that.
Hide ARCH_RZN1 from the user, and move it up, where all other
family-specific Kconfig symbols
Am Donnerstag, den 15.11.2018, 23:16 +0100 schrieb Fernando Ramos:
> This patch unifies the naming of DRM functions for reference counting as
> requested on Documentation/gpu/todo.rst
>
> > Signed-off-by: Fernando Ramos
> ---
> drivers/gpu/drm/arc/arcpgu_drv.c | 4 ++--
> drivers/gpu
Hello,
Now that the below commit are merged in mainline, we can start fixing
the ARM64 platform specific DT files:
commit d7a4303b8d1f ("dt-bindings: thermal: Allow multiple devices to
share cooling map")
commit a92bab8919e3 ("of: thermal: Allow multiple devices to share
cooling map")
Each
Each CPU can (and does) participate in cooling down the system but the
DT only captures a handful of them, normally CPU0, in the cooling maps.
Things work by chance currently as under normal circumstances its the
first CPU of each cluster which is used by the operating systems to
probe the cooling
Hi Chris,
On Thu, Nov 15, 2018 at 5:50 PM Chris Brandt wrote:
> On Thursday, November 15, 2018 1, jacopo mondi wrote:
> > > v5:
> > > * Specify number of ports using of_device_id.data and save as priv-
> > >npins
> > > * Use priv->npins everywhere instead of hard coded RZA2_NPINS
> > > * Check
On Thu, Nov 15, 2018 at 5:15 PM Chris Brandt wrote:
> Adds support for the pin and gpio controller found in R7S9210 (RZ/A2) SoCs.
>
> Signed-off-by: Chris Brandt
> Reviewed-by: Jacopo Mondi
> ---
> v6:
> * Bug fix: Output value not being set in rza2_chip_direction_output()
Reviewed-by: Geert U
Hi Kaneko-san,
On Thu, Nov 15, 2018 at 5:47 PM Yoshihiro Kaneko wrote:
> From: Takeshi Kihara
>
> This patch adds HSCIF{0,1,2,3,4} pins, groups and functions to
> the R8A77990 SoC.
>
> Signed-off-by: Takeshi Kihara
> Signed-off-by: Yoshihiro Kaneko
> ---
>
> This patch is based on the sh-pfc b
Hi Uli,
On Fri, Nov 16, 2018 at 8:21 AM Ulrich Hecht wrote:
> Used by I2C controllers 0, 3 and 5 in R8A7795 and R8A7796 SoCs.
>
> Signed-off-by: Ulrich Hecht
Thanks for your patch!
Reviewed-by: Geert Uytterhoeven
Some bikeshedding below, which I believe would increase readability.
> --- a/d
On Fri, Nov 16, 2018 at 8:21 AM Ulrich Hecht wrote:
> From: Takeshi Kihara
>
> This patch adds I2C{0,3,5} pins, groups and functions to the R8A7796 SoC.
>
> These pins are physically muxed with other pins. Therefore, setup of
> MOD_SEL is needed for exclusive control with other pins.
>
> Signed-o
On Fri, Nov 16, 2018 at 8:21 AM Ulrich Hecht wrote:
> From: Takeshi Kihara
>
> This patch adds I2C{0,3,5} pins, groups and functions to
> the R8A7795 ES1.x SoC.
>
> These pins are physically muxed with other pins. Therefore, setup of
> MOD_SEL is needed for exclusive control with other pins.
>
>
On Fri, Nov 16, 2018 at 8:21 AM Ulrich Hecht wrote:
> From: Takeshi Kihara
>
> This patch adds I2C{0,3,5} pins, groups and functions to the R8A7795 SoC.
>
> These pins are physically muxed with other pins. Therefore, setup of
> MOD_SEL is needed for exclusive control with other pins.
>
> Signed-o
Hi Uli,
On Fri, Nov 16, 2018 at 8:21 AM Ulrich Hecht wrote:
> This is an up-port from the BSP. Unfortunately I could not test these
> because none of those pins seem to be accessible on Salvator boards (not on
> ULCB either, AFAICT), so the best thing I can say is that they don't seem to
> break
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