On 15-11-18, 11:58, Fabrizio Castro wrote:
> Renesas' RZ/G2M (R8A774A1) SoC has DMA controllers compatible
> with this driver, therefore document RZ/G2M specific bindings.
Applied, thanks
--
~Vinod
On 15-11-18, 11:59, Fabrizio Castro wrote:
> From: Biju Das
>
> This patch adds binding for r8a774a1 (RZ/G2M).
>
> Signed-off-by: Biju Das
Applied, thanks
--
~Vinod
On 25-10-18, 15:53, Biju Das wrote:
> This patch adds usb high-speed dmac binding for r8a77470 (RZ/G1C) SoC.
Applied, thanks
--
~Vinod
On 16-05-18, 15:06, Ulrich Hecht wrote:
> From: Hiroyuki Yokoyama
>
> Renesas R-Car E3 (R8A77990) SoC also has the R-Car gen2/3 compatible DMA
> controllers, so document the SoC specific binding.
This fails to apply for me, please rebase and send
--
~Vinod
On 16-05-18, 15:06, Ulrich Hecht wrote:
> From: Hiroyuki Yokoyama
>
> Renesas R-Car D3 (R8A77995) and E3 (R8A77990) SoCs also have the R-Car
> gen2/3 compatible DMA controllers, so document the SoC specific binding.
Applied, thanks
--
~Vinod
On Tue, Apr 24, 2018 at 10:51:06AM +0200, Simon Horman wrote:
> From: Ulrich Hecht
>
> R8A77995's SYS-DMAC is R-Car Gen3-compatible.
Applied, thanks
--
~Vinod
On Fri, Apr 20, 2018 at 03:28:28PM +0200, Geert Uytterhoeven wrote:
> Since commit 9b5ba0df4ea4f940 ("ARM: shmobile: Introduce ARCH_RENESAS")
> is CONFIG_ARCH_RENESAS a more appropriate platform check than the legacy
> CONFIG_ARCH_SHMOBILE, hence use the former.
>
> Renesas SuperH SH-Mobile SoCs
On Thu, Apr 19, 2018 at 04:05:39PM +0200, Wolfram Sang wrote:
> We should get drvdata from struct device directly. Going via
> platform_device is an unneeded step back and forth.
Applied, thanks
--
~Vinod
On Thu, Apr 19, 2018 at 04:05:38PM +0200, Wolfram Sang wrote:
> We should get drvdata from struct device directly. Going via
> platform_device is an unneeded step back and forth.
Applied, thanks
--
~Vinod
On Thu, Apr 19, 2018 at 04:05:37PM +0200, Wolfram Sang wrote:
> We should get drvdata from struct device directly. Going via
> platform_device is an unneeded step back and forth.
Do you mind splitting this per driver please, that makes it easy to manage
for me :)
--
~Vinod
On Thu, Mar 29, 2018 at 11:11:06AM +0100, Biju Das wrote:
> Renesas RZ/G SoC also have the R-Car gen2/3 compatible DMA controllers.
> Document RZ/G1C (also known as R8A77470) SoC bindings.
Applied, thanks
--
~Vinod
On Thu, Mar 29, 2018 at 06:53:32PM +0200, Geert Uytterhoeven wrote:
> If serial console wake-up is enabled ("echo enabled >
> /sys/.../ttySC0/power/wakeup"), and any serial input is received while
> the system is suspended, serial port input no longer works after system
> resume.
>
> Note that:
>
On Fri, Feb 02, 2018 at 07:05:15PM +0900, Yoshihiro Shimoda wrote:
> This patch fixes an issue that a race condition happens between a client
> driver and the rcar-dmac driver:
>
> - The rcar_dmac_isr_transfer_end() is called.
> - The done list appears, and desc.running is the next active list.
On Tue, Feb 27, 2018 at 02:54:56PM +0900, Yoshihiro Shimoda wrote:
> This patch adds binding for r8a77965 (R-Car M3-N).
Applied, thanks
>
> Signed-off-by: Yoshihiro Shimoda
> ---
> Documentation/devicetree/bindings/dma/renesas,usb-dmac.txt | 1 +
> 1 file
On Wed, Feb 14, 2018 at 06:40:12PM +0900, Yoshihiro Shimoda wrote:
> According to R-Car Gen3 Rev.0.80 manual, the DMATCR can be set to
> 16,777,215 as maximum. So, this patch fixes the max_chunk_size for
> safety on all of SoCs. Otherwise, a system may hang if the DMATCR
> is set to 0 on R-Car
On Thu, Feb 01, 2018 at 10:09:25PM +0300, Sergei Shtylyov wrote:
> Renesas R-Car V3H SoC has the R-Car gen3 compatible DMA controllers.
> Document R-Car V3H (also known as R8A77980) SoC bindings.
Applied, thanks
--
~Vinod
so perhaps it
> makes most sense if Rafael takes it through the PM tree?
Sounds okay to me.
Acked-By: Vinod Koul <vinod.k...@intel.com>
--
~Vinod
On Wed, Nov 08, 2017 at 06:33:33AM +, Kuninori Morimoto wrote:
>
> Hi Vinod
>
> > > > > This is now commit 847449f23dcbff68 ("dmaengine: rcar-dmac: use TCRB
> > > > > instead of TCR for residue") in slave-dma/next, and breaks serial
> > > > > console
> > > > > input on koelsch
On Tue, Oct 31, 2017 at 05:11:13PM +0530, Vinod Koul wrote:
> On Tue, Oct 31, 2017 at 11:46:36AM +0100, Geert Uytterhoeven wrote:
> > >
> > > This is now commit 847449f23dcbff68 ("dmaengine: rcar-dmac: use TCRB
> > > instead of TCR for residue") in s
On Tue, Oct 31, 2017 at 11:46:36AM +0100, Geert Uytterhoeven wrote:
> CC linux-renesas-soc
>
> On Tue, Oct 31, 2017 at 11:45 AM, Geert Uytterhoeven
> <ge...@linux-m68k.org> wrote:
> > Hi Vinod, Morimoto-san, Yokoyama-san,
> >
> > On Fri, Oct 20, 2017 at 8:15
On Wed, Oct 04, 2017 at 02:15:23PM +0200, Geert Uytterhoeven wrote:
> Use the of_device_get_match_data() helper instead of open coding.
> Note that when used with DT, there's always a valid match.
Applied, thanks
--
~Vinod
On Fri, Oct 06, 2017 at 06:15:17PM +0100, Biju Das wrote:
> This patch adds support for r8a7743/5 SoCs. The Renesas RZ/G1[ME]
> (R8A7743/5) usbdmac engine is identical to the R-Car Gen2 family.
>
> No driver change is needed due to the fallback compatible value
> "renesas,r8a7743-usb-dmac".
>
On Thu, Aug 31, 2017 at 11:59:24PM +0300, Sergei Shtylyov wrote:
> Renesas R-Car V3M (R8A77970) SoC also has the R-Car gen2/3 compatible DMA
> controllers, so document the SoC specific binding.
Applied, thanks
--
~Vinod
On Mon, Aug 21, 2017 at 06:31:57AM +, Kuninori Morimoto wrote:
>
> From: Kuninori Morimoto
>
> Anton Volkov noticed that engine->dev is NULL before
> of_dma_controller_register() in probe.
> Thus there might be a NULL pointer dereference in
>
On Fri, Aug 25, 2017 at 05:47:22AM +, Yoshihiro Shimoda wrote:
> Hi Rob,
>
> > From: Rob Herring
> > Sent: Friday, August 11, 2017 1:26 AM
> >
> > On Wed, Aug 02, 2017 at 08:33:34PM +0900, Yoshihiro Shimoda wrote:
> > > This patch adds R-Car M3-W device tree bindings for usb-dmac driver.
> >
On Sun, May 28, 2017 at 11:30:44AM +0200, Wolfram Sang wrote:
> It is 'R-Car', not 'r-car'. No code or binding changes, only descriptive text.
Applied, thanks
--
~Vinod
On Fri, May 19, 2017 at 09:27:47AM +0200, Geert Uytterhoeven wrote:
> The documentation for the "interrupt-names" property only mentions the
> per-channel interrupts, while the error interrupt has always been
> mandatory, too.
Applied, thanks
--
~Vinod
On Tue, May 16, 2017 at 01:09:14AM +0200, Niklas Söderlund wrote:
> Hi,
>
> This series fix resource freeing synchronization by:
>
> 1. Patch 1/3
>Store the IRQ number in the global struct so it can be used later
>together with synchronize_irq().
>
> 2. Patch 2/3
>Adding support for
On Fri, May 19, 2017 at 08:59:03AM +0200, Geert Uytterhoeven wrote:
> Hi Vinod,
>
> On Fri, May 19, 2017 at 5:51 AM, Vinod Koul <vinod.k...@intel.com> wrote:
> > On Tue, May 16, 2017 at 01:09:15AM +0200, Niklas Söderlund wrote:
> >> The IRQ number is needed
On Tue, May 16, 2017 at 01:09:15AM +0200, Niklas Söderlund wrote:
> The IRQ number is needed after probe to be able to add synchronisation
> points in other places in the driver when freeing resources and to
> implement a device_synchronize() callback. Store the IRQ number in the
> struct
On Mon, May 15, 2017 at 05:49:52PM +0900, Yoshihiro Shimoda wrote:
> From: Hiroyuki Yokoyama
>
> This patch fixes the register definition of AE (Address Error flag) bit.
Applied, thanks
--
~Vinod
> > > > On 2017-04-05 08:55:31 +0530, Vinod Koul wrote:
> > > >> On Thu, Mar 30, 2017 at 09:38:39AM +0200, Niklas Söderlund wrote:
> > > >>> On 2017-03-29 15:30:42 +0200, Niklas Söderlund wrote:
> > > >>>> On 2017-03-29 14:31:33 +0200
On Thu, Mar 30, 2017 at 09:38:39AM +0200, Niklas Söderlund wrote:
> Hi Geert,
>
> On 2017-03-29 15:30:42 +0200, Niklas Söderlund wrote:
> > Hi Geert,
> >
> > On 2017-03-29 14:31:33 +0200, Geert Uytterhoeven wrote:
> > > Hi Niklas,
> > >
> > > On Wed, Mar 29, 2017 at 12:40 AM, Niklas Söderlund
>
On Wed, Mar 22, 2017 at 04:22:36AM +, Kuninori Morimoto wrote:
>
> From: Kuninori Morimoto
>
> SYS-DMAC can use 40bit address transfer, and it supports Descriptor
> Mode too. Current SYS-DMAC driver disables Descriptor Mode if it was
> 40bit address today.
On Mon, Feb 13, 2017 at 12:00:26PM +0100, Geert Uytterhoeven wrote:
> By default, the DMA mask covers only the low 32-bit address space, which
> causes SWIOTLB on arm64 to fall back to a bounce buffer for DMA
> transfers involving memory outside the 32-bit address space.
>
> The R-Car DMA
On Wed, Jan 11, 2017 at 03:39:31PM +0100, Niklas Söderlund wrote:
> The slave mapping should be removed together with other channel
> resources when the channel is freed. If it's not unmapped it will hang
> around forever after the channel is freed.
Applied, thanks
--
~Vinod
On Thu, Nov 24, 2016 at 03:23:06PM +0100, Simon Horman wrote:
> From: Ulrich Hecht
Applied, thanks
--
~Vinod
On Thu, Sep 29, 2016 at 01:25:48AM +0300, Sergei Shtylyov wrote:
> Renesas RZ/G SoC also have the R-Car gen2/3 compatible DMA controllers.
> Document RZ/G1[ME] (also known as R8A774[35]) SoC bindings.
Applied, thanks
--
~Vinod
On Thu, Sep 29, 2016 at 09:59:15PM +0200, Niklas Söderlund wrote:
> kbuild test robot reports:
>
>lib/dma-debug.c: In function 'debug_dma_map_resource':
> >> lib/dma-debug.c:1541:16: error: implicit declaration of function
> >> '__phys_to_pfn' [-Werror=implicit-function-declaration]
>
On Thu, Sep 29, 2016 at 12:02:38PM +0200, Niklas Söderlund wrote:
> From: Niklas Söderlund
>
> Hi Vindo,
:(
>
> This small series fixes the build error and warnings for ia64 and m32r
> which kbuild test robot found and where introduced in the series
>
On Wed, Aug 10, 2016 at 01:22:13PM +0200, Niklas Söderlund wrote:
> Hi,
>
> This series tries to solve the problem with DMA with device registers
> (MMIO registers) that are behind an IOMMU for the rcar-dmac driver. A
> recent patch '9575632 (dmaengine: make slave address physical)'
> clarifies
On Wed, Aug 10, 2016 at 11:07:10PM +0530, Vinod Koul wrote:
> On Wed, Aug 10, 2016 at 01:22:13PM +0200, Niklas Söderlund wrote:
> > Hi,
> >
> > This series tries to solve the problem with DMA with device registers
> > (MMIO registers) that are behind an IOM
On Wed, Aug 10, 2016 at 01:22:13PM +0200, Niklas Söderlund wrote:
> Hi,
>
> This series tries to solve the problem with DMA with device registers
> (MMIO registers) that are behind an IOMMU for the rcar-dmac driver. A
> recent patch '9575632 (dmaengine: make slave address physical)'
> clarifies
On Thu, Aug 04, 2016 at 07:59:41PM +0900, Yoshihiro Shimoda wrote:
> The USB-DMAC's interruption happens even if the CHCR.DE is not set to 1
> because CHCR.NULLE is set to 1. So, this driver should call
> usb_dmac_isr_transfer_end() if the DE bit is set to 1 only. Otherwise,
> the desc is possible
On Fri, Jul 29, 2016 at 11:07:49AM +0200, Lars-Peter Clausen wrote:
> On 07/29/2016 02:30 AM, Takashi Sakamoto wrote:
> > Lars,
> >
> > On Jul 29 2016 05:33, Lars-Peter Clausen wrote:
> >> Hotplug is something that always pops up sooner or later. E.g. if someone
> >> puts a ASoC supported CODEC
On Wed, Jul 27, 2016 at 10:22:41PM +0200, Takashi Iwai wrote:
> On Wed, 27 Jul 2016 20:22:33 +0200,
> Mark Brown wrote:
> >
> > On Wed, Jul 27, 2016 at 08:11:49PM +0200, Takashi Iwai wrote:
> >
> > > I'm wondering whether it's a better option to block the unbind
> > > behavior, either in driver
On Tue, Jul 26, 2016 at 05:41:56AM +, Kuninori Morimoto wrote:
>
> Hi ALSA SoC
>
> My current headache is ALSA SoC's each modules (= Card/Codec/CPU/Platform)
> doesn't care about "unbind/rmmod".
> For example, if someone unbinded/rmmoded "Codec", Card or other modules
> doesn't know about
On Wed, Jun 15, 2016 at 01:13:04PM +0200, Niklas Söderlund wrote:
> Hi all,
>
> Laurent Pinchart (1):
> dmaengine: rcar-dmac: Fix residue reporting for pending descriptors
>
> Muhammad Hamza Farooq (2):
> dma: rcar-dma: use result of updated get_residue in tx_status
> dma: rcar-dma: Fixed
On Thu, Jun 02, 2016 at 02:58:07PM +0200, Niklas Söderlund wrote:
> Hi Vinod,
>
> On 2016-06-01 23:36:11 +0530, Vinod Koul wrote:
> > On Wed, Jun 01, 2016 at 05:22:23PM +0200, Niklas Söderlund wrote:
> > > Hi,
> > >
> > > [In this v7 series I
On Wed, May 11, 2016 at 03:15:11PM +0200, Niklas Söderlund wrote:
> Currently the following DT description would result in dmac0 always
> being tried first and dmac1 second if dmac0 was unavailable. This
> results in heavier use of dmac0 then of dmac1. This patch adds an
> approximate average
On Tue, Feb 16, 2016 at 09:39:42PM +0100, Niklas Söderlund wrote:
> Enable slave transfers to devices behind IPMMU:s by mapping the slave
IPMMU:s ?
> addresses using the dma-mapping API.
>
> Signed-off-by: Niklas Söderlund
> Reviewed-by: Laurent Pinchart
On Tue, Mar 01, 2016 at 05:37:07PM +0100, Wolfram Sang wrote:
> From: Wolfram Sang
>
> This change will also make Coverity happy by avoiding a theoretical NULL
> pointer dereference; yet another reason is to use the above helper function
> to tighten the code
On Mon, Feb 22, 2016 at 10:49:08AM +0100, Niklas Söderlund wrote:
> Hi Vinod,
>
> On 2016-02-21 20:50:46 +0530, Vinod Koul wrote:
> > The slave dmaengine semantics required the client to map dma
> > addresses and pass DMA address to dmaengine drivers. While this
> > was
, we know the dmaengine and always use a
specific one. Further the IOMMU cases can lead to failure of this
notion, so make this as physical address and now dmaengine driver
will do the required mapping.
Original-patch-by: Linus Walleij <linus.wall...@linaro.org>
Signed-off-by: Vinod Koul &l
On Tue, Feb 09, 2016 at 11:57:24PM +0100, Wolfram Sang wrote:
>
> > This is a dependency for adding iommu support to the rcar-dmac driver, cfr.
> > "[PATCH v2 0/5] dmaengine: rcar-dmac: add iommu support for slave
> > transfers".
> > http://www.spinics.net/lists/linux-renesas-soc/msg00066.html
>
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