Re: [PATCH] clk: renesas: r8a77970: add SD0H/SD0 clocks for SDHI

2018-08-28 Thread Geert Uytterhoeven
Hi Sergei, On Tue, Aug 21, 2018 at 6:41 PM Sergei Shtylyov wrote: > On R-Car V3M (AKA R8A77970), the SD0CKCR is laid out differently than on > the other R-Car gen3 SoCs. In fact, the layout is the same as on R-Car gen2 > SoCs, so we'll need to copy the divisor tables from the R-Car gen2 driver.

[PATCH] clk: renesas: r8a77970: add SD0H/SD0 clocks for SDHI

2018-08-21 Thread Sergei Shtylyov
On R-Car V3M (AKA R8A77970), the SD0CKCR is laid out differently than on the other R-Car gen3 SoCs. In fact, the layout is the same as on R-Car gen2 SoCs, so we'll need to copy the divisor tables from the R-Car gen2 driver. We'll also need to support the SoC specific clock types, thus we're adding