On Fri, Nov 04, 2016 at 05:38:53PM +0900, Cao Minh Hiep wrote:
> From: Hiep Cao Minh
>
> Hi,
>
> This patch will improve the DUAL and QUAD's performance of SPI,
> that supported for GEN2 r8a7790 SOC in PIO mode.
> It sends/receives each 32bytes of data instead of each byte
From: Hiep Cao Minh
Hi,
This patch will improve the DUAL and QUAD's performance of SPI,
that supported for GEN2 r8a7790 SOC in PIO mode.
It sends/receives each 32bytes of data instead of each byte data
as current situation.
This patch was developed based on the Mainline