Use recently added R-Car Gen 3 fallback binding for i2c nodes in
DT for r8a7795 SoC.

This has no run-time effect for the current driver as the initialisation
sequence is the same for the SoC-specific binding for r8a7795 and the
fallback binding for R-Car Gen 3.

Signed-off-by: Simon Horman <horms+rene...@verge.net.au>
Reviewed-by: Geert Uytterhoeven <geert+rene...@glider.be>
---
 arch/arm64/boot/dts/renesas/r8a7795.dtsi | 21 ++++++++++++++-------
 1 file changed, 14 insertions(+), 7 deletions(-)

diff --git a/arch/arm64/boot/dts/renesas/r8a7795.dtsi 
b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
index 91a797b18c11..3fe7e0af5989 100644
--- a/arch/arm64/boot/dts/renesas/r8a7795.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
@@ -792,7 +792,8 @@
                i2c0: i2c@e6500000 {
                        #address-cells = <1>;
                        #size-cells = <0>;
-                       compatible = "renesas,i2c-r8a7795";
+                       compatible = "renesas,i2c-r8a7795",
+                                    "renesas,rcar-gen3-i2c";
                        reg = <0 0xe6500000 0 0x40>;
                        interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
                        clocks = <&cpg CPG_MOD 931>;
@@ -806,7 +807,8 @@
                i2c1: i2c@e6508000 {
                        #address-cells = <1>;
                        #size-cells = <0>;
-                       compatible = "renesas,i2c-r8a7795";
+                       compatible = "renesas,i2c-r8a7795",
+                                    "renesas,rcar-gen3-i2c";
                        reg = <0 0xe6508000 0 0x40>;
                        interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
                        clocks = <&cpg CPG_MOD 930>;
@@ -820,7 +822,8 @@
                i2c2: i2c@e6510000 {
                        #address-cells = <1>;
                        #size-cells = <0>;
-                       compatible = "renesas,i2c-r8a7795";
+                       compatible = "renesas,i2c-r8a7795",
+                                    "renesas,rcar-gen3-i2c";
                        reg = <0 0xe6510000 0 0x40>;
                        interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
                        clocks = <&cpg CPG_MOD 929>;
@@ -834,7 +837,8 @@
                i2c3: i2c@e66d0000 {
                        #address-cells = <1>;
                        #size-cells = <0>;
-                       compatible = "renesas,i2c-r8a7795";
+                       compatible = "renesas,i2c-r8a7795",
+                                    "renesas,rcar-gen3-i2c";
                        reg = <0 0xe66d0000 0 0x40>;
                        interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
                        clocks = <&cpg CPG_MOD 928>;
@@ -848,7 +852,8 @@
                i2c4: i2c@e66d8000 {
                        #address-cells = <1>;
                        #size-cells = <0>;
-                       compatible = "renesas,i2c-r8a7795";
+                       compatible = "renesas,i2c-r8a7795",
+                                    "renesas,rcar-gen3-i2c";
                        reg = <0 0xe66d8000 0 0x40>;
                        interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
                        clocks = <&cpg CPG_MOD 927>;
@@ -862,7 +867,8 @@
                i2c5: i2c@e66e0000 {
                        #address-cells = <1>;
                        #size-cells = <0>;
-                       compatible = "renesas,i2c-r8a7795";
+                       compatible = "renesas,i2c-r8a7795",
+                                    "renesas,rcar-gen3-i2c";
                        reg = <0 0xe66e0000 0 0x40>;
                        interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
                        clocks = <&cpg CPG_MOD 919>;
@@ -876,7 +882,8 @@
                i2c6: i2c@e66e8000 {
                        #address-cells = <1>;
                        #size-cells = <0>;
-                       compatible = "renesas,i2c-r8a7795";
+                       compatible = "renesas,i2c-r8a7795",
+                                    "renesas,rcar-gen3-i2c";
                        reg = <0 0xe66e8000 0 0x40>;
                        interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
                        clocks = <&cpg CPG_MOD 918>;
-- 
2.7.0.rc3.207.g0ac5344

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