From: Dien Pham <dien.pham...@renesas.com>

Enables cpuidle (core shutdown) support for R-Car H3 CA53 cores.

Signed-off-by: Dien Pham <dien.pham...@renesas.com>
Signed-off-by: Takeshi Kihara <takeshi.kihara...@renesas.com>
Signed-off-by: Ulrich Hecht <uli+rene...@fpond.eu>
---
 arch/arm64/boot/dts/renesas/r8a7795.dtsi | 14 ++++++++++++++
 1 file changed, 14 insertions(+)

diff --git a/arch/arm64/boot/dts/renesas/r8a7795.dtsi 
b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
index 64ab88a..23f10d3 100644
--- a/arch/arm64/boot/dts/renesas/r8a7795.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
@@ -175,6 +175,7 @@
                        power-domains = <&sysc R8A7795_PD_CA53_CPU0>;
                        next-level-cache = <&L2_CA53>;
                        enable-method = "psci";
+                       cpu-idle-states = <&CPU_SLEEP_1>;
                        clocks =<&cpg CPG_CORE R8A7795_CLK_Z2>;
                        operating-points-v2 = <&cluster1_opp>;
                };
@@ -186,6 +187,7 @@
                        power-domains = <&sysc R8A7795_PD_CA53_CPU1>;
                        next-level-cache = <&L2_CA53>;
                        enable-method = "psci";
+                       cpu-idle-states = <&CPU_SLEEP_1>;
                        clocks =<&cpg CPG_CORE R8A7795_CLK_Z2>;
                        operating-points-v2 = <&cluster1_opp>;
                };
@@ -197,6 +199,7 @@
                        power-domains = <&sysc R8A7795_PD_CA53_CPU2>;
                        next-level-cache = <&L2_CA53>;
                        enable-method = "psci";
+                       cpu-idle-states = <&CPU_SLEEP_1>;
                        clocks =<&cpg CPG_CORE R8A7795_CLK_Z2>;
                        operating-points-v2 = <&cluster1_opp>;
                };
@@ -208,6 +211,7 @@
                        power-domains = <&sysc R8A7795_PD_CA53_CPU3>;
                        next-level-cache = <&L2_CA53>;
                        enable-method = "psci";
+                       cpu-idle-states = <&CPU_SLEEP_1>;
                        clocks =<&cpg CPG_CORE R8A7795_CLK_Z2>;
                        operating-points-v2 = <&cluster1_opp>;
                };
@@ -238,6 +242,16 @@
                                min-residency-us = <4000>;
                                status = "okay";
                        };
+
+                       CPU_SLEEP_1: cpu-sleep-1 {
+                               compatible = "arm,idle-state";
+                               arm,psci-suspend-param = <0x0010000>;
+                               local-timer-stop;
+                               entry-latency-us = <700>;
+                               exit-latency-us = <700>;
+                               min-residency-us = <5000>;
+                               status = "okay";
+                       };
                };
        };
 
-- 
2.7.4

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