From: Khiem Nguyen <khiem.nguyen...@rvc.renesas.com>
Enable cpuidle (core shutdown) support for R-Car M3-W CA57 cores.
Parameters were found after evaluation by gaku.inami...@bp.renesas.com; they
help to keep the performance and reduce the power consumption.
Signed-off-by: Khiem Nguyen <khiem.nguyen...@rvc.renesas.com>
Signed-off-by: Takeshi Kihara <takeshi.kihara...@renesas.com>
[dien.pham.ry: Apply new cpuidle parameters]
Signed-off-by: Dien Pham <dien.pham...@renesas.com>
Signed-off-by: Ulrich Hecht <uli+rene...@fpond.eu>
---
arch/arm64/boot/dts/renesas/r8a7796.dtsi | 16 ++++++++++++++++
1 file changed, 16 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/r8a7796.dtsi
b/arch/arm64/boot/dts/renesas/r8a7796.dtsi
index 258a327..3d30b05 100644
--- a/arch/arm64/boot/dts/renesas/r8a7796.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a7796.dtsi
@@ -134,6 +134,7 @@
power-domains = <&sysc R8A7796_PD_CA57_CPU0>;
next-level-cache = <&L2_CA57>;
enable-method = "psci";
+ cpu-idle-states = <&CPU_SLEEP_0>;
clocks =<&cpg CPG_CORE R8A7796_CLK_Z>;
operating-points-v2 = <&cluster0_opp>;
#cooling-cells = <2>;
@@ -146,6 +147,7 @@
power-domains = <&sysc R8A7796_PD_CA57_CPU1>;
next-level-cache = <&L2_CA57>;
enable-method = "psci";
+ cpu-idle-states = <&CPU_SLEEP_0>;
clocks =<&cpg CPG_CORE R8A7796_CLK_Z>;
operating-points-v2 = <&cluster0_opp>;
#cooling-cells = <2>;
@@ -208,6 +210,20 @@
cache-unified;
cache-level = <2>;
};
+
+ idle-states {
+ entry-method = "psci";
+
+ CPU_SLEEP_0: cpu-sleep-0 {
+ compatible = "arm,idle-state";
+ arm,psci-suspend-param = <0x0010000>;
+ local-timer-stop;
+ entry-latency-us = <400>;
+ exit-latency-us = <500>;
+ min-residency-us = <4000>;
+ status = "okay";
+ };
+ };
};
extal_clk: extal {
--
2.7.4
