On Fri, Mar 10, 2017 at 12:19:07PM +0100, Geert Uytterhoeven wrote:
> Hi Simon,
>
> On Fri, Mar 10, 2017 at 10:21 AM, Simon Horman wrote:
> > On Mon, Mar 06, 2017 at 05:58:05PM +0100, Geert Uytterhoeven wrote:
> >> This patch series improves the topology description in DT of
Hi Simon,
On Fri, Mar 10, 2017 at 10:21 AM, Simon Horman wrote:
> On Mon, Mar 06, 2017 at 05:58:05PM +0100, Geert Uytterhoeven wrote:
>> This patch series improves the topology description in DT of the ARM GIC
>> on Renesas SoCs using the legacy CPG/MSTP bindings (R-Mobile
On Mon, Mar 06, 2017 at 05:58:05PM +0100, Geert Uytterhoeven wrote:
> Hi Simon, Magnus,
>
> This patch series improves the topology description in DT of the ARM GIC
> on Renesas SoCs using the legacy CPG/MSTP bindings (R-Mobile APE6 and
> R-Car Gen2). It describes the INTC-SYS clock, links
Hi Simon, Magnus,
This patch series improves the topology description in DT of the ARM GIC
on Renesas SoCs using the legacy CPG/MSTP bindings (R-Mobile APE6 and
R-Car Gen2). It describes the INTC-SYS clock, links the GIC to its
module clock, and adds the GIC to the SYSC "always on" PM