RE: [PATCH] phy: rcar-gen3-usb3: Initial support for xhci phy

Hi Petre-san, > From: Petre Pircalabu > Sent: Friday, May 19, 2017 8:55 AM > > Hi Shimoda-san, > > I just saw that you patch predates mine. I will drop my version and > integrate yours. I got it! Best regards, Yoshihiro Shimoda > Many thanks for for your support, > Petre

RE: [PATCH] phy: rcar-gen3-usb3: Initial support for xhci phy

Hi Geert-san, > From: Geert Uytterhoeven > Sent: Thursday, May 18, 2017 9:43 PM > > Hi Shimoda-san, > > On Thu, May 18, 2017 at 2:19 PM, Yoshihiro Shimoda > wrote: > >> From: Geert Uytterhoeven > >> Sent: Thursday, May 18, 2017 8:41 PM > >> On Thu, May 18,

Re: [PATCH] phy: rcar-gen3-usb3: Initial support for xhci phy

Hi Shimoda-san, I just saw that you patch predates mine. I will drop my version and integrate yours. Many thanks for for your support, Petre On Fri, May 19, 2017 at 12:50 AM, Petre Pircalabu wrote: > Hi Geert, Shimoda-san, > > I have also used initialy the name

Re: [PATCH] phy: rcar-gen3-usb3: Initial support for xhci phy

Hi Geert, Shimoda-san, I have also used initialy the name "use-xtal-clk" to describe the flag, but I've changed it to "use-on-chip-clk" to make a clear distinction between the on-chip and the external clocks. If you think "usb-extal" is more descriptive I can change he name to this value.

Re: [PATCH] phy: rcar-gen3-usb3: Initial support for xhci phy

Hi Geert, Shimoda-san, First, thank you very much for your comments. I will refactor the patch and send a v2 patchset as soon as possible. To my understanding, although the RCAR Gen3 HW manual references the clk frequencies (50MHz for XTAL and 100MHz for external clock) the actual register

Re: [PATCH] phy: rcar-gen3-usb3: Initial support for xhci phy

Hi Shimoda-san, On Thu, May 18, 2017 at 2:19 PM, Yoshihiro Shimoda wrote: >> From: Geert Uytterhoeven >> Sent: Thursday, May 18, 2017 8:41 PM >> On Thu, May 18, 2017 at 1:13 PM, Yoshihiro Shimoda >> wrote: >> >> >> +- reg:

RE: [PATCH] phy: rcar-gen3-usb3: Initial support for xhci phy

Hi Geert-san, > From: Geert Uytterhoeven > Sent: Thursday, May 18, 2017 8:41 PM > > Hi Shimoda-san, > > On Thu, May 18, 2017 at 1:13 PM, Yoshihiro Shimoda > wrote: > >> >> +- reg: offset and length of the partial USB 3.0 Host PHY register > >> >> block. > >>

Re: [PATCH] phy: rcar-gen3-usb3: Initial support for xhci phy

Hi Shimoda-san, On Thu, May 18, 2017 at 1:13 PM, Yoshihiro Shimoda wrote: >> >> +- reg: offset and length of the partial USB 3.0 Host PHY register block. >> >> +- #phy-cells: see phy-bindings.txt in the same directory, must be <0>. >> > >> > I think we should

RE: [PATCH] phy: rcar-gen3-usb3: Initial support for xhci phy

Hi Geert-san, > -Original Message- > From: Geert Uytterhoeven > Sent: Thursday, May 18, 2017 5:46 PM > > On Thu, May 18, 2017 at 4:53 AM, Yoshihiro Shimoda > wrote: > >> From: Petre Pircalabu > >> The USB30PHY of a RCAR-Gen3 XHCI device can select the

Re: [PATCH] phy: rcar-gen3-usb3: Initial support for xhci phy

On Thu, May 18, 2017 at 4:53 AM, Yoshihiro Shimoda wrote: >> From: Petre Pircalabu >> The USB30PHY of a RCAR-Gen3 XHCI device can select the reference clock >> source. The 2 available options are the differential input clock pair >> supplied on pins USB3S0_CLK_P

RE: [PATCH] phy: rcar-gen3-usb3: Initial support for xhci phy

Hi Petre, Thank you for the patch! I'm also developing a similar driver now :) (I don't submit it though...) My developing driver has SSC and VBUS_EN setting. Anyway, I have some comments about your patch. > -Original Message- > From: Petre Pircalabu > Sent: Thursday, May 18, 2017 2:58