Re: [PATCH 0/3] pinctrl: sh-pfc: add r8a7795 support for voltage switching

> BTW, are these a hard dependency for patch 3, or will the missing power > source control just be ignored? Long answer short: It is a hard dependency. It shouldn't be, but fixing this might need patches to pfc, mmc-core, and sdhi driver. Need to think about it. (and even then, patch 3 will be

Re: [PATCH RFC 1/2] v4l: platform: Add Renesas R-Car FDP1 Driver

Today I learned about make C=1 So ... reviewing my own patch, consider the following sparse warnings 'fixed up' I'll run make C=1 before any future submissions from now on. On 09/06/16 18:37, Kieran Bingham wrote: > The FDP1 driver performs advanced de-interlacing on a memory 2 memory > based

[PATCH 19/19] ARM: dts: kzm9g: Name serial port pfc subnode after device name

Name the Pin Function Controller subnode for SCIFA4 after its device name, instead of after the serial port alias. This avoids conflicts when adding support for more serial ports later, either here or in a DT overlay. Signed-off-by: Geert Uytterhoeven ---

[PATCH 16/19] ARM: dts: alt: Name spi pfc subnode after device name

Name the Pin Function Controller subnode for QSPI after its device name, instead of after the spi interface alias. This avoids conflicts when enabl support for more spi interfaces later, either here or in a DT overlay. Signed-off-by: Geert Uytterhoeven ---

[PATCH 00/19] ARM: dts: renesas: Name pfc subnodes after device names

Hi Simon, Magnus, Currently board DTS files use various naming conventions for the Pin Function Controller subnodes. This may cause conflicts when enabling support for more instances later, either directly in board DT files, or in DT overlays. These conflicts are most likely to happen

[PATCH 11/19] ARM: dts: porter: Name serial port pfc subnode after device name

Name the Pin Function Controller subnode for SCIF0 after its device name, instead of after the serial port alias. This avoids conflicts when enabling support for more serial ports later, either here or in a DT overlay. Signed-off-by: Geert Uytterhoeven ---

[PATCH 01/19] ARM: dts: ape6evm: Name serial port pfc subnode after device name

Name the Pin Function Controller subnode for SCIFA0 after its device name, instead of after the serial port alias. This avoids conflicts when enabling support for more serial ports later, either here or in a DT overlay. Signed-off-by: Geert Uytterhoeven ---

[PATCH 12/19] ARM: dts: porter: Name spi pfc subnode after device name

Name the Pin Function Controller subnode for QSPI after its device name, instead of after the spi interface alias. This avoids conflicts when enabling support for more spi interfaces later, either here or in a DT overlay. Signed-off-by: Geert Uytterhoeven ---

[PATCH 18/19] ARM: dts: silk: Name spi pfc subnode after device name

Name the Pin Function Controller subnode for QSPI after its device name, instead of after the spi interface alias. This avoids conflicts when enabling support for more spi interfaces later, either here or in a DT overlay. Signed-off-by: Geert Uytterhoeven ---

[PATCH 08/19] ARM: dts: lager: Name vin pfc subnode after device name

Name the Pin Function Controller subnode for VIN1 after its device name, instead of using the generic and indexless "vin". This avoids conflicts when enabling support for more video inputs later, either here or in a DT overlay. Signed-off-by: Geert Uytterhoeven ---

Re: [PATCH/RFC v3 02/22] soc: renesas: Add R-Car RST driver

On Friday 10 Jun 2016 09:58:28 Geert Uytterhoeven wrote: > Hi Dirk, > > On Thu, Jun 2, 2016 at 7:42 AM, Dirk Behme wrote: > >> +int __init rcar_rst_read_mode_pins(u32 *mode) > > > > Just a style issue: Is the string 'pins' in the function name still > > relevant? I.e.

[PATCH 09/19] ARM: dts: koelsch: Name serial port pfc subnodes after device names

Name the Pin Function Controller subnodes for SCIF0 and SCIF1 after their device names, instead of after the serial port aliases. This avoids conflicts when enabling support for more serial ports later, either here or in a DT overlay. Signed-off-by: Geert Uytterhoeven

[PATCH 07/19] ARM: dts: lager: Name spi pfc subnodes after device names

Name the Pin Function Controller subnodes for QSPI and MSIOF1 after their device names, instead of after the spi interface aliases. This avoids conflicts when enabling support for more spi interfaces later, either here or in a DT overlay. Signed-off-by: Geert Uytterhoeven

[PATCH 04/19] ARM: dts: bockw: Name serial port pfc subnode after device name

Name the Pin Function Controller subnode for SCIF0 after its device name, instead of after the serial port alias. This avoids conflicts when enabling support for more serial ports later, either here or in a DT overlay. Signed-off-by: Geert Uytterhoeven ---

[PATCH 15/19] ARM: dts: alt: Name serial port pfc subnode after device name

Name the Pin Function Controller subnode for SCIF2 after its device name, instead of using some arbitrary name that looks like a serial port alias, but differs from the actual alias. This avoids conflicts when enabling support for more serial ports later, either here or in a DT overlay.

[PATCH 17/19] ARM: dts: silk: Name serial port pfc subnode after device name

Name the Pin Function Controller subnode for SCIF2 after its device name, instead of using some arbitrary name that looks like a serial port alias, but differs from the actual alias. This avoids conflicts when enabling support for more serial ports later, either here or in a DT overlay.

[PATCH 02/19] ARM: dts: ape6evm: Name mmc pfc subnode after device name

Name the Pin Function Controller subnode for MMC0 after its device name, instead of using the generic and indexless "mmc". This avoids conflicts when enabling support for more MMC interfaces later, either here or in a DT overlay. Signed-off-by: Geert Uytterhoeven ---

[PATCH 03/19] ARM: dts: armadillo800eva: Name serial port pfc subnode after device name

Name the Pin Function Controller subnode for SCIFA1 after its device name, instead of after the serial port alias. This avoids conflicts when enabling support for more serial ports later, either here or in a DT overlay. Signed-off-by: Geert Uytterhoeven ---

[PATCH 14/19] ARM: dts: gose: Name spi pfc subnode after device name

Name the Pin Function Controller subnode for QSPI after its device name, instead of after the spi interface alias. This avoids conflicts when enabl support for more spi interfaces later, either here or in a DT overlay. Signed-off-by: Geert Uytterhoeven ---

[PATCH 10/19] ARM: dts: koelsch: Name spi pfc subnodes after device names

Name the Pin Function Controller subnodes for QSPI and MSIOF0 after their device names, instead of after the spi interface aliases. This avoids conflicts when enabling support for more spi interfaces later, either here or in a DT overlay. Signed-off-by: Geert Uytterhoeven

[PATCH 05/19] ARM: dts: marzen: Name serial port pfc subnodes after device names

Name the Pin Function Controller subnodes for SCIF2 and SCIF4 after their device names, instead of using some arbitrary names that look like serial port aliases, but differ from the actual aliases. This avoids conflicts when enabling support for more serial ports later, either here or in a DT

[PATCH 13/19] ARM: dts: gose: Name serial port pfc subnodes after device names

Name the Pin Function Controller subnodes for SCIF0 and SCIF1 after their device names, instead of after the serial port aliases. This avoids conflicts when enabling support for more serial ports later, either here or in a DT overlay. Signed-off-by: Geert Uytterhoeven

Re: [PATCH 2/3] pinctrl: sh-pfc: Improve core and user API separation

Hi Geert, Thank you for the patch. On Friday 10 Jun 2016 12:05:02 Geert Uytterhoeven wrote: > The Renesas Pin Function Controller uses two header files: > - sh_pfc.h, for use by both core code and SoC-specific drivers, > - core.h, for internal use by the core code only. > > Several

Re: [PATCH] pwm: sysfs: get return value from pwm_apply_state()

On Wed, Jun 08, 2016 at 10:58:23AM +0900, Yoshihiro Shimoda wrote: > From: Ryo Kodama > > This patch adds to check the return value from pwm_apply_state() > used in enable_store(). The error of enable_store() doesn't work > if the return value doesn't received. > >

Re: [PATCH] clk: renesas: r8a7795: Correct lvds clock parent

Hi Geert, Thank you for the patch. On Friday 10 Jun 2016 09:44:33 Geert Uytterhoeven wrote: > According to the latest information, the parent clock of the LVDS module > clock is the S0D4 clock, not the S2D1 clock. > > Note that this change has no influence on actual operation, as the > rcar-du

Re: [PATCH] pinctrl: sh-pfc: sh7757: Fix duplicate initializer in GPIO pinmux data

Hi Geert, Thank you for the patch. On Friday 10 Jun 2016 11:58:19 Geert Uytterhoeven wrote: > With C=1: > > drivers/pinctrl/sh-pfc/pfc-sh7757.c:1613:9: warning: Initializer entry > defined twice drivers/pinctrl/sh-pfc/pfc-sh7757.c:1628:9: also defined > here > > Remove the duplicate

Re: [PATCH v2 06/20] drm: i915: Rely on the default ->best_encoder() behavior where appropriate

On Fri, Jun 10, 2016 at 05:24:12PM +0200, Daniel Vetter wrote: > On Tue, Jun 07, 2016 at 01:48:01PM +0200, Boris Brezillon wrote: > > For all outputs except dp_mst, we have a 1:1 relationship between > > connectors and encoders and the driver is relying on the atomic helpers: > > we can drop the

Re: [PATCH 1/3] dt-bindings: Update Renesas R-Car FCP DT binding

On Thu, Jun 09, 2016 at 02:41:32PM +0100, Kieran Bingham wrote: > The FCP driver, can also support the FCPF variant for FDP1 compatible Drop the comma. > processing. > > Signed-off-by: Kieran Bingham > --- > Documentation/devicetree/bindings/media/renesas,fcp.txt | 4 +++-

Re: [PATCH v1 00/25] PCI: Request host bridge window resources

On Mon, Jun 6, 2016 at 4:04 PM, Bjorn Helgaas wrote: > Several host bridge drivers (designware and all derivatives, iproc, > xgene, xilinx, and xilinx-nwl) don't request the MMIO and I/O port > windows they forward downstream to the PCI bus. > > That means the PCI core can't

Re: [PATCH 2/3] dt-bindings: Document Renesas R-Car FCP power-domains usage

Hi Rob, On Fri, Jun 10, 2016 at 7:39 PM, Rob Herring wrote: > On Thu, Jun 09, 2016 at 02:41:33PM +0100, Kieran Bingham wrote: >> The power domain must be specified to bring the device out of module >> standby. Document this in the example provided, so that new additions >> are

Re: [PATCH 2/3] dt-bindings: Document Renesas R-Car FCP power-domains usage

On Thu, Jun 09, 2016 at 02:41:33PM +0100, Kieran Bingham wrote: > The power domain must be specified to bring the device out of module > standby. Document this in the example provided, so that new additions > are not missed. > > Signed-off-by: Kieran Bingham > --- >

Re: [PATCH 07/13] ARM: dts: r8a7792: initial SoC device tree

On 06/10/2016 04:02 AM, Simon Horman wrote: [...] And that the system behaves sanely on suspend/resume. I'd be thankful if you told me how to test that. :-) System suspend: echo mem > /sys/power/state Oh. I know that one! :-) System resume: You're gonna need a "wakeup-source"

[PATCH] pinctrl: sh-pfc: sh7757: Fix duplicate initializer in GPIO pinmux data

With C=1: drivers/pinctrl/sh-pfc/pfc-sh7757.c:1613:9: warning: Initializer entry defined twice drivers/pinctrl/sh-pfc/pfc-sh7757.c:1628:9: also defined here Remove the duplicate initializer to fix this. Signed-off-by: Geert Uytterhoeven --- Based on the

[PATCH 0/3] pinctrl: sh-pfc: Cleanups

Hi, This series contains various cleanups for the Renesas Pin Function Controller driver subsystem. This has been tested on r8a7791/koelsch, and compile-tested for other ARM and SH platforms. I plan to queue this in sh-pfc-for-v4.8. Thanks for your comments! Geert Uytterhoeven (3):

[PATCH 1/3] pinctrl: sh-pfc: Move SoC-specific forward declarations to sh_pfc.h

With C=1: drivers/pinctrl/sh-pfc/pfc-emev2.c:1695:30: warning: symbol 'emev2_pinmux_info' was not declared. Should it be static? drivers/pinctrl/sh-pfc/pfc-r8a7779.c:3888:30: warning: symbol 'r8a7779_pinmux_info' was not declared. Should it be static? Note that there are more warnings

[PATCH 3/3] pinctrl: sh-pfc: Convert to devm_gpiochip_add_data()

This allows to remove the .remove() callback, and all functions and data it needed for its own bookkeeping. Suggested-by: Laxman Dewangan Signed-off-by: Geert Uytterhoeven --- drivers/pinctrl/sh-pfc/core.c | 10 --

[PATCH 2/3] pinctrl: sh-pfc: Improve core and user API separation

The Renesas Pin Function Controller uses two header files: - sh_pfc.h, for use by both core code and SoC-specific drivers, - core.h, for internal use by the core code only. Several SoC-specific drivers include core.h, as they need the sh_pfc structure, which is passed explicitly to the

[PATCH] arm64: dts: r8a7795: Add missing blank lines between cpu nodes

For consistency with a57_0/a57_1 cpu nodes, and all other nodes. Signed-off-by: Geert Uytterhoeven --- arch/arm64/boot/dts/renesas/r8a7795.dtsi | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm64/boot/dts/renesas/r8a7795.dtsi

Re: [PATCH 07/13] ARM: dts: r8a7792: initial SoC device tree

On 06/10/2016 11:42 PM, Geert Uytterhoeven wrote: The only problem I'm seeing (again) is the RCAN clock failing to register: rcar_gen2_cpg_clocks_init: failed to register cpg_clocks rcan clock (-12) I was going to look at it yesterday but (wrongly) thought it somehow cured itself...

Re: [PATCH 07/13] ARM: dts: r8a7792: initial SoC device tree

Hi Sergei, On Fri, Jun 10, 2016 at 9:29 PM, Sergei Shtylyov wrote: >The only problem I'm seeing (again) is the RCAN clock failing to > register: > > rcar_gen2_cpg_clocks_init: failed to register cpg_clocks rcan clock (-12) > >I was going to look at it

Re: [PATCH 0/2 v2] drm: rcar-du: EPROBE_DEFER case doesn't need error message

Hi Morimoto-san, On Wednesday 25 May 2016 00:38:48 Kuninori Morimoto wrote: > Hi David, Laurent > > These removes unneeded error message from Renesas DU driver. > Current this unneeded error message makes user confuse. Thank you for the patches. For both of them, Reviewed-by: Laurent Pinchart

Re: [PATCH 2/3] dt-bindings: Document Renesas R-Car FCP power-domains usage

On Fri, Jun 10, 2016 at 2:11 PM, Geert Uytterhoeven wrote: > Hi Rob, > > On Fri, Jun 10, 2016 at 7:39 PM, Rob Herring wrote: >> On Thu, Jun 09, 2016 at 02:41:33PM +0100, Kieran Bingham wrote: >>> The power domain must be specified to bring the device out of

Re: [PATCH 0/3] pinctrl: sh-pfc: add r8a7795 support for voltage switching

Hi Wolfram, On Mon, Jun 6, 2016 at 6:08 PM, Wolfram Sang wrote: > This series adds support for PFC voltage switching for r8a7795. I decided to > refactor voltage switching because all Gen2 and Gen3 hardware follow the same > style to do that. So, we can put generic handling

Re: [PATCH v2 2/4] clk: renesas: Add r8a7796 CPG Core Clock Definitions

Hi Geert, On 09.06.2016 10:54, Geert Uytterhoeven wrote: Hi Dirk, On Thu, Jun 9, 2016 at 10:31 AM, Dirk Behme wrote: On 07.06.2016 10:17, Geert Uytterhoeven wrote: On Tue, Jun 7, 2016 at 9:53 AM, Dirk Behme wrote: I think I just want to

Re: [PATCH] clk: renesas: r8a7795: Provide FDP1 clocks

Hi Kieran, On Thu, Jun 9, 2016 at 6:12 PM, Kieran Bingham wrote: > Reviewed-by: Geert Uytterhoeven > Reviewed-by: Laurent Pinchart > Signed-off-by: Kieran Bingham > --- >

Re: [PATCH 1/2] arm64: dts: r8a7795: add FCPF device nodes

On Thu, Jun 9, 2016 at 6:56 PM, Kieran Bingham wrote: > Provide nodes for the FCP devices dedicated to the FDP device channels. > > Signed-off-by: Kieran Bingham Reviewed-by: Geert Uytterhoeven Gr{oetje,eeting}s,

[PATCH] clk: renesas: r8a7795: Correct lvds clock parent

According to the latest information, the parent clock of the LVDS module clock is the S0D4 clock, not the S2D1 clock. Note that this change has no influence on actual operation, as the rcar-du LVDS encoder driver doesn't use the parent clock's rate. Signed-off-by: Geert Uytterhoeven

Re: [PATCH/RFC v3 01/22] reset: Add renesas,rst DT bindings

Hi Laurent, On Thu, Jun 2, 2016 at 11:47 PM, Laurent Pinchart wrote: >> --- /dev/null >> +++ b/Documentation/devicetree/bindings/reset/renesas,rst.txt >> @@ -0,0 +1,35 @@ >> +DT bindings for the Renesas R-Car Reset Controller >> + >> +The R-Car Reset Controller

Re: [PATCH/RFC v3 02/22] soc: renesas: Add R-Car RST driver

Hi Laurent, On Thu, Jun 2, 2016 at 11:58 PM, Laurent Pinchart wrote: >> --- /dev/null >> +++ b/drivers/soc/renesas/rcar-rst.c >> +static int __init rcar_rst_init(void) >> +{ [...] >> +} >> +arch_initcall(rcar_rst_init); > > Given that rcar_rst_init() is only

Re: [PATCH/RFC v3 02/22] soc: renesas: Add R-Car RST driver

Hi Dirk, On Thu, Jun 2, 2016 at 7:42 AM, Dirk Behme wrote: >> +int __init rcar_rst_read_mode_pins(u32 *mode) > > Just a style issue: Is the string 'pins' in the function name still > relevant? I.e. what's about just 'rcar_rst_read_mode()'? I feel "mode" is a too generic

Re: [PATCH/RFC v3 02/22] soc: renesas: Add R-Car RST driver

On 10.06.2016 09:58, Geert Uytterhoeven wrote: Hi Dirk, On Thu, Jun 2, 2016 at 7:42 AM, Dirk Behme wrote: +int __init rcar_rst_read_mode_pins(u32 *mode) Just a style issue: Is the string 'pins' in the function name still relevant? I.e. what's about just

Re: [PATCH v2 06/20] drm: i915: Rely on the default ->best_encoder() behavior where appropriate

On Tue, Jun 07, 2016 at 01:48:01PM +0200, Boris Brezillon wrote: > For all outputs except dp_mst, we have a 1:1 relationship between > connectors and encoders and the driver is relying on the atomic helpers: > we can drop the custom ->best_encoder() implementation and let the core > call

Re: [PATCH v2 00/20] drm/atomic: Provide default ->best_encoder() behavior

On Tue, Jun 07, 2016 at 01:47:55PM +0200, Boris Brezillon wrote: > Hello, > > This patch series aims at replacing all dummy ->best_encoder() > implementations where we have a 1:1 relationship between encoders > and connectors. > The core already provides the drm_atomic_helper_best_encoder() >

[PATCH] pinctrl: sh-pfc: fix property name in bindings doc

From: Wolfram Sang It must be "drive-strength", with a hyphen. Signed-off-by: Wolfram Sang --- Documentation/devicetree/bindings/pinctrl/renesas,pfc-pinctrl.txt | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff