On Thu, Apr 20, 2017 at 11:46:57PM +0900, Magnus Damm wrote:
> From: Magnus Damm
>
> r8a7792 Blanche has depending on dip switch and jumper settings
> either HSCIF0 or CAN0 exposed on the on-board CN5 connector.
>
> This patch adds HSCIF0 to the Blanche dts as
On Thu, Apr 20, 2017 at 09:51:32PM +0300, Sergei Shtylyov wrote:
> Hello.
>
>Here's the set of 3 patches against Simon Horman's 'renesas.git' repo,
> 'renesas-devel-20170420-v4.11-rc7' tag. We're adding the R8A7743 PFC node
> and then describing the pins for SCIF0 and Ether devices declared
On Sat, Apr 22, 2017 at 10:49 AM, Rob Landley wrote:
>
>
> On 04/21/2017 02:26 AM, Geert Uytterhoeven wrote:
>> According to the SH7751R datasheet, SCFCR does have the RTRG1 and RTRG0 bits.
>> I assume the problem goes away if you comment out the call to
>> scif_set_rtrg()?
>
>
On Fri, Apr 21, 2017 at 2:55 PM, Geert Uytterhoeven
wrote:
> Geert Uytterhoeven (5):
> arm64: renesas: r8a7796: Add external audio clocks
> arm64: renesas: r8a7796: Add external PCIe bus clock
Oops, the above should have had the proper "arm64: dts:" prefix.
>
Add node for the GyroADC block and it's associated clock.
Signed-off-by: Marek Vasut
Cc: Geert Uytterhoeven
Cc: Simon Horman
To: linux-renesas-soc@vger.kernel.org
---
V2: - Drop the whole ad-hoc ADC clock block
From: Kieran Bingham
The unbind function dereferences the subdev->dev node to obtain the
of_node. In error paths, the subdev->dev can be set to NULL, whilst the
correct reference to the of_node is available as subdev->of_node.
Correct the dereferencing,
On Mon, Apr 24, 2017 at 1:06 PM, Geert Uytterhoeven
wrote:
> The following changes since commit d14a39edf757f5bdd73cf25d0155d7cfb271e782:
>
> pinctrl: sh-pfc: r8a7795: Add SCIF_CLK support (2017-03-30 13:43:55 +0200)
>
> are available in the git repository at:
>
>
On 04/23, Geert Uytterhoeven wrote:
> Hi Stephen,
>
> On Sat, Apr 22, 2017 at 4:10 AM, Stephen Boyd wrote:
> > On 04/20, Yoshihiro Kaneko wrote:
> >> From: Gaku Inami
> >>
> >> In the resume process, there is the case that other drivers call
>
From: Dan Carpenter
Date: Sat, 22 Apr 2017 13:46:56 +0300
> If skb_put_padto() fails then it frees the skb. I shifted that code
> up a bit to make my error handling a little simpler.
>
> Fixes: a0d2f20650e8 ("Renesas Ethernet AVB PTP clock driver")
> Signed-off-by:
From: Kieran Bingham
The current code determines the pad from the identifiers in the DTB.
This is accepted without bounds in the driver.
Invalid port/reg addresses defined in the DTB will cause a kernel panic
when dereferencing non-existing pads.
On Fri, Apr 21, 2017 at 09:50:39AM +0200, John Paul Adrian Glaubitz wrote:
> On 04/21/2017 09:26 AM, Geert Uytterhoeven wrote:
> > Does anyone have access to real hardware to try?
> > Adrian: does it work on your LANDISK, which also has SH7751R?
>
> I can give it a try but that will take a few
On Fri, Apr 21, 2017 at 09:26:04AM +0200, Ulrich Hecht wrote:
> On Thu, Apr 20, 2017 at 7:51 PM, Geert Uytterhoeven
> wrote:
> > And we already have a correct v3 from you in patchwork:
> > https://patchwork.kernel.org/patch/8711801/
>
> Whoops...
>
> In my defense, that
On Fri, Apr 21, 2017 at 03:59:10PM +0200, Geert Uytterhoeven wrote:
> Hi Kaneko-san, and Mike, Stephen (see below),
>
> On Wed, Apr 19, 2017 at 7:46 PM, Yoshihiro Kaneko
> wrote:
> > From: Takeshi Kihara
> >
> > This patch adds Z clock
On Thu, Apr 20, 2017 at 8:35 PM, Geert Uytterhoeven
wrote:
> On Wed, Apr 19, 2017 at 7:46 PM, Yoshihiro Kaneko
> wrote:
>> From: Hiromitsu Yamasaki
>>
>> This patch adds A-DMAC{0,1} clocks for R8A7796 SoC.
>>
>>
Hi Simon,
On Monday 24 Apr 2017 09:49:01 Simon Horman wrote:
> On Fri, Apr 21, 2017 at 09:26:04AM +0200, Ulrich Hecht wrote:
> > On Thu, Apr 20, 2017 at 7:51 PM, Geert Uytterhoeven wrote:
> > > And we already have a correct v3 from you in patchwork:
> > >
Hi Peter,
On Mon, Apr 24, 2017 at 10:03 AM, Peter De Schrijver
wrote:
>> > --- a/drivers/clk/renesas/rcar-gen3-cpg.c
>> > +++ b/drivers/clk/renesas/rcar-gen3-cpg.c
>>
>> > +static unsigned long cpg_z_clk_recalc_rate(struct clk_hw *hw,
>> > +
Hi Ulrich,
On Monday 24 Apr 2017 10:22:31 Ulrich Hecht wrote:
> On Mon, Apr 24, 2017 at 9:59 AM, Laurent Pinchart wrote:
> > How about using pwm1 for backlight as done in "[PATCH v2 09/13] arm64:
> > dts: r8a7795: salvator-x: Add panel backlight support" ?
>
> Makes sense. Simon, should that go
On Mon, Apr 24, 2017 at 10:51 AM, Simon Horman
wrote:
> The device trees for Renesas SoCs use either pfc or pin-controller
> as the node name for the PFC device. This patch is intended to take a step
> towards unifying the node name used as pin-controller which appears
On Mon, Apr 24, 2017 at 9:49 AM, Simon Horman wrote:
> Given it was over a year ago I hope you can understand that I don't recall
> why this wasn't accepted.
I didn't remember having sent it myself, so, yes, I do understand. :)
I just thought there might be something obvious
The device trees for Renesas SoCs use either pfc or pin-controller
as the node name for the PFC device. This patch is intended to take a step
towards unifying the node name used as pin-controller which appears to
be more the more generic of the two and thus more in keeping with the DT
specs.
My
On Thu, Apr 20, 2017 at 7:53 PM, Geert Uytterhoeven
wrote:
> On Wed, Apr 19, 2017 at 7:46 PM, Yoshihiro Kaneko
> wrote:
>> From: Ryo Kodama
>>
>> This patch adds PWM clock for PWM.
>>
>> Signed-off-by: Ryo Kodama
On Mon, Apr 24, 2017 at 10:35 AM, Laurent Pinchart
wrote:
> Hi Ulrich,
>
> On Monday 24 Apr 2017 10:22:31 Ulrich Hecht wrote:
>> On Mon, Apr 24, 2017 at 9:59 AM, Laurent Pinchart wrote:
>> > How about using pwm1 for backlight as done in "[PATCH v2 09/13] arm64:
On Mon, Apr 24, 2017 at 9:59 AM, Laurent Pinchart
wrote:
> How about using pwm1 for backlight as done in "[PATCH v2 09/13] arm64: dts:
> r8a7795: salvator-x: Add panel backlight support" ?
Makes sense. Simon, should that go in a separate patch, or should I
add
On 04/24/2017 02:23 AM, Ulrich Hecht wrote:
> On Sat, Apr 22, 2017 at 10:49 AM, Rob Landley wrote:
>> On 04/21/2017 02:26 AM, Geert Uytterhoeven wrote:
>>> According to the SH7751R datasheet, SCFCR does have the RTRG1 and RTRG0
>>> bits.
>>> I assume the problem goes away if
On Sun, 16 Apr 2017, Marek Vasut wrote:
> Add the MFD part of the ROHM BD9571MWV-M PMIC driver and MAINTAINERS
> entry. The MFD part only specifies the regmap bits for the PMIC and
> binds the subdevs together.
>
> Signed-off-by: Marek Vasut
> Cc:
Hi Linus,
The following changes since commit d14a39edf757f5bdd73cf25d0155d7cfb271e782:
pinctrl: sh-pfc: r8a7795: Add SCIF_CLK support (2017-03-30 13:43:55 +0200)
are available in the git repository at:
git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers.git
On Sun, Apr 16, 2017 at 8:08 PM, Marek Vasut wrote:
> Add driver for the GPIO block in the ROHM BD9571MWV-W MFD PMIC.
> This block is pretty trivial and supports setting GPIO direction
> as Input/Output and in case of Output, supports setting value.
>
> Signed-off-by:
From: Wei Yongjun
In case of error, the function devm_ioremap_resource() returns ERR_PTR()
and never returns NULL. The NULL test in the return value check should
be replaced with IS_ERR().
Signed-off-by: Wei Yongjun
---
On 04/24/2017 01:38 PM, Lee Jones wrote:
> On Sun, 16 Apr 2017, Marek Vasut wrote:
[...]
>> +static int bd9571mwv_identify(struct bd9571mwv *bd)
>> +{
>> +struct device *dev = bd->dev;
>> +unsigned int value;
>> +int ret;
>> +
>> +ret = regmap_read(bd->regmap,
On 04/24/2017 03:55 PM, Linus Walleij wrote:
> On Sun, Apr 16, 2017 at 8:08 PM, Marek Vasut wrote:
>
>> Add driver for the GPIO block in the ROHM BD9571MWV-W MFD PMIC.
>> This block is pretty trivial and supports setting GPIO direction
>> as Input/Output and in case of
On 04/20/2017 07:26 PM, Geert Uytterhoeven wrote:
> Hi Marek,
Hi!
> On Thu, Apr 20, 2017 at 5:44 PM, Marek Vasut wrote:
>> Add node for the GyroADC block and it's associated clock.
>>
>> Signed-off-by: Marek Vasut
>> Cc: Geert Uytterhoeven
Add DT bindings for the ROHM BD9571MWV-M PMIC. This PMIC has
the following features:
- multiple voltage monitors for 1V8, 2V5, 3V3 voltage rail
- one voltage regulator for DVFS
- two GPIOs
Signed-off-by: Marek Vasut
Cc: devicet...@vger.kernel.org
Cc: Rob Herring
Add the MFD part of the ROHM BD9571MWV-M PMIC driver and MAINTAINERS
entry. The MFD part only specifies the regmap bits for the PMIC and
binds the subdevs together.
Signed-off-by: Marek Vasut
Cc: linux-ker...@vger.kernel.org
Cc: Geert Uytterhoeven
Add driver for the GPIO block in the ROHM BD9571MWV-W MFD PMIC.
This block is pretty trivial and supports setting GPIO direction
as Input/Output and in case of Output, supports setting value.
Signed-off-by: Marek Vasut
Cc: linux-g...@vger.kernel.org
Cc: Geert
Add driver for the regulator block in the ROHM BD9571MWV-W MFD PMIC.
This block supports three voltage monitors, VD18, VD25, VD33 for the
1V8, 2V5, 3V3 voltage rails and a single voltage regulator for the
DVFS rail.
Signed-off-by: Marek Vasut
Cc:
35 matches
Mail list logo