Hi Simon,
On Thu, Feb 15, 2018 at 4:02 PM, Simon Horman wrote:
> On Wed, Feb 14, 2018 at 11:25:19AM +0100, Geert Uytterhoeven wrote:
>> On Mon, Feb 12, 2018 at 4:44 PM, Simon Horman
>> wrote:
>> > Add symbols for Gen3 register offsets.
>> > These
On Thu, Feb 15, 2018 at 4:56 PM, Simon Horman wrote:
> On Thu, Feb 15, 2018 at 04:39:49PM +0100, Simon Horman wrote:
>> On Tue, Feb 13, 2018 at 10:45:53AM +0100, Jacopo Mondi wrote:
>> > Add documentation for r8a77965 compatible string to rcar-dmac device
>> > tree bindings
Hi Jacopo,
On Tue, Feb 13, 2018 at 10:45 AM, Jacopo Mondi
wrote:
> --- /dev/null
> +++ b/arch/arm64/boot/dts/renesas/r8a77965.dtsi
> @@ -0,0 +1,495 @@
> +// SPDX-License-Identifier: GPL-2.
> +/*
> + * Device Tree Source for the r8a77965 SoC
> + *
> + * Copyright (C)
Hi Simon,
On Thu, Feb 15, 2018 at 4:31 PM, Simon Horman wrote:
> On Tue, Feb 13, 2018 at 10:45:49AM +0100, Jacopo Mondi wrote:
>> Initial support for R-Car M3-N (r8a77965), including core and module
>> clocks.
>>
>> Signed-off-by: Jacopo Mondi
>>
Porter needs the regulator quirk, just like the other boards,
the DA9063 and DA9210 IRQ line is connected to CPU IRQ2 . But
unlike the other boards, the DA9063 is at 0x5a on Porter.
Signed-off-by: Marek Vasut
Cc: Geert Uytterhoeven
Cc:
Pull the complex condition in regulator_quirk_notify() into
regulator_quirk_check(). Moreover, do not hard-code the I2C
address, but rather use the one in da9xxx_msgs[].
Signed-off-by: Marek Vasut
Cc: Geert Uytterhoeven
Cc: Kuninori
Add PMIC nodes to Porter and connect CPU DVFS supply. There is
one DA9063 and one DA9210 on Porter, the only difference from
the other boards is that DA9063 is at I2C address 0x5a rather
than 0x58 .
Signed-off-by: Marek Vasut
Cc: Geert Uytterhoeven
From: Kieran Bingham
Enable the DU, providing only the VGA output for now.
Signed-off-by: Kieran Bingham
Reviewed-by: Laurent Pinchart
---
Just a v2 update to fix the PFC
Hi Jacopo,
On Tue, Feb 13, 2018 at 10:45 AM, Jacopo Mondi
wrote:
> Add initial support for R-Car M3-N Salvator-x and r8a77965 SoC in
> device tree with cpg-mssr, reset and clock nodes.
>
> Add place-holder device nodes for all nodes referred by
> "salvator-common.dtsi"
Hi Laurent,
On 15/02/18 14:16, Laurent Pinchart wrote:
> Hi Kieran,
>
> Thank you for the patch.
>
> On Thursday, 15 February 2018 10:38:22 EET Kieran Bingham wrote:
>> From: Kieran Bingham
>>
>> Provide a device node for the ADV7511 as found on the Draak D3
On Wed, Feb 14, 2018 at 09:55:07AM +, Kieran Bingham wrote:
> From: Kieran Bingham
>
> The VSPD includes a CLUT on RPF2. Ensure that the register space is
> mapped correctly to support this.
>
> Signed-off-by: Kieran Bingham
On Fri, Feb 16, 2018 at 12:32:35PM +, Kieran Bingham wrote:
> From: Kieran Bingham
>
> Enable the DU, providing only the VGA output for now.
>
> Signed-off-by: Kieran Bingham
> Reviewed-by: Laurent Pinchart
Allow for changing the MTU within the limit of the maximum size of a
descriptor (2048 bytes). Add the callback to change MTU from user-space
and take the configurable MTU into account when configuring the
hardware.
Signed-off-by: Niklas Söderlund
---
On Wed, Feb 14, 2018 at 09:55:08AM +, Kieran Bingham wrote:
> From: Kieran Bingham
>
> The VSPD includes a CLUT on RPF2. Ensure that the register space is
> mapped correctly to support this.
>
> Signed-off-by: Kieran Bingham
On Wed, Feb 14, 2018 at 12:08:56PM +0200, Laurent Pinchart wrote:
> Hi Kieran,
>
> Thank you for the patch.
>
> On Wednesday, 14 February 2018 11:55:06 EET Kieran Bingham wrote:
> > From: Kieran Bingham
> >
> > The VSPD includes a CLUT on RPF2. Ensure
From: Takeshi Kihara
This patch adds TMU TCLK{1,2} pins, groups and functions to
the R8A7795 SoC.
Signed-off-by: Takeshi Kihara
Signed-off-by: Ulrich Hecht
---
drivers/pinctrl/sh-pfc/pfc-r8a7795.c |
Hi!
Straight from the BSP, TMU pins for r8a7795{,-es1} and r8a7796. Magic
numbers verified according to "pinfunction" document revisions 0.54 (M3-W)
and 0.553 (H3).
CU
Uli
Takeshi Kihara (3):
pinctrl: sh-pfc: r8a7795: Add TMU pins, groups and functions
pinctrl: sh-pfc: r8a7795-es1: Add TMU
From: Takeshi Kihara
This patch adds TMU TCLK{1,2} pins, groups and functions to
the R8A7796 SoC.
Signed-off-by: Takeshi Kihara
Signed-off-by: Ulrich Hecht
---
drivers/pinctrl/sh-pfc/pfc-r8a7796.c |
From: Takeshi Kihara
This patch adds TMU TCLK{1,2} pins, groups and functions to
the R8A7795 ES1.x SoC.
Signed-off-by: Takeshi Kihara
Signed-off-by: Ulrich Hecht
---
On Thu, Feb 15, 2018 at 2:12 PM, Wolfram Sang wrote:
>
>> This can be prevented by doing a dummy read of the RX data register.
>
> Just so I understand the issue correctly: We are reading the register to
> throw the content away to prevent it being used in the TTY buffers?
Hi!
This series contains fixes to the PFC register definitions for r8a7795 and
r8a7796 from the BSP that are not upstream yet.
As far as I could tell, these changes check out with the Gen3 datasheet
revision 0.80.
CU
Uli
Takeshi Kihara (3):
pinctrl: sh-pfc: r8a7795: Fix MOD_SEL register pin
From: Takeshi Kihara
This patch fixes to set IPSR and MOD_SEL when using NFDATA{14,15}_A and
NF{RB,WP}_N_A pin function is selected. And renamess MOD_SEL2 bit22 value
definition name to SEL_NDFC.
This is a correction to the incorrect implementation of MOD_SEL
From: Takeshi Kihara
This patch adds HDMI0 CEC pin, group and function to the R8A7796 SoC.
Signed-off-by: Takeshi Kihara
Signed-off-by: Ulrich Hecht
---
drivers/pinctrl/sh-pfc/pfc-r8a7796.c | 15
From: Takeshi Kihara
This patch adds HDMI0 CEC pin, group and function to the R8A7795 SoC.
Signed-off-by: Takeshi Kihara
[uli: fixed typo in comment]
Signed-off-by: Ulrich Hecht
---
From: Takeshi Kihara
This patch fixes MOD_SEL1 bit20 and MOD_SEL2 bit20, bit21 pin assignment
for SSI pins group.
This is a correction to the incorrect implementation of MOD_SEL register
pin assignment for R8A7796 SoC specification of R-Car Gen3 Hardware
User's
From: Takeshi Kihara
This patch fixes MOD_SEL1 bit20 and MOD_SEL2 bit20, bit21 pin assignment
for SSI pins group.
This is a correction because MOD_SEL register specification for R8A7795
ES2.0 SoC was changed in R-Car Gen3 Hardware User's Manual Rev.0.53E.
Fixes:
From: Takeshi Kihara
This patch adds HDMI0 CEC pin, group and function to
the R8A7795 ES1.x SoC.
Signed-off-by: Takeshi Kihara
[uli: fixed typo in comment]
Signed-off-by: Ulrich Hecht
---
Hi!
Straight from the BSP, HDMI pins for r8a7795{,-es1} and r8a7796. Magic
numbers verified according to "pinfunction" document revisions 0.54 (M3-W)
and 0.553 (H3).
CU
Uli
Takeshi Kihara (3):
pinctrl: sh-pfc: r8a7795: Add HDMI pins, groups and functions
pinctrl: sh-pfc: r8a7795-es1: Add
When we build this driver with on x86-32, gcc produces a false-positive warning:
drivers/clk/renesas/clk-sh73a0.c: In function 'sh73a0_cpg_clocks_init':
drivers/clk/renesas/clk-sh73a0.c:155:10: error: 'parent_name' may be used
uninitialized in this function [-Werror=maybe-uninitialized]
On 02/16/2018 11:43 AM, Sergei Shtylyov wrote:
> Hello!
>
> On 02/16/2018 10:42 PM, Florian Fainelli wrote:
>
>>> Allow for changing the MTU within the limit of the maximum size of a
>>> descriptor (2048 bytes). Add the callback to change MTU from user-space
>>> and take the configurable MTU
Hello!
On 02/16/2018 10:42 PM, Florian Fainelli wrote:
>> Allow for changing the MTU within the limit of the maximum size of a
>> descriptor (2048 bytes). Add the callback to change MTU from user-space
>> and take the configurable MTU into account when configuring the
>> hardware.
>>
>>
On 02/16/2018 08:10 AM, Niklas Söderlund wrote:
> Allow for changing the MTU within the limit of the maximum size of a
> descriptor (2048 bytes). Add the callback to change MTU from user-space
> and take the configurable MTU into account when configuring the
> hardware.
>
> Signed-off-by: Niklas
According to the figure 9.2(b) of the R-Car Series, 3rd Generation User’s
Manual: Hardware Rev. 0.80 the A2IRn and A2SCn power areas in R8A77970 have
the A3IR area as a parent, thus the SYSC driver has those parents wrong...
Fixes: bab9b2a74fe9 ("soc: renesas: rcar-sysc: add R8A77970 support")
Hello!
Here's the set of 11 patches against Simon Horman's 'renesas.git' repo's
'renesas-devel-20180216-v4.16-rc1' tag. I'm adding the device tree support
for the R8A77980-based Condor board (note that NFS root would only work on
the Condor boards [re]wired for booting from EtherAVB -- we haven't
Describe [H]SCIF ports in the R8A77980 device tree.
Based on the original (and large) patch by Vladimir Barinov.
Signed-off-by: Vladimir Barinov
Signed-off-by: Sergei Shtylyov
Reviewed-by: Geert Uytterhoeven
Define the generic R8A77980 part of the EtherAVB device node.
Based on the original (and large) patch by Vladimir Barinov.
Signed-off-by: Vladimir Barinov
Signed-off-by: Sergei Shtylyov
---
Changes in version 2:
-
Add support for R-Car V3H (R8A77980) SoC power areas to the R-Car SYSC
driver.
Based on the original (and large) patch by Vladimir Barinov.
Signed-off-by: Vladimir Barinov
Signed-off-by: Sergei Shtylyov
Reviewed-by: Geert
Add the initial device tree for the R8A77980 SoC based Condor board.
The board has 1 debug serial port (SCIF0); include support for it, so
that the serial console can work.
Based on the original (and large) patch by Vladimir Barinov.
Signed-off-by: Vladimir Barinov
Define the Condor board dependent part of the EtherAVB device node.
Based on the original (and large) patch by Vladimir Barinov.
Signed-off-by: Vladimir Barinov
Signed-off-by: Sergei Shtylyov
---
Changes in version 2:
-
On Thu, Feb 15, 2018 at 01:02:27PM +0100, Ulrich Hecht wrote:
> When the TTY buffers fill up to the configured maximum, a system lockup
> occurs:
>
> [ 598.820128] INFO: rcu_preempt detected stalls on CPUs/tasks:
> [ 598.825796] 0-...!: (1 GPs behind) idle=5a6/2/0 softirq=1974/1974 fqs=1
> [
From: Niklas Söderlund
Date: Fri, 16 Feb 2018 17:10:08 +0100
> Allow for changing the MTU within the limit of the maximum size of a
> descriptor (2048 bytes). Add the callback to change MTU from user-space
> and take the configurable MTU into account when
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