[PATCH 0/3] Add R8A77980/Condor/V3HSK GPIO support
Hello! Here's the set of 3 patches against Simon Horman's 'renesas.git' repo's 'renesas-devel-20180529-v4.17-rc7' tag plus the I2C patches reposted yesterday. We're adding the R8A77980 GPIO nodes and then describing the PHY IRQ for the GEther/EtherAVB devices declared earlier. [1/3] arm64: dts: renesas: r8a77980: add GPIO support [2/3] arm64: dts: renesas: condor: specify EtherAVB PHY IRQ [3/3] arm64: dts: renesas: v3hsk: specify GEther PHY IRQ WBR, Sergei
[PATCH 3/3] arm64: dts: renesas: v3hsk: specify GEther PHY IRQ
Specify GEther PHY IRQ in the V3H Starter Kit board's device tree, now
that we have the GPIO support (previously phylib had to resort to polling).
Based on the original (and large) patch by Vladimir Barinov.
Signed-off-by: Vladimir Barinov
Signed-off-by: Sergei Shtylyov
---
arch/arm64/boot/dts/renesas/r8a77980-v3hsk.dts |2 ++
1 file changed, 2 insertions(+)
Index: renesas/arch/arm64/boot/dts/renesas/r8a77980-v3hsk.dts
===
--- renesas.orig/arch/arm64/boot/dts/renesas/r8a77980-v3hsk.dts
+++ renesas/arch/arm64/boot/dts/renesas/r8a77980-v3hsk.dts
@@ -48,6 +48,8 @@
phy0: ethernet-phy@0 {
reg = <0>;
+ interrupt-parent = <>;
+ interrupts = <23 IRQ_TYPE_LEVEL_LOW>;
};
};
Re: [PATCH v4 6/6] PCI: rcar: Shut the PHY down in failpath
On 05/28/2018 10:48 AM, Simon Horman wrote:
> On Thu, May 24, 2018 at 04:36:24PM +0200, Marek Vasut wrote:
>> If anything fails past phy_init_fn() and the system is a Gen3 with
>> a PHY, the PHY will be left on and inited. This is caused by the
>> phy_init_fn, which is in fact a pointer to rcar_pcie_phy_init_gen3()
>> function, which starts the PHY, yet has no counterpart in the failpath.
>> Add that counterpart.
>>
>> Signed-off-by: Marek Vasut
>> Cc: Geert Uytterhoeven
>> Cc: Lorenzo Pieralisi
>> Cc: Phil Edworthy
>> Cc: Simon Horman
>> Cc: Wolfram Sang
>> Cc: linux-renesas-soc@vger.kernel.org
>> Fixes: 517ca93a7159 ("PCI: rcar: Add R-Car gen3 PHY support")
>
> Acked-by: Simon Horman
While I see the first 5 in today's next, I don't see this one there, so
it'd be nice to add it too.
--
Best regards,
Marek Vasut
[PATCH 1/3] arm64: dts: renesas: r8a77980: add GPIO support
Describe all 6 GPIO controllers in the R8A77980 device tree.
Based on the original (and large) patch by Vladimir Barinov.
Signed-off-by: Vladimir Barinov
Signed-off-by: Sergei Shtylyov
---
arch/arm64/boot/dts/renesas/r8a77980.dtsi | 90 ++
1 file changed, 90 insertions(+)
Index: renesas/arch/arm64/boot/dts/renesas/r8a77980.dtsi
===
--- renesas.orig/arch/arm64/boot/dts/renesas/r8a77980.dtsi
+++ renesas/arch/arm64/boot/dts/renesas/r8a77980.dtsi
@@ -118,6 +118,96 @@
#size-cells = <2>;
ranges;
+ gpio0: gpio@e605 {
+ compatible = "renesas,gpio-r8a77980",
+"renesas,rcar-gen3-gpio";
+ reg = <0 0xe605 0 0x50>;
+ interrupts = ;
+ #gpio-cells = <2>;
+ gpio-controller;
+ gpio-ranges = < 0 0 22>;
+ #interrupt-cells = <2>;
+ interrupt-controller;
+ clocks = < CPG_MOD 912>;
+ power-domains = < R8A77980_PD_ALWAYS_ON>;
+ resets = < 912>;
+ };
+
+ gpio1: gpio@e6051000 {
+ compatible = "renesas,gpio-r8a77980",
+"renesas,rcar-gen3-gpio";
+ reg = <0 0xe6051000 0 0x50>;
+ interrupts = ;
+ #gpio-cells = <2>;
+ gpio-controller;
+ gpio-ranges = < 0 32 28>;
+ #interrupt-cells = <2>;
+ interrupt-controller;
+ clocks = < CPG_MOD 911>;
+ power-domains = < R8A77980_PD_ALWAYS_ON>;
+ resets = < 911>;
+ };
+
+ gpio2: gpio@e6052000 {
+ compatible = "renesas,gpio-r8a77980",
+"renesas,rcar-gen3-gpio";
+ reg = <0 0xe6052000 0 0x50>;
+ interrupts = ;
+ #gpio-cells = <2>;
+ gpio-controller;
+ gpio-ranges = < 0 64 30>;
+ #interrupt-cells = <2>;
+ interrupt-controller;
+ clocks = < CPG_MOD 910>;
+ power-domains = < R8A77980_PD_ALWAYS_ON>;
+ resets = < 910>;
+ };
+
+ gpio3: gpio@e6053000 {
+ compatible = "renesas,gpio-r8a77980",
+"renesas,rcar-gen3-gpio";
+ reg = <0 0xe6053000 0 0x50>;
+ interrupts = ;
+ #gpio-cells = <2>;
+ gpio-controller;
+ gpio-ranges = < 0 96 17>;
+ #interrupt-cells = <2>;
+ interrupt-controller;
+ clocks = < CPG_MOD 909>;
+ power-domains = < R8A77980_PD_ALWAYS_ON>;
+ resets = < 909>;
+ };
+
+ gpio4: gpio@e6054000 {
+ compatible = "renesas,gpio-r8a77980",
+"renesas,rcar-gen3-gpio";
+ reg = <0 0xe6054000 0 0x50>;
+ interrupts = ;
+ #gpio-cells = <2>;
+ gpio-controller;
+ gpio-ranges = < 0 128 25>;
+ #interrupt-cells = <2>;
+ interrupt-controller;
+ clocks = < CPG_MOD 908>;
+ power-domains = < R8A77980_PD_ALWAYS_ON>;
+ resets = < 908>;
+ };
+
+ gpio5: gpio@e6055000 {
+ compatible = "renesas,gpio-r8a77980",
+"renesas,rcar-gen3-gpio";
+ reg = <0 0xe6055000 0 0x50>;
+ interrupts = ;
+ #gpio-cells = <2>;
+ gpio-controller;
+ gpio-ranges = < 0 160 15>;
+ #interrupt-cells = <2>;
+ interrupt-controller;
+ clocks = < CPG_MOD 907>;
+ power-domains = < R8A77980_PD_ALWAYS_ON>;
+ resets = < 907>;
+ };
+
pfc: pin-controller@e606 {
compatible = "renesas,pfc-r8a77980";
reg = <0 0xe606 0 0x50c>;
[PATCH 2/3] arm64: dts: renesas: condor: specify EtherAVB PHY IRQ
Specify EtherAVB PHY IRQ in the Condor board's device tree, now that
we have the GPIO support (previously phylib had to resort to polling).
Based on the original (and large) patch by Vladimir Barinov.
Signed-off-by: Vladimir Barinov
Signed-off-by: Sergei Shtylyov
---
arch/arm64/boot/dts/renesas/r8a77980-condor.dts |2 ++
1 file changed, 2 insertions(+)
Index: renesas/arch/arm64/boot/dts/renesas/r8a77980-condor.dts
===
--- renesas.orig/arch/arm64/boot/dts/renesas/r8a77980-condor.dts
+++ renesas/arch/arm64/boot/dts/renesas/r8a77980-condor.dts
@@ -59,6 +59,8 @@
phy0: ethernet-phy@0 {
rxc-skew-ps = <1500>;
reg = <0>;
+ interrupt-parent = <>;
+ interrupts = <17 IRQ_TYPE_LEVEL_LOW>;
};
};
[PATCH] mmc: renesas_sdhi: really fix WP logic regressions
This reverts commit e060d376cc61 ("mmc: renesas_sdhi: fix WP detection")
and adds some code to really fix the regressions.
It was missed so far that Renesas R-Car instantiations of SDHI chose to
disable internal WP and used the existence of "wp-gpios" to en/disable
WP at all.
With the first refactoring by Yamada-san with commit 2ad1db059b9a ("mmc:
renesas_sdhi: use MMC_CAP2_NO_WRITE_PROTECT instead of TMIO own flag"),
WP was always disabled even when GPIOs were present. With Wolfram's
first fix which gets now reverted, GPIOs were honored. But when not
available, the fallback was to internal WP and not to disabled WP. This
caused wrong WP status on uSD card slots.
Restore the old behaviour now. By default, WP is disabled. When a GPIO
is found, the GPIO re-enables WP. We will think about possible better
ways to handle this in the future.
Tested on a previously regressing Renesas Lager board (H2) and a still
working Renesas Salvator-X board (M3-W).
Reported-by: Yoshihiro Shimoda
Signed-off-by: Wolfram Sang
---
drivers/mmc/host/renesas_sdhi_core.c | 5 +
drivers/mmc/host/renesas_sdhi_internal_dmac.c | 1 +
drivers/mmc/host/renesas_sdhi_sys_dmac.c | 3 +++
3 files changed, 9 insertions(+)
diff --git a/drivers/mmc/host/renesas_sdhi_core.c
b/drivers/mmc/host/renesas_sdhi_core.c
index 51e01f03fb99..45c015da2e75 100644
--- a/drivers/mmc/host/renesas_sdhi_core.c
+++ b/drivers/mmc/host/renesas_sdhi_core.c
@@ -28,6 +28,7 @@
#include
#include
#include
+#include
#include
#include
#include
@@ -534,6 +535,10 @@ int renesas_sdhi_probe(struct platform_device *pdev,
host->multi_io_quirk= renesas_sdhi_multi_io_quirk;
host->dma_ops = dma_ops;
+ /* For some SoC, we disable internal WP. GPIO may override this */
+ if (mmc_can_gpio_ro(host->mmc))
+ mmc_data->capabilities2 &= ~MMC_CAP2_NO_WRITE_PROTECT;
+
/* SDR speeds are only available on Gen2+ */
if (mmc_data->flags & TMIO_MMC_MIN_RCAR2) {
/* card_busy caused issues on r8a73a4 (pre-Gen2) CD-less SDHI */
diff --git a/drivers/mmc/host/renesas_sdhi_internal_dmac.c
b/drivers/mmc/host/renesas_sdhi_internal_dmac.c
index b6edb7a695b5..f7f9773d161f 100644
--- a/drivers/mmc/host/renesas_sdhi_internal_dmac.c
+++ b/drivers/mmc/host/renesas_sdhi_internal_dmac.c
@@ -87,6 +87,7 @@ static const struct renesas_sdhi_of_data
of_rcar_gen3_compatible = {
TMIO_MMC_HAVE_CBSY | TMIO_MMC_MIN_RCAR2,
.capabilities = MMC_CAP_SD_HIGHSPEED | MMC_CAP_SDIO_IRQ |
MMC_CAP_CMD23,
+ .capabilities2 = MMC_CAP2_NO_WRITE_PROTECT,
.bus_shift = 2,
.scc_offset = 0x1000,
.taps = rcar_gen3_scc_taps,
diff --git a/drivers/mmc/host/renesas_sdhi_sys_dmac.c
b/drivers/mmc/host/renesas_sdhi_sys_dmac.c
index 848e50c1638a..4bb46c489d71 100644
--- a/drivers/mmc/host/renesas_sdhi_sys_dmac.c
+++ b/drivers/mmc/host/renesas_sdhi_sys_dmac.c
@@ -42,6 +42,7 @@ static const struct renesas_sdhi_of_data of_rz_compatible = {
static const struct renesas_sdhi_of_data of_rcar_gen1_compatible = {
.tmio_flags = TMIO_MMC_HAS_IDLE_WAIT | TMIO_MMC_CLK_ACTUAL,
.capabilities = MMC_CAP_SD_HIGHSPEED | MMC_CAP_SDIO_IRQ,
+ .capabilities2 = MMC_CAP2_NO_WRITE_PROTECT,
};
/* Definitions for sampling clocks */
@@ -61,6 +62,7 @@ static const struct renesas_sdhi_of_data
of_rcar_gen2_compatible = {
TMIO_MMC_HAVE_CBSY | TMIO_MMC_MIN_RCAR2,
.capabilities = MMC_CAP_SD_HIGHSPEED | MMC_CAP_SDIO_IRQ |
MMC_CAP_CMD23,
+ .capabilities2 = MMC_CAP2_NO_WRITE_PROTECT,
.dma_buswidth = DMA_SLAVE_BUSWIDTH_4_BYTES,
.dma_rx_offset = 0x2000,
.scc_offset = 0x0300,
@@ -81,6 +83,7 @@ static const struct renesas_sdhi_of_data
of_rcar_gen3_compatible = {
TMIO_MMC_HAVE_CBSY | TMIO_MMC_MIN_RCAR2,
.capabilities = MMC_CAP_SD_HIGHSPEED | MMC_CAP_SDIO_IRQ |
MMC_CAP_CMD23,
+ .capabilities2 = MMC_CAP2_NO_WRITE_PROTECT,
.bus_shift = 2,
.scc_offset = 0x1000,
.taps = rcar_gen3_scc_taps,
--
2.11.0
Re: [PATCH 0/3] ARM: shmobile: apmu: Cleanups after legacy SMP fallback removal
On Wed, May 30, 2018 at 05:15:25PM +0200, Geert Uytterhoeven wrote: > Hi Simon, Magnus, > > Now the legacy SMP fallbacks for R-Car H2 and M2-W have been removed, a > few more code cleanups can be applied. > > The third patch is a bit larger than I had hoped, due to the need to > reshuffle a few functions in the absence of forward declarations. > > Tested on Lager (R-Car H2) and Koelsch (R-Car M2-W). > > Thanks! > > Geert Uytterhoeven (3): > ARM: shmobile: apmu: Move cpu_leave_lowpower() to SUSPEND section > ARM: shmobile: apmu: Remove obsolete shmobile_smp_apmu_prepare_cpus() > ARM: shmobile: apmu: Remove platsmp-apmu.h This looks fine but I will wait to see if there are other reviews before applying. Reviewed-by: Simon Horman
