The pin controller in the RZ/A2 is nothing like the pin controller in
the RZ/A1. That's a good thing! This pin controller is much more simple
and easier to configure.
So, this driver is faily simple (I hope).
Chris Brandt (2):
pinctrl: Add RZ/A2 pin and gpio controller
dt-bindings: pinctrl:
Adds support for the pin and gpio controller found in R7S9210 (RZ/A2) SoCs.
Signed-off-by: Chris Brandt
---
v3:
- Changed names from Px to PORTx because "PC" is already defined
v2:
- fixed SOC part number in comments
- sorted #includes
- removed spaces in pfc_pin_port_name enum
- put
Add device tree binding documentation and header file for Renesas R7S9210
(RZ/A2) SoCs.
Signed-off-by: Chris Brandt
---
v2:
* Moved gpio-controller to required
* Wrote a better description of what the sub-nodes are for
* Added pinmux property description
* Changed macro RZA2_PIN_ID to
Adds support for the pin and gpio controller found in R7S9210 (RZ/A2) SoCs.
Signed-off-by: Chris Brandt
---
v3:
- Changed names from Px to PORTx because "PC" is already defined
v2:
- fixed SOC part number in comments
- sorted #includes
- removed spaces in pfc_pin_port_name enum
- put
> We discussed this on IRC already, which is why I need to look into that.
> The HS200 works well on the M3N though.
Can you push the branch you used somewhere? I retested the branch from
Dunbar with my M3N and it works fine with my tests.
signature.asc
Description: PGP signature
On Wed, Nov 07, 2018 at 08:46:02PM +0100, Wolfram Sang wrote:
> The datasheet says we must stop the timer before changing the clock
> divider. This can happen when the restart handler is called while the
> watchdog is running.
>
> Signed-off-by: Wolfram Sang
Reviewed-by: Guenter Roeck
> ---
>
Add device tree binding documentation and header file for Renesas R7S9210
(RZ/A2) SoCs.
Signed-off-by: Chris Brandt
Reviewed-by: Rob Herring
---
v3:
- Added Reviewed-by
v2:
* Moved gpio-controller to required
* Wrote a better description of what the sub-nodes are for
* Added pinmux property
The pin controller in the RZ/A2 is nothing like the pin controller in
the RZ/A1. That's a good thing! This pin controller is much more simple
and easier to configure.
So, this driver is faily simple (I hope).
V3 -> V4: Sorry...I forgot Rob's Reviewed-by !!
Chris Brandt (2):
pinctrl: Add
Document RZ/A2 (R7S9210) SoC bindings.
Signed-off-by: Chris Brandt
---
Documentation/devicetree/bindings/phy/rcar-gen3-phy-usb2.txt | 10 ++
1 file changed, 6 insertions(+), 4 deletions(-)
diff --git a/Documentation/devicetree/bindings/phy/rcar-gen3-phy-usb2.txt
The RZ/A2 has the same USB2 host controller as R-Car Gen3 with only some
minor differences.
Signed-off-by: Chris Brandt
---
drivers/phy/renesas/Kconfig | 2 +-
drivers/phy/renesas/phy-rcar-gen3-usb2.c | 12
2 files changed, 13 insertions(+), 1 deletion(-)
diff --git
Add USB clocks for RZ/A2
Signed-off-by: Chris Brandt
---
drivers/clk/renesas/r7s9210-cpg-mssr.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/clk/renesas/r7s9210-cpg-mssr.c
b/drivers/clk/renesas/r7s9210-cpg-mssr.c
index 3922967ba811..efbbf56e6766 100644
---
Add support for RZ/A2. Basically has the same IP as R-Car Gen3.
Chris Brandt (3):
clk: renesas: r7s9210: Add USB clocks
phy: renesas: rcar-gen3-usb2: Add support for R7S9210
dt-bindings: rcar-gen3-phy-usb2: Add r7s9210 support
Documentation/devicetree/bindings/phy/rcar-gen3-phy-usb2.txt
Hi Wolfram,
Thank you for your patch!
> Subject: [PATCH v2] watchdog: renesas_wdt: don't set divider while watchdog
> is running
>
> The datasheet says we must stop the timer before changing the clock
> divider. This can happen when the restart handler is called while the
> watchdog is running.
The datasheet says we must stop the timer before changing the clock
divider. This can happen when the restart handler is called while the
watchdog is running.
Signed-off-by: Wolfram Sang
---
Change since V1: reworded commit message.
I sent V1 back then when it was more a recommendation of the
Hi Simon
These patches adds sound support for KingFisher.
We can enable it on top of v4.20-rc1, but, it is not stable.
We need this patch (= from ASoC for-v4.21 branch) to be stable it.
223bc10b84970fd772c105b550beeef3ac3502be
("ASoC: pcm3168a: remove read-only status register
From: Kuninori Morimoto
This patch adds missing ULCB HDMI sound support.
To use sound card, HDMI video is mandatory.
Signed-off-by: Kuninori Morimoto
---
arch/arm64/boot/dts/renesas/ulcb.dtsi | 30 +-
1 file changed, 29 insertions(+), 1 deletion(-)
diff --git
Hi Simon
rsnd sound driver will handle SSIU from v4.21 via DT.
Of course it is keeping compatibility, thus, no SSIU settings
is no problem.
SSIU handles BUSIFn, but rsnd driver had been assumed only BUSIF0 was used.
Thus, SSIU / BUSIF0 was attached via SSI automatically,
but it was not enough
From: Kuninori Morimoto
KingFisher has pcm3168 sound codec. This patch enables it.
Because pcm3168 can't handle symmetric channel on playback/
capture, we need to handle it as different DAI.
Signed-off-by: Kuninori Morimoto
---
arch/arm64/boot/dts/renesas/ulcb-kf.dtsi | 151
From: Kuninori Morimoto
ULCB can use daughter board which is called as KingFisher.
It has extra sound interface, thus we want to use it.
But, basically, ALSA SoC can't use Multiple sound card with single
CPU sound interface (= SSI). Thus we need to use Single Sound Card
with multiple DAI
From: Kuninori Morimoto
This patch selects PCA954x, PCM3168A which are missing for
Kingfisher Sound.
Signed-off-by: Kuninori Morimoto
---
arch/arm64/configs/renesas_defconfig | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm64/configs/renesas_defconfig
On 11/07/2018 08:23 PM, Wolfram Sang wrote:
>
>> We discussed this on IRC already, which is why I need to look into that.
>> The HS200 works well on the M3N though.
>
> Can you push the branch you used somewhere? I retested the branch from
> Dunbar with my M3N and it works fine with my tests.
From: Kuninori Morimoto
rsnd driver supports SSIU now, let's use it.
Then, BUSIF DMA settings on rcar_sound,ssi (= rxu, txu) are
no longer needed.
To avoid git merge timing issue / git bisect issue,
this patch doesn't remove it so far, but will be removed in
the future.
Signed-off-by:
From: Kuninori Morimoto
Before, BUSIF which is needed for DMA transfer was automatically handled
via SSI, but it cared BUSIF0 only.
Now, rsnd driver can handle BUSIF0-7 (= for Gen3) BUSIF0-3 (= for Gen2)
via SSIU, and it is keeping compatibility.
Thus, BUSIF0 settings via SSI had been kept to
Hi Laurent
Thank you for your help
> > I tried to reproduce the problem, starting with drm-next which seems to work
> > fine, moving to renesas-drivers-2018-10-09-v4.19-rc7 which also didn't
> > exhibit any issue. I then used your kernel configuration, and got a WARN_ON
> > \o/
>
>
From: Kuninori Morimoto
This patch selects PCM3168A which is missing for Kingfisher Sound
Signed-off-by: Kuninori Morimoto
---
Hi Simon
I missed this patch. Please include this, too.
arch/arm64/configs/defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git
Thanks for your patch!
> On November 7, 2018 at 2:37 PM Geert Uytterhoeven
> wrote:
>
>
> While ptr and port both point to the uart_port structure, the former is
> the untyped pointer cookie passed to interrupt handlers.
> Use the correctly typed port variable instead, to improve type-safety.
This patch adds the "cpu-map" into r8a7795/r8a7796 composed of
multi-cluster. This definition is used to parse the cpu topology.
Signed-off-by: Gaku Inami
---
v1 -> v2:
- Consolidate two patches for r8a7795 and r8a7796 into one patch
---
arch/arm64/boot/dts/renesas/r8a7795.dtsi | 32
Set the capacity-dmips-mhz for R-Car Gen3 SoCs, that is based on
dhrystone. The average in 10 times of dhrystone result as follows:
r8a7795 SoC (A57x4 + A53x4)
CPU max-freq dhrystone
-
A57 1500 MHz 11470943 lps/s
A53 1200 MHz 4798583 lps/s
The commit 05484e098448 ("sched/topology: Add SD_ASYM_CPUCAPACITY
flag detection") to automatically detect asymmetric CPU capacity
has been merged into v4.20-rc1, so I will post this patch series
as v2 again.
These add the scheduler information to be aware cpu capacity. Some
R-Car SoCs have big
On Wed, Nov 7, 2018 at 10:22 AM Geert Uytterhoeven wrote:
> On Wed, Nov 7, 2018 at 10:12 AM kbuild test robot wrote:
> > tree:
> > https://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers.git
> > topic/pinctrl-rza2-v2
> > head: bb0f488fb2907f47250f7f34af60a482fd3dbfe4
> >
On Mon, Nov 05, 2018 at 10:53:47AM +, Fabrizio Castro wrote:
> Do not use "," but ";" to separate instructions.
>
> Signed-off-by: Fabrizio Castro
> Reviewed-by: Guenter Roeck
>
> ---
> v1->v2:
> * Added changelog as suggested by Guenter Roeck
Reviewed-by: Simon Horman
>
>
On Tue, Nov 06, 2018 at 11:35:31AM +0100, Jacopo Mondi wrote:
> Versioned VIN groups can appear on different sets of pins. Using the
> VIN_DATA_PIN_GROUP macro now supports proper naming of said groups through
> an optional 'version' argument.
>
> Use the 'version' argument for said macro to fix
On Wed, Nov 07, 2018 at 11:59:49AM +0100, jacopo mondi wrote:
> Hi Simon,
>
> On Wed, Nov 07, 2018 at 11:41:34AM +0100, Simon Horman wrote:
> > On Tue, Nov 06, 2018 at 11:35:31AM +0100, Jacopo Mondi wrote:
> > > Versioned VIN groups can appear on different sets of pins. Using the
> > >
On Tue, Nov 06, 2018 at 11:35:30AM +0100, Jacopo Mondi wrote:
> VIN data groups may appear on different sets of pins, usually named
> "vinX_data_[a|b]". The existing VIN_DATA_PIN_GROUP() does not support
> appending the '_a' or '_b' suffix, leading to the definition of groups
> names not
Hi Geert,
> > Great, so MIPS defines PC, precluding it use in any driver that includes
> > in some way.
That really stinks!!!
> Anyway, drivers//pinctrl/pinctrl-rza2.c doesn't really use the enum
> values it defines,
> so they can be renamed (PC -> PORTC, or PORT_C).
Of course that means I
Enable R-Car Gen3 PCIe PHY support, which is needed for PCIe to function
on the Renesas Condor board.
Signed-off-by: Geert Uytterhoeven
---
Not intended for upstream merge.
---
arch/arm64/configs/renesas_defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git
Hi Simon, Magnus,
This patch series updates renesas_defconfig for dropped and new support in
v4.20-rc1.
Note that this is not intended for upstream merge.
Thanks!
Geert Uytterhoeven (2):
[LOCAL] arm64: renesas_defconfig: Drop CONFIG_ARM_BIG_LITTLE_CPUFREQ=y
[LOCAL] arm64:
CONFIG_ARM_BIG_LITTLE_CPUFREQ was removed on arm64 in commit
a7314405d83c8f95 ("cpufreq: drop ARM_BIG_LITTLE_CPUFREQ support for
ARM64").
Signed-off-by: Geert Uytterhoeven
---
Not intended for upstream merge.
---
arch/arm64/configs/renesas_defconfig | 1 -
1 file changed, 1 deletion(-)
diff
On Mon, Nov 05, 2018 at 12:59:33PM +0100, Jacopo Mondi wrote:
> This patch adds VIN{4,5} pins, groups and functions to the R8A77990 SoC.
>
> Signed-off-by: Jacopo Mondi
Reviewed-by: Simon Horman
On Tue, Nov 06, 2018 at 11:35:33AM +0100, Jacopo Mondi wrote:
> Add pin, mux and functions definitions for VIN4 and VIN5 for R-Car E3.
>
> Signed-off-by: Jacopo Mondi
>
> ---
> v3 -> v4:
> - Use new variadic version of VIN_DATA_PIN_GROUP macro
I may be missing something but this patch seems to
On Tue, Nov 06, 2018 at 09:52:55PM +0300, Sergei Shtylyov wrote:
> From: Dmitry Shifrin
>
> Add the QSPI{0|1} pins/groups/functions to the R8A77970 PFC driver.
>
> [Sergei: ported to the upstream driver, fixed up the swapped QSPI0 SPCLK/
> SSL pins, fixed up the comments, moved the QSPI
On Mon, Oct 22, 2018 at 02:14:34AM +0900, Magnus Damm wrote:
> Connect R-Car Gen3 Ethernet-AVB to IPMMU
>
> [PATCH 01/03] arm64: dts: renesas: r8a77965: Connect R-Car M3-N AVB to IPMMU
> [PATCH 02/03] arm64: dts: renesas: r8a77980: Connect R-Car V3H AVB to IPMMU
> [PATCH 03/03] arm64: dts:
From: Fabrizio Castro
Fix RZ/G2E part number from its description.
Signed-off-by: Fabrizio Castro
Reviewed-by: Biju Das
Reviewed-by: Rob Herring
Signed-off-by: Simon Horman
---
Documentation/devicetree/bindings/arm/shmobile.txt | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff
Hi Olof, Hi Kevin, Hi Arnd,
Please consider these Renesas ARM based SoC fixes for v4.20.
The following changes since commit 651022382c7f8da46cb4872a545ee1da6d097d2a:
Linux 4.20-rc1 (2018-11-04 15:37:52 -0800)
are available in the git repository at:
From: Kuninori Morimoto
hscif2 has 4 dmas, but has only 2 dma-names.
This patch add missing dma-names.
Signed-off-by: Kuninori Morimoto
Reviewed-by: Geert Uytterhoeven
Fixes: e0f0bda79337701a ("arm64: dts: renesas: r8a7795: sort subnodes
of the soc node")
Signed-off-by: Simon Horman
---
From: Sergei Shtylyov
The "official" Condor boards have always been wired to mount NFS via
GEther, not EtherAVB -- the boards resoldered for EtherAVB were local
to Cogent Embedded, so we've been having an unpleasant situation where
a "normal" Condor board still can't mount NFS (unless an
On Wed, Nov 7, 2018 at 10:12 AM kbuild test robot wrote:
> tree:
> https://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers.git
> topic/pinctrl-rza2-v2
> head: bb0f488fb2907f47250f7f34af60a482fd3dbfe4
> commit: feac9e8cb1ad7b4979e4b553fcdf2d8582049227 [1/2] pinctrl: Add RZ/A2
Hi Simon,
On Wed, Nov 07, 2018 at 11:41:34AM +0100, Simon Horman wrote:
> On Tue, Nov 06, 2018 at 11:35:31AM +0100, Jacopo Mondi wrote:
> > Versioned VIN groups can appear on different sets of pins. Using the
> > VIN_DATA_PIN_GROUP macro now supports proper naming of said groups through
> > an
On Tue, Nov 06, 2018 at 09:46:47PM +0100, Marek Vasut wrote:
> From: Takeshi Kihara
>
> This patch adds SDHI{0,1,3} device nodes for the r8a77990 SoC
> and enables SD card slot connected to SDHI0, micro SD card slot
> connected to SDHI1 and eMMC connected to SDHI3 on the Ebisu board
> using the
Hi Simon,
On Wed, Nov 07, 2018 at 11:34:50AM +0100, Simon Horman wrote:
> On Tue, Nov 06, 2018 at 11:35:33AM +0100, Jacopo Mondi wrote:
> > Add pin, mux and functions definitions for VIN4 and VIN5 for R-Car E3.
> >
> > Signed-off-by: Jacopo Mondi
> >
> > ---
> > v3 -> v4:
> > - Use new variadic
On Tue, Nov 06, 2018 at 11:35:32AM +0100, Jacopo Mondi wrote:
> The VIN4 and VIN5 interfaces supports parallel video input.
> Add pin, mux and functions definitions for VIN4 and VIN5 for R-Car M3-N.
>
> Reviewed-by: Ulrich Hecht
> Signed-off-by: Jacopo Mondi
Reviewed-by: Simon Horman
From: Biju Das
Adding pinctrl support for EtherAVB interface.
Signed-off-by: Biju Das
Reviewed-by: Fabrizio Castro
Reviewed-by: Geert Uytterhoeven
Signed-off-by: Fabrizio Castro
---
v4.20 RC1 is out, this update rebases the patch on top of
renesas-devel-20181107-v4.20-rc1
Thanks,
Fab
On Mon, Nov 05, 2018 at 09:52:48AM +0100, Geert Uytterhoeven wrote:
> Hi Kaneko-san,
>
> On Sat, Oct 20, 2018 at 11:35 PM Yoshihiro Kaneko
> wrote:
> > From: Takeshi Kihara
> >
> > This patch adds I2C-DVFS device node for the R8A77990 SoC.
> >
> > Signed-off-by: Takeshi Kihara
> >
tree:
https://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers.git
topic/pinctrl-rza2-v2
head: bb0f488fb2907f47250f7f34af60a482fd3dbfe4
commit: feac9e8cb1ad7b4979e4b553fcdf2d8582049227 [1/2] pinctrl: Add RZ/A2 pin
and gpio controller
config: mips-allmodconfig (attached as
On Tue, Nov 06, 2018 at 09:46:47PM +0100, Marek Vasut wrote:
> From: Takeshi Kihara
>
> This patch adds SDHI{0,1,3} device nodes for the r8a77990 SoC
> and enables SD card slot connected to SDHI0, micro SD card slot
> connected to SDHI1 and eMMC connected to SDHI3 on the Ebisu board
> using the
Signed-off-by: Geert Uytterhoeven
---
include/linux/mfd/tmio.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/include/linux/mfd/tmio.h b/include/linux/mfd/tmio.h
index 1e70060c92ce0a11..aa696bcb1d12e750 100644
--- a/include/linux/mfd/tmio.h
+++ b/include/linux/mfd/tmio.h
@@
tree: https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas.git
arm64-dt-for-v4.21
head: 3e8f76c61511f3c4f0c25c36172605d6aeaec37c
commit: 3e8f76c61511f3c4f0c25c36172605d6aeaec37c [25/25] arm64: dts: r8a77990:
ebisu: Add and enable SDHI device nodes
config: arm64-defconfig (attached
On 11/07/2018 02:08 PM, Wolfram Sang wrote:
>
>> Nope. I tried that patchset on M3N again yesterday and got error -84
>> while initing the eMMC, so I need to look into that first. Then I'll
>> try it on E3.
>
> Hmmm, we tried M3N at the hackfest and it worked great there.
>
> First idea: are
If iommu_ops.add_device() fails, iommu_ops.domain_free() is still
called, leading to a crash, as the domain was only partially
initialized:
ipmmu-vmsa e67b.mmu: Cannot accommodate DMA translation for IOMMU page
tables
sata_rcar ee30.sata: Unable to initialize IPMMU context
RZ/G2M also has 3 interrupts routed to the TSC, but the list was not
updated to reflect this.
Just drop the list, as this is the case for this TSC variant in all
R-Car Gen3 and RZ/G2 SoCs.
Fixes: be6af481f3b2d508 ("dt-bindings: thermal: rcar-gen3-thermal: Add r8a774a1
support")
Signed-off-by:
On 11/07/2018 09:50 AM, Wolfram Sang wrote:
> On Tue, Nov 06, 2018 at 09:46:47PM +0100, Marek Vasut wrote:
>> From: Takeshi Kihara
>>
>> This patch adds SDHI{0,1,3} device nodes for the r8a77990 SoC
>> and enables SD card slot connected to SDHI0, micro SD card slot
>> connected to SDHI1 and eMMC
On 11/07/2018 02:57 PM, kbuild test robot wrote:
> tree: https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas.git
> arm64-dt-for-v4.21
> head: 3e8f76c61511f3c4f0c25c36172605d6aeaec37c
> commit: 3e8f76c61511f3c4f0c25c36172605d6aeaec37c [25/25] arm64: dts:
> r8a77990: ebisu: Add and
> Nope. I tried that patchset on M3N again yesterday and got error -84
> while initing the eMMC, so I need to look into that first. Then I'll
> try it on E3.
Hmmm, we tried M3N at the hackfest and it worked great there.
First idea: are you sure you have all depending patch series applied as
While ptr and port both point to the uart_port structure, the former is
the untyped pointer cookie passed to interrupt handlers.
Use the correctly typed port variable instead, to improve type-safety.
Signed-off-by: Geert Uytterhoeven
---
drivers/tty/serial/sh-sci.c | 4 ++--
1 file changed, 2
> Subject: [PATCH] dt-bindings: thermal: rcar-gen3-thermal: All variants use 3
> interrupts
>
> RZ/G2M also has 3 interrupts routed to the TSC, but the list was not
> updated to reflect this.
>
> Just drop the list, as this is the case for this TSC variant in all
> R-Car Gen3 and RZ/G2 SoCs.
>
>
Now that include/dt-bindings/clock/r8a774a1-cpg-mssr.h is in Linus'
master branch we can replace clock related magic numbers with the
corresponding labels.
Signed-off-by: Fabrizio Castro
---
arch/arm64/boot/dts/renesas/r8a774a1.dtsi | 38 +++
1 file changed, 19
Now that include/dt-bindings/power/r8a774a1-sysc.h is in Linus'
master branch we can replace power related magic numbers with
the corresponding labels.
Signed-off-by: Fabrizio Castro
---
arch/arm64/boot/dts/renesas/r8a774a1.dtsi | 201 +++---
1 file changed, 101
Dear All,
We were waiting for v4.20 RC1 to be out for replacing clock and
power magic numbers within r8a774a1.dtsi as there was a dependency
with the corresponding bindings.
This series takes care of the magic numbers now that the bindings
are available by replacing them with the corresponding
The patch
spi: rspi: Add r8a77470 to the compatible list
has been applied to the spi tree at
https://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi.git
All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24 hours) and sent to
On Wed, Nov 7, 2018 at 3:25 AM Simon Horman wrote:
>
> Hi Olof, Hi Kevin, Hi Arnd,
>
> Please consider these Renesas ARM based SoC fixes for v4.20.
>
>
> The following changes since commit 651022382c7f8da46cb4872a545ee1da6d097d2a:
>
> Linux 4.20-rc1 (2018-11-04 15:37:52 -0800)
>
> are available
Hi Simon,
On Tuesday, 6 November 2018 16:00:35 EET Simon Horman wrote:
> On Mon, Nov 05, 2018 at 02:12:43PM +0100, Jacopo Mondi wrote:
> > The VIN driver bindings dictates fixed numbering for VIN endpoints
> > connected to CSI-2 endpoints, even when a single endpoint exists.
> >
> > Without
71 matches
Mail list logo
