Re: renesas-drivers-2016-04-12-v4.6-rc3

Hi Geert > I have pushed renesas-drivers-2016-04-12-v4.6-rc3 to > https://git.kernel.org/cgit/linux/kernel/git/geert/renesas-drivers.git > > This tree is meant to ease development of platform support and drivers > for Renesas ARM SoCs. It is created by merging (a) the for-next branches > of

[PATCH 14/22] ARM: dts: r8a7779: Correct interrupt type for ARM TWD

From: Geert Uytterhoeven The ARM TWD interrupt is a private peripheral interrupt (PPI), and per the ARM GIC documentation, whether the type for PPIs can be set is IMPLEMENTATION DEFINED. For R-Car H1 devices the PPI type cannot be set, and so when we attempt to set the

[PATCH 22/22] ARM: dts: gose: Enable SDHI controllers

From: Ulrich Hecht Includes regulator and pin assignments. Signed-off-by: Ulrich Hecht Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a7793-gose.dts | 119 + 1

[PATCH 17/22] ARM: dts: r8a7790: Set maximum frequencies for SDHI clocks

From: Ben Hutchings Taken from the datasheet. Signed-off-by: Ben Hutchings Signed-off-by: Wolfram Sang Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a7790.dtsi |

[PATCH 12/22] ARM: dts: r8a7794: Add IIC nodes

Add IIC nodes to r8a7794 device tree. Based on similar work for the r8a7793 by Laurent Pinchart. Signed-off-by: Simon Horman Reviewed-by: Geert Uytterhoeven --- arch/arm/boot/dts/r8a7794.dtsi | 28 1 file

[PATCH 07/22] ARM: dts: r8a7794: add CAN clocks to device tree

Add CAN nodes to r8a7794 device tree. Based on work by Sergei Shtylyov for the r8a7791 SoC. Signed-off-by: Simon Horman Reviewed-by: Geert Uytterhoeven Acked-by: Ramesh Shanmugasundaram ---

[GIT PULL v2] Renesas ARM Based SoC DT Updates for v4.7

Hi Olof, Hi Kevin, Hi Arnd, Please consider these Renesas ARM based SoC DT updates for v4.7. This pull request is based on "[GIT PULL] Renesas ARM Based SoC Cleanup for v4.7", tagged as renesas-cleanup-for-v4.7, which you have previously pulled. The reason for that base is to avoid conflicts.

[PATCH 03/22] ARM: dts: r8a7790: Add SCIF2 clock

From: Geert Uytterhoeven Based on Rev. 2.00 of the R-Car Gen2 datasheet. Signed-off-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a7790.dtsi| 6 +++---

[PATCH 18/22] ARM: dts: r8a7790: lager: Enable UHS-I SDR-50

From: Wolfram Sang Add the "1v8" pinctrl state and sd-uhs-sdr50 property to SDHI{0,2}. Signed-off-by: Ben Hutchings Signed-off-by: Wolfram Sang Signed-off-by: Simon Horman

[PATCH 11/22] ARM: dts: r8a7794: add IIC clocks

Add IIC clocks to r8a7794 device tree. Based on similar work for the r8a7790 by Wolfram Sang. Signed-off-by: Simon Horman Reviewed-by: Geert Uytterhoeven --- arch/arm/boot/dts/r8a7794.dtsi| 9 ++---

[PATCH 05/22] ARM: dts: r8a7791: use fallback can compatibility string

Use recently added fallback compatibility string in r8a7791 device tree. Signed-off-by: Simon Horman Acked-by: Geert Uytterhoeven --- arch/arm/boot/dts/r8a7791.dtsi | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git

[PATCH 01/22] ARM: dts: r8a7790: use fallback jpu compatibility string

Use recently added fallback compatibility string in r8a7790 device trees. Signed-off-by: Simon Horman Acked-by: Geert Uytterhoeven --- arch/arm/boot/dts/r8a7790.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git

[PATCH 06/22] ARM: dts: r8a7790: use fallback can compatibility string

Use recently added fallback compatibility string in r8a7790 device tree. Signed-off-by: Simon Horman Acked-by: Geert Uytterhoeven --- arch/arm/boot/dts/r8a7790.dtsi | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git

[PATCH 02/22] ARM: dts: r8a7791: use fallback jpu compatibility string

Use recently added fallback compatibility string in r8a7791 device tree. Signed-off-by: Simon Horman Acked-by: Geert Uytterhoeven --- arch/arm/boot/dts/r8a7791.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git

[PATCH 19/22] ARM: dts: kzm9g: Configure NMI key as wake-up source

From: Geert Uytterhoeven Add a GPIO key with wake-up capability for the NMI button. This allows to wake up the system from s2ram without relying on the buttons on the optional switch board. Signed-off-by: Geert Uytterhoeven Signed-off-by: Simon

[PATCH 04/22] ARM: dts: r8a7790: Add SCIF2 device node

From: Geert Uytterhoeven Signed-off-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a7790.dtsi | 14 ++ 1 file changed, 14 insertions(+) diff --git

[PATCH 16/22] ARM: dts: r8a7791: Use USB3.0 fallback compatibility string

Use recently added fallback compatibility string in r8a7791 device tree. Signed-off-by: Simon Horman Acked-by: Geert Uytterhoeven --- arch/arm/boot/dts/r8a7791.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git

[PATCH 08/22] ARM: dts: r8a7794: add CAN nodes to device tree

Add CAN nodes to r8a7794 device tree. Based on work by Sergei Shtylyov for the r8a7791 SoC. Signed-off-by: Simon Horman Reviewed-by: Geert Uytterhoeven Acked-by: Ramesh Shanmugasundaram ---

[PATCH 13/22] ARM: dts: sh73a0: Correct interrupt type for ARM TWD

From: Geert Uytterhoeven The ARM TWD interrupt is a private peripheral interrupt (PPI), and per the ARM GIC documentation, whether the type for PPIs can be set is IMPLEMENTATION DEFINED. For SH-Mobile AG5 devices the PPI type cannot be set, and so when we attempt to set

[PATCH 15/22] ARM: dts: r8a7790: Use USB3.0 fallback compatibility string

Use recently added fallback compatibility string in r8a7790 device tree. Signed-off-by: Simon Horman Acked-by: Geert Uytterhoeven --- arch/arm/boot/dts/r8a7790.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git

[PATCH 09/22] ARM: dts: r8a7793: add CAN clocks to device tree

The R-Car CAN controllers can derive the CAN bus clock not only from their peripheral clock input (clkp1) but also from the other internal clock (clkp2) and external clock fed on CAN_CLK pin. Describe those clocks in the device tree along with the USB_EXTAL clock from which clkp2 is derived.

[GIT PULL] Renesas ARM Based SoC Updates for v4.7

Hi Olof, Hi Kevin, Hi Arnd, Please consider these Renesas ARM based SoC updates for v4.7. This pull request is based on "[GIT PULL v2] Renesas ARM Based SoC Fixes for v4.6", tagged as renesas-fixes-for-v4.6, which I have previously sent a pull request for. The reason is that this series depends

RE: [PATCH v2] usb: host: xhci-rcar: Avoid long wait in xhci_reset()

Hi, > From: Rob Herring > Sent: Friday, April 22, 2016 10:29 PM > > On Fri, Apr 22, 2016 at 4:36 AM, Felipe Balbi > wrote: > > > > Hi, > > > > Yoshihiro Shimoda writes: > >> The firmware of R-Car USB 3.0 host controller will

RE: [PATCH v2] usb: host: xhci-rcar: Avoid long wait in xhci_reset()

Hi, > From: Felipe Balbi > Sent: Friday, April 22, 2016 6:37 PM > > Hi, > > Yoshihiro Shimoda writes: > > The firmware of R-Car USB 3.0 host controller will control the reset. > > So, if the xhci driver doesn't do firmware downloading (e.g. kernel > >

Re: [PATCH 2/2] sh_eth: rename ARSTR register bit

On Sun, Apr 24, 2016 at 11:46:15PM +0300, Sergei Shtylyov wrote: > The Renesas RZ/A1H manual names the software reset bit in the software reset > register (ARSTR) ARST which makes a bit more sense than the ARSTR_ARSTR name > used now by the driver -- rename the latter to ARSTR_ARST. > >

Re: [PATCH] sh_eth: get rid of the 2nd parameter to sh_eth_dev_init()

On Sun, Apr 24, 2016 at 07:11:07PM +0300, Sergei Shtylyov wrote: > sh_eth_dev_init() is now always called with 'true' as the 2nd argument, > so that there's no more sense in having 2 parameters to this function... > > Signed-off-by: Sergei Shtylyov

Re: [PATCH 1/2] sh_eth: use EDMR_SRST_GETHER in sh_eth_check_reset()

On Sun, Apr 24, 2016 at 11:45:23PM +0300, Sergei Shtylyov wrote: > sh_eth_check_reset() uses a bare number where EDMR_SRST_GETHER would fit, > i.e. the receive/trasmit software reset bits that comprise EDMR_SRST_GETHER > read as 1 while the corresponding reset is in progress and thus, when both >

Re: [GIT PULL] Renesas ARM Based SoC R-Car SYSC Updates for v4.7

On Sun, Apr 24, 2016 at 11:40:47PM +0200, Arnd Bergmann wrote: > On Thursday 21 April 2016 13:44:48 Simon Horman wrote: > > Renesas ARM Based SoC R-Car SYSC Updates for v4.7 > > > > * Add DT bindings for the R-Car System Controller. > > An implementation is intended to follow. > > > > This

Re: [GIT PULL v2] Renesas ARM Based SoC Fixes for v4.6

Hi, On Thu, Apr 21, 2016 at 01:44:30PM +1000, Simon Horman wrote: > Hi Olof, Hi Kevin, Hi Arnd, > > Please consider these Renesas ARM based SoC fixes for v4.6. I apologise for not making this clearer in the initial posting. This is v2 of this pull request. The changes since v1 are: * Include

[PATCH 1/2] sh_eth: use EDMR_SRST_GETHER in sh_eth_check_reset()

sh_eth_check_reset() uses a bare number where EDMR_SRST_GETHER would fit, i.e. the receive/trasmit software reset bits that comprise EDMR_SRST_GETHER read as 1 while the corresponding reset is in progress and thus, when both are 0, the reset is complete. Signed-off-by: Sergei Shtylyov

[PATCH 0/2] sh_eth: couple of software reset bit cleanups

Hello. Here's a set of 2 patches against DaveM's 'net-next.git' repo. We clean up the use of the software reset bits... [1/2] sh_eth: use EDMR_SRST_GETHER in sh_eth_check_reset() [2/2] sh_eth: rename ARSTR register bit MBR, Sergei