[RFC 3/4] ARM: dts: r8a7790: lager: use demuxer for IIC2/I2C2

[Simon Horman]

Create a seperate bus for HDMI related I2C slaves.

Based on work by Wolfram Sang.

Cc: Wolfram Sang 
Signed-off-by: Simon Horman 
---
 arch/arm/boot/dts/r8a7790-lager.dts | 126 +---
 1 file changed, 73 insertions(+), 53 deletions(-)

diff --git a/arch/arm/boot/dts/r8a7790-lager.dts 
b/arch/arm/boot/dts/r8a7790-lager.dts
index 2e671aeafbef..aa316bc358e1 100644
--- a/arch/arm/boot/dts/r8a7790-lager.dts
+++ b/arch/arm/boot/dts/r8a7790-lager.dts
@@ -52,6 +52,7 @@
serial1 = 
i2c8 = "i2cexio0";
i2c9 = "i2cexio1";
+   i2c10 = "i2chdmi";
};
 
chosen {
@@ -284,6 +285,65 @@
#address-cells = <1>;
#size-cells = <0>;
};
+
+   i2chdmi: i2c-10 {
+   compatible = "i2c-demux-pinctrl";
+   i2c-parent = <>, <>;
+   i2c-bus-name = "i2c-hdmi";
+   #address-cells = <1>;
+   #size-cells = <0>;
+
+   ak4643: codec@12 {
+   compatible = "asahi-kasei,ak4643";
+   #sound-dai-cells = <0>;
+   reg = <0x12>;
+   };
+
+   composite-in@20 {
+   compatible = "adi,adv7180";
+   reg = <0x20>;
+   remote = <>;
+
+   port {
+   adv7180: endpoint {
+   bus-width = <8>;
+   remote-endpoint = <>;
+   };
+   };
+   };
+
+   hdmi@39 {
+   compatible = "adi,adv7511w";
+   reg = <0x39>;
+   interrupt-parent = <>;
+   interrupts = <15 IRQ_TYPE_LEVEL_LOW>;
+
+   adi,input-depth = <8>;
+   adi,input-colorspace = "rgb";
+   adi,input-clock = "1x";
+   adi,input-style = <1>;
+   adi,input-justification = "evenly";
+
+   ports {
+   #address-cells = <1>;
+   #size-cells = <0>;
+
+   port@0 {
+   reg = <0>;
+   adv7511_in: endpoint {
+   remote-endpoint = 
<_out_lvds0>;
+   };
+   };
+
+   port@1 {
+   reg = <1>;
+   adv7511_out: endpoint {
+   remote-endpoint = <_con>;
+   };
+   };
+   };
+   };
+   };
 };
 
  {
@@ -416,6 +476,11 @@
function = "iic1";
};
 
+   i2c2_pins: i2c2 {
+   groups = "i2c2";
+   function = "i2c2";
+   };
+
iic2_pins: iic2 {
groups = "iic2";
function = "iic2";
@@ -617,63 +682,18 @@
pinctrl-names = "i2c-exio1";
 };
 
-  {
-   status = "okay";
-   pinctrl-0 = <_pins>;
-   pinctrl-names = "default";
+  {
+   pinctrl-0 = <_pins>;
+   pinctrl-names = "i2c-hdmi";
 
clock-frequency = <10>;
+};
 
-   ak4643: codec@12 {
-   compatible = "asahi-kasei,ak4643";
-   #sound-dai-cells = <0>;
-   reg = <0x12>;
-   };
-
-   composite-in@20 {
-   compatible = "adi,adv7180";
-   reg = <0x20>;
-   remote = <>;
-
-   port {
-   adv7180: endpoint {
-   bus-width = <8>;
-   remote-endpoint = <>;
-   };
-   };
-   };
-
-   hdmi@39 {
-   compatible = "adi,adv7511w";
-   reg = <0x39>;
-   interrupt-parent = <>;
-   interrupts = <15 IRQ_TYPE_LEVEL_LOW>;
-
-   adi,input-depth = <8>;
-   adi,input-colorspace = "rgb";
-   adi,input-clock = "1x";
-   adi,input-style = <1>;
-   adi,input-justification = "evenly";
-
-   ports {
-   #address-cells = <1>;
-   #size-cells = <0>;
-
-   port@0 {
-   reg = <0>;
-   adv7511_in: endpoint {
-   remote-endpoint = <_out_lvds0>;
-   };
-   };
+  {
+   pinctrl-0 = <_pins>;
+   pinctrl-names = "i2c-hdmi";
 
-   port@1 {
-   

[RFC 0/4] ARM: dts: r8a7790: lager: use demuxer for I2C

[Simon Horman]

Hi,

the intention of this series is to extend use of the demuxer for I2C
on the lager/r8a7790 to cover all I2C IP blocks.

This is based on work by Wolfram Sang.

I have not included GPIO in the demux configuration. This is in keeping
with the existing usage for IIC0/I2C0.

Any advice or assistance in testing would be gratefully received.

For reference a boot log is provided below.

This series is based on renesas-devel-20160530-v4.7-rc1.

To aid review it is provided in git at:

git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas.git topic/i2c-demux

I also intend to add demux for I2C to other R-Car Gen2 boards as a follow-up.


Simon Horman (4):
  ARM: dts: r8a7790: lager: rename i2cexio as i2cexio0
  ARM: dts: r8a7790: lager: use demuxer for IIC1/I2C1
  ARM: dts: r8a7790: lager: use demuxer for IIC2/I2C2
  ARM: dts: r8a7790: lager: use demuxer for IIC3/I2C3

 arch/arm/boot/dts/r8a7790-lager.dts | 241 ++--
 1 file changed, 151 insertions(+), 90 deletions(-)

--- Boot log ---

Lager booted with kernel using shmobile_defconfig.

[0.00] Booting Linux on physical CPU 0x0
[0.00] Linux version 4.7.0-rc1-11566-g37773b1e292b 
(ho...@ayumi.isobedori.kobe.vergenet.net) (gcc version 4.6.3 (GCC) ) #621 SMP 
Tue May 31 12:07:50 JST 2016
[0.00] CPU: ARMv7 Processor [413fc0f2] revision 2 (ARMv7), cr=10c5387d
[0.00] CPU: div instructions available: patching division code
[0.00] CPU: PIPT / VIPT nonaliasing data cache, PIPT instruction cache
[0.00] Machine model: Lager
[0.00] Ignoring memory block 0x14000 - 0x2
[0.00] debug: ignoring loglevel setting.
[0.00] Memory policy: Data cache writealloc
[0.00] On node 0 totalpages: 262144
[0.00] free_area_init_node: node 0, pgdat c0a3d680, node_mem_map 
ef7f9000
[0.00]   Normal zone: 1536 pages used for memmap
[0.00]   Normal zone: 0 pages reserved
[0.00]   Normal zone: 196608 pages, LIFO batch:31
[0.00]   HighMem zone: 65536 pages, LIFO batch:15
[0.00] percpu: Embedded 11 pages/cpu @ef77b000 s22720 r0 d22336 u45056
[0.00] pcpu-alloc: s22720 r0 d22336 u45056 alloc=11*4096
[0.00] pcpu-alloc: [0] 0 [0] 1 [0] 2 [0] 3 [0] 4 [0] 5 [0] 6 [0] 7 
[0.00] Built 1 zonelists in Zone order, mobility grouping on.  Total 
pages: 260608
[0.00] Kernel command line: ignore_loglevel rw root=/dev/nfs ip=dhcp
[0.00] PID hash table entries: 4096 (order: 2, 16384 bytes)
[0.00] Dentry cache hash table entries: 131072 (order: 7, 524288 bytes)
[0.00] Inode-cache hash table entries: 65536 (order: 6, 262144 bytes)
[0.00] Memory: 1029228K/1048576K available (6148K kernel code, 251K 
rwdata, 1480K rodata, 1024K init, 292K bss, 19348K reserved, 0K cma-reserved, 
262144K highmem)
[0.00] Virtual kernel memory layout:
[0.00] vector  : 0x - 0x1000   (   4 kB)
[0.00] fixmap  : 0xffc0 - 0xfff0   (3072 kB)
[0.00] vmalloc : 0xf080 - 0xff80   ( 240 MB)
[0.00] lowmem  : 0xc000 - 0xf000   ( 768 MB)
[0.00] pkmap   : 0xbfe0 - 0xc000   (   2 MB)
[0.00]   .text : 0xc0008000 - 0xc087307c   (8621 kB)
[0.00]   .init : 0xc090 - 0xc0a0   (1024 kB)
[0.00]   .data : 0xc0a0 - 0xc0a3ef80   ( 252 kB)
[0.00].bss : 0xc0a4 - 0xc0a8919c   ( 293 kB)
[0.00] Hierarchical RCU implementation.
[0.00]  Build-time adjustment of leaf fanout to 32.
[0.00] NR_IRQS:16 nr_irqs:16 16
[0.00] Architected cp15 timer(s) running at 10.00MHz (virt).
[0.00] clocksource: arch_sys_counter: mask: 0xff 
max_cycles: 0x24e6a1710, max_idle_ns: 440795202120 ns
[0.04] sched_clock: 56 bits at 10MHz, resolution 100ns, wraps every 
4398046511100ns
[0.14] Switching to timer-based delay loop, resolution 100ns
[0.000525] Console: colour dummy device 80x30
[0.000812] console [tty0] enabled
[0.000837] Calibrating delay loop (skipped), value calculated using timer 
frequency.. 20.00 BogoMIPS (lpj=10)
[0.000862] pid_max: default: 32768 minimum: 301
[0.000987] Mount-cache hash table entries: 2048 (order: 1, 8192 bytes)
[0.001004] Mountpoint-cache hash table entries: 2048 (order: 1, 8192 bytes)
[0.001448] CPU: Testing write buffer coherency: ok
[0.001708] CPU0: update cpu_capacity 1535
[0.001725] CPU0: thread -1, cpu 0, socket 0, mpidr 8000
[0.003528] Setting up static identity map for 0x4010 - 0x40100058
[0.006976] CPU1: update cpu_capacity 1535
[0.006982] CPU1: thread -1, cpu 1, socket 0, mpidr 8001
[0.007849] CPU2: update cpu_capacity 1535
[0.007856] CPU2: thread -1, cpu 2, socket 0, mpidr 8002
[0.008731] CPU3: update cpu_capacity 1535
[0.008737] CPU3: thread -1, cpu 3, socket 0, mpidr 8003
[0.009384

Re: [PATCH 11/49] ASoC: simple-card-core: add asoc_simple_card_parse_card_widgets()

[Kuninori Morimoto]

Hi Mark, again

> > > +int asoc_simple_card_parse_card_widgets(struct snd_soc_card *card,
> > > + char *prefix)
> > > +{
> > > + struct device_node *np = card->dev->of_node;
> > > + char prop[128];
> > > + int ret = 0;
> > > +
> > > + snprintf(prop, sizeof(prop), "%swidgets", prefix);
> > > +
> > > + if (of_property_read_bool(np, prop))
> > > + ret = snd_soc_of_parse_audio_simple_widgets(card, prop);
> > > +
> > > + return ret;
> > > +}
> > > +EXPORT_SYMBOL_GPL(asoc_simple_card_parse_card_widgets);
> > 
> > This seems like an extremely thin wrapper around existing core
> > functionality, shouldn't we just be adding the property check into the
> > core?
> 
> OK, will do in v2

This, and asoc_simple_card_parse_card_route() (= _route) had same concept.
(_widgets user is only simple-card...)
Many drivers are using _route function, and almost all drivers are expecting
that it will be error if DT doesn't have its property.
But, above helper is tring to parse it, and it is not error if DT doesn't have 
it.
I will put these 2 helper in soc-core.c, as _try_ function in v2.

Re: [PATCH 15/49] ASoC: simple-card-core: add asoc_simple_card_init_jack()

[Kuninori Morimoto]

Hi Mark

> > From: Kuninori Morimoto 
> > 
> > simple-card is supporting jack/gpio.
> > This patch makes this method simple style standard.
> 
> There was some recent discussion about a more complete core binding
> for this based on the work that Dylan Reid had been pushing a while ago
> - it's not clear that the simple-card binding is great for
> generalization here.

Can you show me where can I see it ?
Anyway, I will keep this related function as static in simple-card,
not simple-card-utils in v2.

Best regards
---
Kuninori Morimoto

Re: [PATCH 14/49] ASoC: simple-card-core: add asoc_simple_card_parse_dpcm()

[Kuninori Morimoto]

Hi Mark

> > From: Kuninori Morimoto 
> > 
> > simple-card like driver is supporting DPCM FE/BE.
> > This patch makes this method simple style standard.
> 
> DPCM is very much an implementation detail of the current stack,
> providing helpers that promote its use doesn't seem like the best idea -
> we want to change it for in kernel use going forwards and that's going
> to be harder with DPCM.  We should be encouraging bindings that make
> DSPs look more like CODECs.

rsrc-card which is using DPCM is already existing in upstream.
And, sharing code between simple-card <-> rsrc-card (= simple-dpcm-card),
(and expand it to simple-graph-card) is the purpose of this patch-set.

So, I will drop this "DPCM specific helper function" from
simple-card-core (= will be simple-card-util).
But simple-dpcm-card itself is OK. Is this correct ?

Best regards
---
Kuninori Morimoto

[PATCH v2 0/3] soc: renesas: rcar-sysc: Add support for R-Car M3-W power areas

[Geert Uytterhoeven]

Hi Simon, Magnus,

This patch series adds support for the power areas exposed by the System
Controller on the Renesas R-Car M3-W SoC. This is a prerequisite for
enabling devices (e.g. VSP and FCP) that reside in power areas.

/sys/kernel/debug/pm_genpd/pm_genpd_summary output:

domain  status  slaves
/device runtime status
--
clock-controlleron  
a3iroff-0   
3dg-b   off-0   
3dg-a   off-0   3dg-b
a2vc1   off-0   
a2vc0   off-0   
a3vcoff-0   a2vc0, a2vc1
cr7 off-0   
ca53-cpu3   on  
ca53-cpu2   on  
ca53-cpu1   on  
ca53-cpu0   on  
ca53-scuon  ca53-cpu0, ca53-cpu1, 
ca53-cpu2, ca53-cpu3
ca57-cpu1   on  
ca57-cpu0   on  
ca57-scuon  ca57-cpu0, ca57-cpu1
always-on   on  ca57-scu, ca53-scu, cr7, 
a3vc, 3dg-a, a3ir
/devices/platform/soc/e6e88000.serial   active

Changes compared to v1:
  - Add Acked-by.

For your convenience, I've pushed this series to the
topic/r8a7796-sysc-v2 branch of
https://git.kernel.org/cgit/linux/kernel/git/geert/renesas-drivers.git.
This has been tested on r8a7796/salvator-x, and the code (minus the
acks, i.e. v1), has been part of renesas-drivers since 2016-05-10.

Thanks!

Geert Uytterhoeven (3):
  soc: renesas: rcar-sysc: Document r8a7796 support
  soc: renesas: Add r8a7796 SYSC PM Domain Binding Definitions
  soc: renesas: rcar-sysc: Add support for R-Car M3-W power areas

 .../bindings/power/renesas,rcar-sysc.txt   |  1 +
 drivers/soc/renesas/Makefile   |  1 +
 drivers/soc/renesas/r8a7796-sysc.c | 48 ++
 drivers/soc/renesas/rcar-sysc.c|  3 ++
 drivers/soc/renesas/rcar-sysc.h|  1 +
 include/dt-bindings/power/r8a7796-sysc.h   | 36 
 6 files changed, 90 insertions(+)
 create mode 100644 drivers/soc/renesas/r8a7796-sysc.c
 create mode 100644 include/dt-bindings/power/r8a7796-sysc.h

-- 
1.9.1

Gr{oetje,eeting}s,

Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- ge...@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds

[PATCH v2 1/3] soc: renesas: rcar-sysc: Document r8a7796 support

[Geert Uytterhoeven]

Signed-off-by: Geert Uytterhoeven 
Acked-by: Laurent Pinchart 
Acked-by: Rob Herring 
---
v2:
  - Add Acked-by.
---
 Documentation/devicetree/bindings/power/renesas,rcar-sysc.txt | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/power/renesas,rcar-sysc.txt 
b/Documentation/devicetree/bindings/power/renesas,rcar-sysc.txt
index b74e4d4785ab2d60..0725fb37a973d8eb 100644
--- a/Documentation/devicetree/bindings/power/renesas,rcar-sysc.txt
+++ b/Documentation/devicetree/bindings/power/renesas,rcar-sysc.txt
@@ -14,6 +14,7 @@ Required properties:
   - "renesas,r8a7793-sysc" (R-Car M2-N)
   - "renesas,r8a7794-sysc" (R-Car E2)
   - "renesas,r8a7795-sysc" (R-Car H3)
+  - "renesas,r8a7796-sysc" (R-Car M3-W)
   - reg: Address start and address range for the device.
   - #power-domain-cells: Must be 1.
 
-- 
1.9.1

[PATCH v2 2/3] soc: renesas: Add r8a7796 SYSC PM Domain Binding Definitions

[Geert Uytterhoeven]

Signed-off-by: Geert Uytterhoeven 
Acked-by: Laurent Pinchart 
---
v2:
  - Add Acked-by.
---
 include/dt-bindings/power/r8a7796-sysc.h | 36 
 1 file changed, 36 insertions(+)
 create mode 100644 include/dt-bindings/power/r8a7796-sysc.h

diff --git a/include/dt-bindings/power/r8a7796-sysc.h 
b/include/dt-bindings/power/r8a7796-sysc.h
new file mode 100644
index ..5b4daab44daa0057
--- /dev/null
+++ b/include/dt-bindings/power/r8a7796-sysc.h
@@ -0,0 +1,36 @@
+/*
+ * Copyright (C) 2016 Glider bvba
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ */
+#ifndef __DT_BINDINGS_POWER_R8A7796_SYSC_H__
+#define __DT_BINDINGS_POWER_R8A7796_SYSC_H__
+
+/*
+ * These power domain indices match the numbers of the interrupt bits
+ * representing the power areas in the various Interrupt Registers
+ * (e.g. SYSCISR, Interrupt Status Register)
+ */
+
+#define R8A7796_PD_CA57_CPU00
+#define R8A7796_PD_CA57_CPU11
+#define R8A7796_PD_CA53_CPU05
+#define R8A7796_PD_CA53_CPU16
+#define R8A7796_PD_CA53_CPU27
+#define R8A7796_PD_CA53_CPU38
+#define R8A7796_PD_CA57_SCU12
+#define R8A7796_PD_CR7 13
+#define R8A7796_PD_A3VC14
+#define R8A7796_PD_3DG_A   17
+#define R8A7796_PD_3DG_B   18
+#define R8A7796_PD_CA53_SCU21
+#define R8A7796_PD_A3IR24
+#define R8A7796_PD_A2VC0   25
+#define R8A7796_PD_A2VC1   26
+
+/* Always-on power area */
+#define R8A7796_PD_ALWAYS_ON   32
+
+#endif /* __DT_BINDINGS_POWER_R8A7796_SYSC_H__ */
-- 
1.9.1

Re: [PATCH 14/49] ASoC: simple-card-core: add asoc_simple_card_parse_dpcm()

[Mark Brown]

On Fri, May 20, 2016 at 09:48:07AM +, Kuninori Morimoto wrote:
> From: Kuninori Morimoto 
> 
> simple-card like driver is supporting DPCM FE/BE.
> This patch makes this method simple style standard.

DPCM is very much an implementation detail of the current stack,
providing helpers that promote its use doesn't seem like the best idea -
we want to change it for in kernel use going forwards and that's going
to be harder with DPCM.  We should be encouraging bindings that make
DSPs look more like CODECs.


signature.asc
Description: PGP signature

Re: [PATCH v2 2/4] clk: renesas: Add r8a7796 CPG Core Clock Definitions

[Dirk Behme]

Hi Geert,

On 30.05.2016 18:28, Geert Uytterhoeven wrote:

Add all R-Car M3-W Clock Pulse Generator Core Clock Outputs, as listed
in Table 8.2b ("List of Clocks [R-Car M3-W]") of the R-Car Gen3
datasheet (rev. 0.51 + Errata for Rev051 Mar 31 2016).

Note that internal CPG clocks (S0, S1, S2, S3, SDSRC, and SSPSRC) are
not included, as they are used as internal clock sources only, and never
referenced from DT.

Signed-off-by: Geert Uytterhoeven 
Tested-by: Simon Horman 
---
v2:
   - Add Tested-by.
---
  include/dt-bindings/clock/r8a7796-cpg-mssr.h | 69 
  1 file changed, 69 insertions(+)
  create mode 100644 include/dt-bindings/clock/r8a7796-cpg-mssr.h

diff --git a/include/dt-bindings/clock/r8a7796-cpg-mssr.h 
b/include/dt-bindings/clock/r8a7796-cpg-mssr.h
new file mode 100644
index ..1e5942695f0dd057
--- /dev/null
+++ b/include/dt-bindings/clock/r8a7796-cpg-mssr.h
@@ -0,0 +1,69 @@
+/*
+ * Copyright (C) 2016 Renesas Electronics Corp.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+#ifndef __DT_BINDINGS_CLOCK_R8A7796_CPG_MSSR_H__
+#define __DT_BINDINGS_CLOCK_R8A7796_CPG_MSSR_H__
+
+#include 
+
+/* r8a7796 CPG Core Clocks */
+#define R8A7796_CLK_Z  0
+#define R8A7796_CLK_Z2 1
+#define R8A7796_CLK_ZR 2
+#define R8A7796_CLK_ZG 3
+#define R8A7796_CLK_ZTR4
+#define R8A7796_CLK_ZTRD2  5
+#define R8A7796_CLK_ZT 6
+#define R8A7796_CLK_ZX 7
+#define R8A7796_CLK_S0D1   8
+#define R8A7796_CLK_S0D2   9
+#define R8A7796_CLK_S0D3   10
+#define R8A7796_CLK_S0D4   11
+#define R8A7796_CLK_S0D6   12
+#define R8A7796_CLK_S0D8   13
+#define R8A7796_CLK_S0D12  14
+#define R8A7796_CLK_S1D1   15
+#define R8A7796_CLK_S1D2   16
+#define R8A7796_CLK_S1D4   17
+#define R8A7796_CLK_S2D1   18
+#define R8A7796_CLK_S2D2   19
+#define R8A7796_CLK_S2D4   20
+#define R8A7796_CLK_S3D1   21
+#define R8A7796_CLK_S3D2   22
+#define R8A7796_CLK_S3D4   23
+#define R8A7796_CLK_LB 24
+#define R8A7796_CLK_CL 25
+#define R8A7796_CLK_ZB326
+#define R8A7796_CLK_ZB3D2  27
+#define R8A7796_CLK_ZB3D4  28
+#define R8A7796_CLK_CR 29
+#define R8A7796_CLK_CRD2   30
+#define R8A7796_CLK_SD0H   31
+#define R8A7796_CLK_SD032
+#define R8A7796_CLK_SD1H   33
+#define R8A7796_CLK_SD134
+#define R8A7796_CLK_SD2H   35
+#define R8A7796_CLK_SD236
+#define R8A7796_CLK_SD3H   37
+#define R8A7796_CLK_SD338
+#define R8A7796_CLK_SSP2   39
+#define R8A7796_CLK_SSP1   40
+#define R8A7796_CLK_SSPRS  41
+#define R8A7796_CLK_RPC42
+#define R8A7796_CLK_RPCD2  43
+#define R8A7796_CLK_MSO44
+#define R8A7796_CLK_CANFD  45
+#define R8A7796_CLK_HDMI   46
+#define R8A7796_CLK_CSI0   47
+#define R8A7796_CLK_CSIREF 48
+#define R8A7796_CLK_CP 49
+#define R8A7796_CLK_CPEX   50
+#define R8A7796_CLK_R  51
+#define R8A7796_CLK_OSC52



I think we recently started a discussion to find a more clever way to 
avoid re-defining (copy & paste) all this R-Car3 clocks  (compare [1]) 
where they are the same over the R-Car3 family while still being able 
to deal with the differences.


Best regards

Dirk

[1] 
https://git.kernel.org/cgit/linux/kernel/git/torvalds/linux.git/tree/include/dt-bindings/clock/r8a7795-cpg-mssr.h

[PATCH v2 4/4] clk: renesas: cpg-mssr: Add support for R-Car M3-W

[Geert Uytterhoeven]

Initial support for R-Car M3-W (r8a7796), including basic core clocks,
and SCIF2 (console) and INTC-AP (GIC) module clocks.

Signed-off-by: Geert Uytterhoeven 
Tested-by: Simon Horman 
---
v2:
  - Add Tested-by.
---
 drivers/clk/renesas/Kconfig|   1 +
 drivers/clk/renesas/Makefile   |   1 +
 drivers/clk/renesas/r8a7796-cpg-mssr.c | 192 +
 drivers/clk/renesas/renesas-cpg-mssr.c |   6 ++
 drivers/clk/renesas/renesas-cpg-mssr.h |   1 +
 5 files changed, 201 insertions(+)
 create mode 100644 drivers/clk/renesas/r8a7796-cpg-mssr.c

diff --git a/drivers/clk/renesas/Kconfig b/drivers/clk/renesas/Kconfig
index 2115ce410cfb4bc9..fcad9ff090f5fd2b 100644
--- a/drivers/clk/renesas/Kconfig
+++ b/drivers/clk/renesas/Kconfig
@@ -1,6 +1,7 @@
 config CLK_RENESAS_CPG_MSSR
bool
default y if ARCH_R8A7795
+   default y if ARCH_R8A7796
 
 config CLK_RENESAS_CPG_MSTP
bool
diff --git a/drivers/clk/renesas/Makefile b/drivers/clk/renesas/Makefile
index 88924c95808c3b2e..0b8d31b4909c9690 100644
--- a/drivers/clk/renesas/Makefile
+++ b/drivers/clk/renesas/Makefile
@@ -9,6 +9,7 @@ obj-$(CONFIG_ARCH_R8A7791)  += clk-rcar-gen2.o 
clk-div6.o
 obj-$(CONFIG_ARCH_R8A7793) += clk-rcar-gen2.o clk-div6.o
 obj-$(CONFIG_ARCH_R8A7794) += clk-rcar-gen2.o clk-div6.o
 obj-$(CONFIG_ARCH_R8A7795) += r8a7795-cpg-mssr.o rcar-gen3-cpg.o
+obj-$(CONFIG_ARCH_R8A7796) += r8a7796-cpg-mssr.o rcar-gen3-cpg.o
 obj-$(CONFIG_ARCH_SH73A0)  += clk-sh73a0.o clk-div6.o
 
 obj-$(CONFIG_CLK_RENESAS_CPG_MSSR) += renesas-cpg-mssr.o clk-div6.o
diff --git a/drivers/clk/renesas/r8a7796-cpg-mssr.c 
b/drivers/clk/renesas/r8a7796-cpg-mssr.c
new file mode 100644
index ..c84b549c14d2e57d
--- /dev/null
+++ b/drivers/clk/renesas/r8a7796-cpg-mssr.c
@@ -0,0 +1,192 @@
+/*
+ * r8a7796 Clock Pulse Generator / Module Standby and Software Reset
+ *
+ * Copyright (C) 2016 Glider bvba
+ *
+ * Based on r8a7795-cpg-mssr.c
+ *
+ * Copyright (C) 2015 Glider bvba
+ * Copyright (C) 2015 Renesas Electronics Corp.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ */
+
+#include 
+#include 
+#include 
+
+#include 
+
+#include "renesas-cpg-mssr.h"
+#include "rcar-gen3-cpg.h"
+
+enum clk_ids {
+   /* Core Clock Outputs exported to DT */
+   LAST_DT_CORE_CLK = R8A7796_CLK_OSC,
+
+   /* External Input Clocks */
+   CLK_EXTAL,
+   CLK_EXTALR,
+
+   /* Internal Core Clocks */
+   CLK_MAIN,
+   CLK_PLL0,
+   CLK_PLL1,
+   CLK_PLL2,
+   CLK_PLL3,
+   CLK_PLL4,
+   CLK_PLL1_DIV2,
+   CLK_PLL1_DIV4,
+   CLK_S0,
+   CLK_S1,
+   CLK_S2,
+   CLK_S3,
+   CLK_SDSRC,
+   CLK_SSPSRC,
+
+   /* Module Clocks */
+   MOD_CLK_BASE
+};
+
+static const struct cpg_core_clk r8a7796_core_clks[] __initconst = {
+   /* External Clock Inputs */
+   DEF_INPUT("extal",  CLK_EXTAL),
+   DEF_INPUT("extalr", CLK_EXTALR),
+
+   /* Internal Core Clocks */
+   DEF_BASE(".main",   CLK_MAIN, CLK_TYPE_GEN3_MAIN, CLK_EXTAL),
+   DEF_BASE(".pll0",   CLK_PLL0, CLK_TYPE_GEN3_PLL0, CLK_MAIN),
+   DEF_BASE(".pll1",   CLK_PLL1, CLK_TYPE_GEN3_PLL1, CLK_MAIN),
+   DEF_BASE(".pll2",   CLK_PLL2, CLK_TYPE_GEN3_PLL2, CLK_MAIN),
+   DEF_BASE(".pll3",   CLK_PLL3, CLK_TYPE_GEN3_PLL3, CLK_MAIN),
+   DEF_BASE(".pll4",   CLK_PLL4, CLK_TYPE_GEN3_PLL4, CLK_MAIN),
+
+   DEF_FIXED(".pll1_div2", CLK_PLL1_DIV2, CLK_PLL1,   2, 1),
+   DEF_FIXED(".pll1_div4", CLK_PLL1_DIV4, CLK_PLL1_DIV2,  2, 1),
+   DEF_FIXED(".s0",CLK_S0,CLK_PLL1_DIV2,  2, 1),
+   DEF_FIXED(".s1",CLK_S1,CLK_PLL1_DIV2,  3, 1),
+   DEF_FIXED(".s2",CLK_S2,CLK_PLL1_DIV2,  4, 1),
+   DEF_FIXED(".s3",CLK_S3,CLK_PLL1_DIV2,  6, 1),
+
+   /* Core Clock Outputs */
+   DEF_FIXED("ztr",R8A7796_CLK_ZTR,   CLK_PLL1_DIV2,  6, 1),
+   DEF_FIXED("ztrd2",  R8A7796_CLK_ZTRD2, CLK_PLL1_DIV2, 12, 1),
+   DEF_FIXED("zt", R8A7796_CLK_ZT,CLK_PLL1_DIV2,  4, 1),
+   DEF_FIXED("zx", R8A7796_CLK_ZX,CLK_PLL1_DIV2,  2, 1),
+   DEF_FIXED("s0d1",   R8A7796_CLK_S0D1,  CLK_S0, 1, 1),
+   DEF_FIXED("s0d2",   R8A7796_CLK_S0D2,  CLK_S0, 2, 1),
+   DEF_FIXED("s0d3",   R8A7796_CLK_S0D3,  CLK_S0, 3, 1),
+   DEF_FIXED("s0d4",   R8A7796_CLK_S0D4,  CLK_S0, 4, 1),
+   DEF_FIXED("s0d6",   R8A7796_CLK_S0D6,  CLK_S0, 6, 1),
+   DEF_FIXED("s0d8",   R8A7796_CLK_S0D8,  CLK_S0, 8, 1),
+   DEF_FIXED("s0d12",  R8A7796_CLK_S0D12, CLK_S0,12, 

[PATCH v2 2/4] clk: renesas: Add r8a7796 CPG Core Clock Definitions

[Geert Uytterhoeven]

Add all R-Car M3-W Clock Pulse Generator Core Clock Outputs, as listed
in Table 8.2b ("List of Clocks [R-Car M3-W]") of the R-Car Gen3
datasheet (rev. 0.51 + Errata for Rev051 Mar 31 2016).

Note that internal CPG clocks (S0, S1, S2, S3, SDSRC, and SSPSRC) are
not included, as they are used as internal clock sources only, and never
referenced from DT.

Signed-off-by: Geert Uytterhoeven 
Tested-by: Simon Horman 
---
v2:
  - Add Tested-by.
---
 include/dt-bindings/clock/r8a7796-cpg-mssr.h | 69 
 1 file changed, 69 insertions(+)
 create mode 100644 include/dt-bindings/clock/r8a7796-cpg-mssr.h

diff --git a/include/dt-bindings/clock/r8a7796-cpg-mssr.h 
b/include/dt-bindings/clock/r8a7796-cpg-mssr.h
new file mode 100644
index ..1e5942695f0dd057
--- /dev/null
+++ b/include/dt-bindings/clock/r8a7796-cpg-mssr.h
@@ -0,0 +1,69 @@
+/*
+ * Copyright (C) 2016 Renesas Electronics Corp.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+#ifndef __DT_BINDINGS_CLOCK_R8A7796_CPG_MSSR_H__
+#define __DT_BINDINGS_CLOCK_R8A7796_CPG_MSSR_H__
+
+#include 
+
+/* r8a7796 CPG Core Clocks */
+#define R8A7796_CLK_Z  0
+#define R8A7796_CLK_Z2 1
+#define R8A7796_CLK_ZR 2
+#define R8A7796_CLK_ZG 3
+#define R8A7796_CLK_ZTR4
+#define R8A7796_CLK_ZTRD2  5
+#define R8A7796_CLK_ZT 6
+#define R8A7796_CLK_ZX 7
+#define R8A7796_CLK_S0D1   8
+#define R8A7796_CLK_S0D2   9
+#define R8A7796_CLK_S0D3   10
+#define R8A7796_CLK_S0D4   11
+#define R8A7796_CLK_S0D6   12
+#define R8A7796_CLK_S0D8   13
+#define R8A7796_CLK_S0D12  14
+#define R8A7796_CLK_S1D1   15
+#define R8A7796_CLK_S1D2   16
+#define R8A7796_CLK_S1D4   17
+#define R8A7796_CLK_S2D1   18
+#define R8A7796_CLK_S2D2   19
+#define R8A7796_CLK_S2D4   20
+#define R8A7796_CLK_S3D1   21
+#define R8A7796_CLK_S3D2   22
+#define R8A7796_CLK_S3D4   23
+#define R8A7796_CLK_LB 24
+#define R8A7796_CLK_CL 25
+#define R8A7796_CLK_ZB326
+#define R8A7796_CLK_ZB3D2  27
+#define R8A7796_CLK_ZB3D4  28
+#define R8A7796_CLK_CR 29
+#define R8A7796_CLK_CRD2   30
+#define R8A7796_CLK_SD0H   31
+#define R8A7796_CLK_SD032
+#define R8A7796_CLK_SD1H   33
+#define R8A7796_CLK_SD134
+#define R8A7796_CLK_SD2H   35
+#define R8A7796_CLK_SD236
+#define R8A7796_CLK_SD3H   37
+#define R8A7796_CLK_SD338
+#define R8A7796_CLK_SSP2   39
+#define R8A7796_CLK_SSP1   40
+#define R8A7796_CLK_SSPRS  41
+#define R8A7796_CLK_RPC42
+#define R8A7796_CLK_RPCD2  43
+#define R8A7796_CLK_MSO44
+#define R8A7796_CLK_CANFD  45
+#define R8A7796_CLK_HDMI   46
+#define R8A7796_CLK_CSI0   47
+#define R8A7796_CLK_CSIREF 48
+#define R8A7796_CLK_CP 49
+#define R8A7796_CLK_CPEX   50
+#define R8A7796_CLK_R  51
+#define R8A7796_CLK_OSC52
+
+#endif /* __DT_BINDINGS_CLOCK_R8A7796_CPG_MSSR_H__ */
-- 
1.9.1

Re: [PATCH 05/49] ASoC: add new simple-card-core.c

[Mark Brown]

On Fri, May 20, 2016 at 09:42:25AM +, Kuninori Morimoto wrote:

> future. Maybe it want to use simple-card like feature / function.
> Because of these background, this patch tries to create
> new simple-card-core, and provides common function to each drivers.
> 1st is asoc_simple_card_parse_daifmt()

This isn't really a core but more helper functions so should probably be
called -utils or something.  In the past we've added helpers to the
core, though this particular one is obviously a bit different as most
machine drivers should be expected to have the formats hard coded into
them - it's not something we'd normally have in the DT since it
shouldn't be varying except in the case of very generic drivers like
simple-card.


signature.asc
Description: PGP signature

Re: [RFC 08/21] drm: rcar-du: Add DPLL support

[Dirk Behme]

On 30.05.2016 18:00, Ulrich Hecht wrote:

From: Koji Matsuoka 

Signed-off-by: Koji Matsuoka 
Signed-off-by: Geert Uytterhoeven 
---
  drivers/gpu/drm/rcar-du/rcar_du_crtc.c  | 97 -
  drivers/gpu/drm/rcar-du/rcar_du_crtc.h  |  8 +++
  drivers/gpu/drm/rcar-du/rcar_du_drv.c   |  1 +
  drivers/gpu/drm/rcar-du/rcar_du_drv.h   |  1 +
  drivers/gpu/drm/rcar-du/rcar_du_plane.h |  7 ++-
  drivers/gpu/drm/rcar-du/rcar_du_regs.h  | 19 +++
  6 files changed, 131 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/rcar-du/rcar_du_crtc.c 
b/drivers/gpu/drm/rcar-du/rcar_du_crtc.c
index 0d8bdda..e10943b 100644
--- a/drivers/gpu/drm/rcar-du/rcar_du_crtc.c
+++ b/drivers/gpu/drm/rcar-du/rcar_du_crtc.c
@@ -30,6 +30,12 @@
  #include "rcar_du_regs.h"
  #include "rcar_du_vsp.h"

+#define PRODUCT_REG0xfff00044
+#define PRODUCT_H3_BIT (0x4f << 8)
+#define PRODUCT_MASK   (0x7f << 8)
+#define CUT_ES1(0x00)
+#define CUT_ES1_MASK   (0x00ff)



NACK for the hard coded register.

We've already discussed this in the thread

https://www.mail-archive.com/linux-renesas-soc@vger.kernel.org/msg04008.html

and found that this isn't ready this way:

https://www.mail-archive.com/linux-renesas-soc@vger.kernel.org/msg04079.html

Best regards

Dirk




  static u32 rcar_du_crtc_read(struct rcar_du_crtc *rcrtc, u32 reg)
  {
struct rcar_du_device *rcdu = rcrtc->group->dev;
@@ -106,14 +112,74 @@ static void rcar_du_crtc_put(struct rcar_du_crtc *rcrtc)
   * Hardware Setup
   */

+static void rcar_du_dpll_divider(struct dpll_info *dpll, unsigned int extclk,
+unsigned int mode_clock)
+{
+   unsigned long dpllclk;
+   unsigned long diff;
+   unsigned long n, m, fdpll;
+   bool match_flag = false;
+   bool clk_diff_set = true;
+
+   for (n = 39; n < 120; n++) {
+   for (m = 0; m < 4; m++) {
+   for (fdpll = 1; fdpll < 32; fdpll++) {
+   /* 1/2 (FRQSEL=1) for duty rate 50% */
+   dpllclk = extclk * (n + 1) / (m + 1)
+/ (fdpll + 1) / 2;
+   if (dpllclk >= 4)
+   continue;
+
+   diff = abs((long)dpllclk - (long)mode_clock);
+   if (clk_diff_set ||
+   ((diff == 0) || (dpll->diff > diff))) {
+   dpll->diff = diff;
+   dpll->n = n;
+   dpll->m = m;
+   dpll->fdpll = fdpll;
+   dpll->dpllclk = dpllclk;
+
+   if (clk_diff_set)
+   clk_diff_set = false;
+
+   if (diff == 0) {
+   match_flag = true;
+   break;
+   }
+   }
+   }
+   if (match_flag)
+   break;
+   }
+   if (match_flag)
+   break;
+   }
+}
+
  static void rcar_du_crtc_set_display_timing(struct rcar_du_crtc *rcrtc)
  {
const struct drm_display_mode *mode = >crtc.state->adjusted_mode;
+   struct rcar_du_device *rcdu = rcrtc->group->dev;
unsigned long mode_clock = mode->clock * 1000;
unsigned long clk;
u32 value;
u32 escr;
u32 div;
+   u32 dpll_reg = 0;
+   struct dpll_info *dpll;
+   void __iomem *product_reg;
+   bool h3_es1_workaround = false;
+
+   dpll = kzalloc(sizeof(*dpll), GFP_KERNEL);
+   if (dpll == NULL)
+   return;
+
+   /* DU2 DPLL Clock Select bit workaround in R-Car H3(ES1.0) */
+   product_reg = ioremap(PRODUCT_REG, 0x04);
+   if (((readl(product_reg) & PRODUCT_MASK) == PRODUCT_H3_BIT)
+   && ((readl(product_reg) & CUT_ES1_MASK) == CUT_ES1))
+   h3_es1_workaround = true;
+   iounmap(product_reg);

/* Compute the clock divisor and select the internal or external dot
 * clock based on the requested frequency.
@@ -130,6 +196,15 @@ static void rcar_du_crtc_set_display_timing(struct 
rcar_du_crtc *rcrtc)
u32 extdiv;

extclk = clk_get_rate(rcrtc->extclock);
+
+   if (rcdu->info->dpll_ch & (0x01 << rcrtc->index)) {
+   rcar_du_dpll_divider(dpll, extclk, mode_clock);
+   extclk = dpll->dpllclk;
+   dev_dbg(rcrtc->group->dev->dev,
+   "dpllclk:%d, fdpll:%d, n:%d, 

Applied "ASoC: rsrc-card: remove unused dai_num" to the asoc tree

[Mark Brown]

The patch

   ASoC: rsrc-card: remove unused dai_num

has been applied to the asoc tree at

   git://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git 

All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24 hours) and sent to Linus during
the next merge window (or sooner if it is a bug fix), however if
problems are discovered then the patch may be dropped or reverted.  

You may get further e-mails resulting from automated or manual testing
and review of the tree, please engage with people reporting problems and
send followup patches addressing any issues that are reported if needed.

If any updates are required or you are submitting further changes they
should be sent as incremental updates against current git, existing
patches will not be replaced.

Please add any relevant lists and maintainers to the CCs when replying
to this mail.

Thanks,
Mark

>From 52fd98bcaf22052fc8946d36b13d5e646b7b41b0 Mon Sep 17 00:00:00 2001
From: Kuninori Morimoto 
Date: Fri, 20 May 2016 09:39:55 +
Subject: [PATCH] ASoC: rsrc-card: remove unused dai_num

Signed-off-by: Kuninori Morimoto 
Signed-off-by: Mark Brown 
---
 sound/soc/sh/rcar/rsrc-card.c | 2 --
 1 file changed, 2 deletions(-)

diff --git a/sound/soc/sh/rcar/rsrc-card.c b/sound/soc/sh/rcar/rsrc-card.c
index 1bc7ecfc42a9..b85b5ee5fad4 100644
--- a/sound/soc/sh/rcar/rsrc-card.c
+++ b/sound/soc/sh/rcar/rsrc-card.c
@@ -64,7 +64,6 @@ struct rsrc_card_priv {
struct snd_soc_codec_conf codec_conf;
struct rsrc_card_dai *dai_props;
struct snd_soc_dai_link *dai_link;
-   int dai_num;
u32 convert_rate;
u32 convert_channels;
 };
@@ -418,7 +417,6 @@ static int rsrc_card_parse_of(struct device_node *node,
 
priv->dai_props = props;
priv->dai_link  = links;
-   priv->dai_num   = num;
 
/* Init snd_soc_card */
priv->snd_card.owner= THIS_MODULE;
-- 
2.8.1

[RFC 21/21] arm64: defconfig: add VIDEO_RENESAS_FCP

[Ulrich Hecht]

From: Kuninori Morimoto 

DRM_RCAR_VSP requests VIDEO_RENESAS_VSP1, and VIDEO_RENESAS_VSP1 requests
VIDEO_RENESAS_FCP. But VIDEO_RENESAS_FCP is not set on defconfig.
This patch adds it. Otherwise kernel goes to Oops.

Signed-off-by: Kuninori Morimoto 
Signed-off-by: Geert Uytterhoeven 
---
 arch/arm64/configs/defconfig | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig
index fc10983..bc9bfff 100644
--- a/arch/arm64/configs/defconfig
+++ b/arch/arm64/configs/defconfig
@@ -220,6 +220,7 @@ CONFIG_V4L_PLATFORM_DRIVERS=y
 CONFIG_SOC_CAMERA=y
 CONFIG_SOC_CAMERA_PLATFORM=y
 CONFIG_V4L_MEM2MEM_DRIVERS=y
+CONFIG_VIDEO_RENESAS_FCP=y
 CONFIG_VIDEO_RENESAS_VSP1=y
 CONFIG_DRM=y
 CONFIG_DRM_RCAR_DU=y
-- 
2.7.4

[RFC 20/21] arm64: dts: r8a7795: add HDMI support to DU

[Ulrich Hecht]

Signed-off-by: Ulrich Hecht 
Signed-off-by: Geert Uytterhoeven 
---
 arch/arm64/boot/dts/renesas/r8a7795.dtsi | 17 +++--
 1 file changed, 15 insertions(+), 2 deletions(-)

diff --git a/arch/arm64/boot/dts/renesas/r8a7795.dtsi 
b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
index fcad91a..6e0737b 100644
--- a/arch/arm64/boot/dts/renesas/r8a7795.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
@@ -1555,12 +1555,25 @@
 < CPG_MOD 723>,
 < CPG_MOD 722>,
 < CPG_MOD 721>,
-< CPG_MOD 727>;
-   clock-names = "du.0", "du.1", "du.2", "du.3", "lvds.0";
+< CPG_MOD 727>,
+< CPG_MOD 729>,
+< CPG_MOD 728>,
+<_clk0>,
+<_clk>,
+<_clk>,
+<_clk1>;
+   clock-names = "du.0", "du.1", "du.2", "du.3", "lvds.0",
+ "isfr.0", "isfr.1", "dclkin.0",
+ "dclkin.1", "dclkin.2", "dclkin.3";
status = "disabled";
 
vsps = <   >;
 
+   hdmi = < >;
+   interlaced = <1>;
+   clock-iahb = <0>;
+   hdmi-num = <2>;
+
ports {
#address-cells = <1>;
#size-cells = <0>;
-- 
2.7.4

[RFC 19/21] arm64: configs: Enable R-Car DU related config

[Ulrich Hecht]

From: Koji Matsuoka 

Signed-off-by: Koji Matsuoka 
Signed-off-by: Geert Uytterhoeven 
---
 arch/arm64/configs/defconfig | 14 ++
 1 file changed, 14 insertions(+)

diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig
index aa47366..fc10983 100644
--- a/arch/arm64/configs/defconfig
+++ b/arch/arm64/configs/defconfig
@@ -212,6 +212,20 @@ CONFIG_REGULATOR_HI655X=y
 CONFIG_REGULATOR_QCOM_SMD_RPM=y
 CONFIG_REGULATOR_QCOM_SPMI=y
 CONFIG_REGULATOR_S2MPS11=y
+CONFIG_MEDIA_SUPPORT=y
+CONFIG_MEDIA_CAMERA_SUPPORT=y
+CONFIG_MEDIA_CONTROLLER=y
+CONFIG_VIDEO_V4L2_SUBDEV_API=y
+CONFIG_V4L_PLATFORM_DRIVERS=y
+CONFIG_SOC_CAMERA=y
+CONFIG_SOC_CAMERA_PLATFORM=y
+CONFIG_V4L_MEM2MEM_DRIVERS=y
+CONFIG_VIDEO_RENESAS_VSP1=y
+CONFIG_DRM=y
+CONFIG_DRM_RCAR_DU=y
+CONFIG_DRM_RCAR_HDMI=y
+CONFIG_DRM_RCAR_LVDS=y
+CONFIG_DRM_RCAR_VSP=y
 CONFIG_FB=y
 CONFIG_FB_ARMCLCD=y
 CONFIG_FRAMEBUFFER_CONSOLE=y
-- 
2.7.4

[RFC 18/21] arm64: dts: salvator-x: Add DU pins, HDMI connectors and encoder

[Ulrich Hecht]

From: Koji Matsuoka 

Based on work by Koji Matsuoka.

Signed-off-by: Ulrich Hecht 
[geert: Re-add removed extal_clk]
[geert: Modify existing du node instead of moving it around]
[geert: Use generic pinctrl properties]
Signed-off-by: Geert Uytterhoeven 
---
 arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts | 107 +
 1 file changed, 107 insertions(+)

diff --git a/arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts 
b/arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts
index f8e4e33..c09ead3 100644
--- a/arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts
+++ b/arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts
@@ -169,17 +169,119 @@
};
};
};
+
+   hdmi0-encoder {
+   compatible = "rockchip,rcar-dw-hdmi";
+
+   ports {
+   #address-cells = <1>;
+   #size-cells = <0>;
+   port@0 {
+   reg = <0>;
+   rcar_dw_hdmi0_in: endpoint {
+   remote-endpoint = <_out_hdmi0>;
+   };
+   };
+   port@1 {
+   reg = <1>;
+   rcar_dw_hdmi0_out: endpoint {
+   remote-endpoint = <_con>;
+   };
+   };
+   };
+   };
+
+   hdmi0-out {
+   compatible = "hdmi-connector";
+   type = "a";
+
+   port {
+   hdmi0_con: endpoint {
+   remote-endpoint = <_dw_hdmi0_out>;
+   };
+   };
+   };
+
+   hdmi1-encoder {
+   compatible = "rockchip,rcar-dw-hdmi";
+
+   ports {
+   #address-cells = <1>;
+   #size-cells = <0>;
+   port@0 {
+   reg = <0>;
+   rcar_dw_hdmi1_in: endpoint {
+   remote-endpoint = <_out_hdmi1>;
+   };
+   };
+   port@1 {
+   reg = <1>;
+   rcar_dw_hdmi1_out: endpoint {
+   remote-endpoint = <_con>;
+   };
+   };
+   };
+   };
+
+   hdmi1-out {
+   compatible = "hdmi-connector";
+   type = "a";
+
+   port {
+   hdmi1_con: endpoint {
+   remote-endpoint = <_dw_hdmi1_out>;
+   };
+   };
+   };
+
+   programable_clk0: clock_out0 {
+   compatible = "fixed-clock";
+   #clock-cells = <0>;
+   clock-frequency = <14850>;
+   };
+
+   x21_clk: x21-clock {
+   compatible = "fixed-clock";
+   #clock-cells = <0>;
+   clock-frequency = <3300>;
+   };
+
+   x22_clk: x22-clock {
+   compatible = "fixed-clock";
+   #clock-cells = <0>;
+   clock-frequency = <3300>;
+   };
+
+   programable_clk1: clock_out1 {
+   compatible = "fixed-clock";
+   #clock-cells = <0>;
+   clock-frequency = <10800>;
+   };
 };
 
  {
+   pinctrl-0 = <_pins>;
+   pinctrl-names = "default";
status = "okay";
 
+   backlight = < 7 GPIO_ACTIVE_HIGH>;
+
ports {
port@0 {
endpoint {
remote-endpoint = <_in>;
};
};
+   port@1 {
+   endpoint {
+   remote-endpoint = <_dw_hdmi0_in>;
+   };
+   };
+   port@2 {
+   endpoint {
+   remote-endpoint = <_dw_hdmi1_in>;
+   };
+   };
};
 };
 
@@ -256,6 +358,11 @@
groups = "usb2";
function = "usb2";
};
+
+   du_pins: du {
+   groups = "du_rgb888", "du_sync", "du_clk_out_0", "du_disp";
+   function = "du";
+   };
 };
 
  {
-- 
2.7.4

[RFC 17/21] arm64: dts: r8a7795: Add HDMI encoder support

[Ulrich Hecht]

Based on work by  Koji Matsuoka.

Signed-off-by: Ulrich Hecht 
Signed-off-by: Geert Uytterhoeven 
---
 arch/arm64/boot/dts/renesas/r8a7795.dtsi | 16 
 1 file changed, 16 insertions(+)

diff --git a/arch/arm64/boot/dts/renesas/r8a7795.dtsi 
b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
index c9919d2..fcad91a 100644
--- a/arch/arm64/boot/dts/renesas/r8a7795.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
@@ -1587,5 +1587,21 @@
};
};
};
+
+   hdmi0: hdmi0@fead {
+   compatible = "renesas,hdmi";
+   reg = <0 0xfead 0 0x1>;
+   interrupts = <0 389 IRQ_TYPE_LEVEL_HIGH>;
+   clocks = < CPG_MOD 729>;
+   power-domains = < R8A7795_PD_ALWAYS_ON>;
+   };
+
+   hdmi1: hdmi1@feae {
+   compatible = "renesas,hdmi";
+   reg = <0 0xfeae 0 0x1>;
+   interrupts = <0 436 IRQ_TYPE_LEVEL_HIGH>;
+   clocks = < CPG_MOD 728>;
+   power-domains = < R8A7795_PD_ALWAYS_ON>;
+   };
};
 };
-- 
2.7.4

[RFC 13/21] drm: rcar-du: Fix display max size to 4096x2160 size

[Ulrich Hecht]

From: Koji Matsuoka 

Signed-off-by: Koji Matsuoka 
Signed-off-by: Geert Uytterhoeven 
---
 drivers/gpu/drm/rcar-du/rcar_du_kms.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/rcar-du/rcar_du_kms.c 
b/drivers/gpu/drm/rcar-du/rcar_du_kms.c
index a8c59c3..d6d9acb 100644
--- a/drivers/gpu/drm/rcar-du/rcar_du_kms.c
+++ b/drivers/gpu/drm/rcar-du/rcar_du_kms.c
@@ -611,8 +611,8 @@ int rcar_du_modeset_init(struct rcar_du_device *rcdu)
 
dev->mode_config.min_width = 0;
dev->mode_config.min_height = 0;
-   dev->mode_config.max_width = 4095;
-   dev->mode_config.max_height = 2047;
+   dev->mode_config.max_width = 4096;
+   dev->mode_config.max_height = 2160;
dev->mode_config.funcs = _du_mode_config_funcs;
 
rcdu->num_crtcs = rcdu->info->num_crtcs;
-- 
2.7.4

[RFC 16/21] pinctrl: sh-pfc: r8a7795: Add HDMI CEC support

[Ulrich Hecht]

Adds DU pinmux support to r8a7795 SoC.
Based on work by Takeshi Kihara.

Signed-off-by: Ulrich Hecht 
Signed-off-by: Geert Uytterhoeven 
---
 drivers/pinctrl/sh-pfc/pfc-r8a7795.c | 27 +++
 1 file changed, 27 insertions(+)

diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7795.c 
b/drivers/pinctrl/sh-pfc/pfc-r8a7795.c
index 66cee18..515b88f 100644
--- a/drivers/pinctrl/sh-pfc/pfc-r8a7795.c
+++ b/drivers/pinctrl/sh-pfc/pfc-r8a7795.c
@@ -1721,6 +1721,21 @@ static const unsigned int du_disp_pins[] = {
 static const unsigned int du_disp_mux[] = {
DU_DISP_MARK,
 };
+/* - HDMI --- 
*/
+static const unsigned int hdmi0_cec_pins[] = {
+   /* HDMI0_CEC */
+   RCAR_GP_PIN(7, 2),
+};
+static const unsigned int hdmi0_cec_mux[] = {
+   HDMI0_CEC_MARK,
+};
+static const unsigned int hdmi1_cec_pins[] = {
+   /* HDMI0_CEC */
+   RCAR_GP_PIN(7, 3),
+};
+static const unsigned int hdmi1_cec_mux[] = {
+   HDMI1_CEC_MARK,
+};
 
 /* - HSCIF0 - 
*/
 static const unsigned int hscif0_data_pins[] = {
@@ -3421,6 +3436,8 @@ static const struct sh_pfc_pin_group pinmux_groups[] = {
SH_PFC_PIN_GROUP(du_oddf),
SH_PFC_PIN_GROUP(du_cde),
SH_PFC_PIN_GROUP(du_disp),
+   SH_PFC_PIN_GROUP(hdmi0_cec),
+   SH_PFC_PIN_GROUP(hdmi1_cec),
SH_PFC_PIN_GROUP(hscif0_data),
SH_PFC_PIN_GROUP(hscif0_clk),
SH_PFC_PIN_GROUP(hscif0_ctrl),
@@ -3660,6 +3677,14 @@ static const char * const du_groups[] = {
"du_disp",
 };
 
+static const char * const hdmi0_groups[] = {
+   "hdmi0_cec",
+};
+
+static const char * const hdmi1_groups[] = {
+   "hdmi1_cec",
+};
+
 static const char * const audio_clk_groups[] = {
"audio_clk_a_a",
"audio_clk_a_b",
@@ -4058,6 +4083,8 @@ static const struct sh_pfc_function pinmux_functions[] = {
SH_PFC_FUNCTION(canfd0),
SH_PFC_FUNCTION(canfd1),
SH_PFC_FUNCTION(du),
+   SH_PFC_FUNCTION(hdmi0),
+   SH_PFC_FUNCTION(hdmi1),
SH_PFC_FUNCTION(hscif0),
SH_PFC_FUNCTION(hscif1),
SH_PFC_FUNCTION(hscif2),
-- 
2.7.4

[RFC 15/21] pinctrl: sh-pfc: r8a7795: Add DU support

[Ulrich Hecht]

Adds DU pinmux support to r8a7795 SoC.
Based on work by Takeshi Kihara.

Signed-off-by: Ulrich Hecht 
Signed-off-by: Geert Uytterhoeven 
---
 drivers/pinctrl/sh-pfc/pfc-r8a7795.c | 86 
 1 file changed, 86 insertions(+)

diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7795.c 
b/drivers/pinctrl/sh-pfc/pfc-r8a7795.c
index 44632b1..66cee18 100644
--- a/drivers/pinctrl/sh-pfc/pfc-r8a7795.c
+++ b/drivers/pinctrl/sh-pfc/pfc-r8a7795.c
@@ -1654,6 +1654,74 @@ static const unsigned int canfd1_data_mux[] = {
CANFD1_TX_MARK, CANFD1_RX_MARK,
 };
 
+/* - DU - 
*/
+static const unsigned int du_rgb888_pins[] = {
+   /* R[7:0] */
+   RCAR_GP_PIN(0, 15), RCAR_GP_PIN(0, 14), RCAR_GP_PIN(0, 13),
+   RCAR_GP_PIN(0, 12), RCAR_GP_PIN(0, 11), RCAR_GP_PIN(0, 10),
+   RCAR_GP_PIN(0, 9),  RCAR_GP_PIN(3, 8),
+
+   /* G[7:0] */
+   RCAR_GP_PIN(1, 15), RCAR_GP_PIN(1, 14), RCAR_GP_PIN(1, 13),
+   RCAR_GP_PIN(1, 12), RCAR_GP_PIN(1, 19), RCAR_GP_PIN(1, 18),
+   RCAR_GP_PIN(1, 17), RCAR_GP_PIN(1, 16),
+
+   /* B[7:0] */
+   RCAR_GP_PIN(1, 7),  RCAR_GP_PIN(1, 6),  RCAR_GP_PIN(1, 5),
+   RCAR_GP_PIN(1, 4),  RCAR_GP_PIN(1, 3),  RCAR_GP_PIN(1, 2),
+   RCAR_GP_PIN(1, 1),  RCAR_GP_PIN(1, 0),
+};
+static const unsigned int du_rgb888_mux[] = {
+   DU_DR7_MARK, DU_DR6_MARK, DU_DR5_MARK, DU_DR4_MARK,
+   DU_DR3_MARK, DU_DR2_MARK, DU_DR1_MARK, DU_DR0_MARK,
+   DU_DG7_MARK, DU_DG6_MARK, DU_DG5_MARK, DU_DG4_MARK,
+   DU_DG3_MARK, DU_DG2_MARK, DU_DG1_MARK, DU_DG0_MARK,
+   DU_DB7_MARK, DU_DB6_MARK, DU_DB5_MARK, DU_DB4_MARK,
+   DU_DB3_MARK, DU_DB2_MARK, DU_DB1_MARK, DU_DB0_MARK,
+};
+static const unsigned int du_clk_out_0_pins[] = {
+   /* CLKOUT */
+   RCAR_GP_PIN(1, 27),
+};
+static const unsigned int du_clk_out_0_mux[] = {
+   DU_DOTCLKOUT0_MARK
+};
+static const unsigned int du_clk_out_1_pins[] = {
+   /* CLKOUT */
+   RCAR_GP_PIN(2, 3),
+};
+static const unsigned int du_clk_out_1_mux[] = {
+   DU_DOTCLKOUT1_MARK
+};
+static const unsigned int du_sync_pins[] = {
+   /* EXVSYNC/VSYNC, EXHSYNC/HSYNC */
+   RCAR_GP_PIN(2, 5), RCAR_GP_PIN(2, 4),
+};
+static const unsigned int du_sync_mux[] = {
+   DU_EXVSYNC_DU_VSYNC_MARK, DU_EXHSYNC_DU_HSYNC_MARK
+};
+static const unsigned int du_oddf_pins[] = {
+   /* EXDISP/EXODDF/EXCDE */
+   RCAR_GP_PIN(2, 2),
+};
+static const unsigned int du_oddf_mux[] = {
+   DU_EXODDF_DU_ODDF_DISP_CDE_MARK,
+};
+static const unsigned int du_cde_pins[] = {
+   /* CDE */
+   RCAR_GP_PIN(2, 0),
+};
+static const unsigned int du_cde_mux[] = {
+   DU_CDE_MARK,
+};
+static const unsigned int du_disp_pins[] = {
+   /* DISP */
+   RCAR_GP_PIN(2, 1),
+};
+static const unsigned int du_disp_mux[] = {
+   DU_DISP_MARK,
+};
+
 /* - HSCIF0 - 
*/
 static const unsigned int hscif0_data_pins[] = {
/* RX, TX */
@@ -3346,6 +3414,13 @@ static const struct sh_pfc_pin_group pinmux_groups[] = {
SH_PFC_PIN_GROUP(canfd0_data_a),
SH_PFC_PIN_GROUP(canfd0_data_b),
SH_PFC_PIN_GROUP(canfd1_data),
+   SH_PFC_PIN_GROUP(du_rgb888),
+   SH_PFC_PIN_GROUP(du_clk_out_0),
+   SH_PFC_PIN_GROUP(du_clk_out_1),
+   SH_PFC_PIN_GROUP(du_sync),
+   SH_PFC_PIN_GROUP(du_oddf),
+   SH_PFC_PIN_GROUP(du_cde),
+   SH_PFC_PIN_GROUP(du_disp),
SH_PFC_PIN_GROUP(hscif0_data),
SH_PFC_PIN_GROUP(hscif0_clk),
SH_PFC_PIN_GROUP(hscif0_ctrl),
@@ -3575,6 +3650,16 @@ static const struct sh_pfc_pin_group pinmux_groups[] = {
SH_PFC_PIN_GROUP(usb2),
 };
 
+static const char * const du_groups[] = {
+   "du_rgb888",
+   "du_clk_out_0",
+   "du_clk_out_1",
+   "du_sync",
+   "du_oddf",
+   "du_cde",
+   "du_disp",
+};
+
 static const char * const audio_clk_groups[] = {
"audio_clk_a_a",
"audio_clk_a_b",
@@ -3972,6 +4057,7 @@ static const struct sh_pfc_function pinmux_functions[] = {
SH_PFC_FUNCTION(can_clk),
SH_PFC_FUNCTION(canfd0),
SH_PFC_FUNCTION(canfd1),
+   SH_PFC_FUNCTION(du),
SH_PFC_FUNCTION(hscif0),
SH_PFC_FUNCTION(hscif1),
SH_PFC_FUNCTION(hscif2),
-- 
2.7.4

[RFC 14/21] v4l: vsp1: Change VSP1 LIF linebuffer FIFO

[Ulrich Hecht]

This patch changes to VSPD hardware recommended value.
Purpose is highest pixel clock without underruns.
In the default R-Car Linux BSP config this value is
wrong and therefore there are many underruns.

Signed-off-by: Takashi Saito 
Signed-off-by: Koji Matsuoka 
Signed-off-by: Ulrich Hecht 
Signed-off-by: Geert Uytterhoeven 
---
 drivers/media/platform/vsp1/vsp1_lif.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/drivers/media/platform/vsp1/vsp1_lif.c 
b/drivers/media/platform/vsp1/vsp1_lif.c
index 60d26b6..b34e80f 100644
--- a/drivers/media/platform/vsp1/vsp1_lif.c
+++ b/drivers/media/platform/vsp1/vsp1_lif.c
@@ -126,9 +126,9 @@ static void lif_configure(struct vsp1_entity *entity,
 {
const struct v4l2_mbus_framefmt *format;
struct vsp1_lif *lif = to_lif(>subdev);
-   unsigned int hbth = 1300;
-   unsigned int obth = 400;
-   unsigned int lbth = 200;
+   unsigned int hbth = 0;
+   unsigned int obth = 3000;
+   unsigned int lbth = 0;
 
format = vsp1_entity_get_pad_format(>entity, lif->entity.config,
LIF_PAD_SOURCE);
-- 
2.7.4

[RFC 12/21] drm: rcar-du: Add pixel format support

[Ulrich Hecht]

From: Koji Matsuoka 

This patch supports pixel format of RGB332, ARGB, XRGB,
BGR888, RGB888, BGRA, BGRX, YVYU and NV61.
VYUY format is not supported by H/W.

Signed-off-by: Koji Matsuoka 
Signed-off-by: Geert Uytterhoeven 
---
 drivers/gpu/drm/rcar-du/rcar_du_kms.c | 58 +--
 drivers/gpu/drm/rcar-du/rcar_du_kms.h |  1 +
 drivers/gpu/drm/rcar-du/rcar_du_vsp.c | 49 +
 3 files changed, 106 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/rcar-du/rcar_du_kms.c 
b/drivers/gpu/drm/rcar-du/rcar_du_kms.c
index baac8c9..a8c59c3 100644
--- a/drivers/gpu/drm/rcar-du/rcar_du_kms.c
+++ b/drivers/gpu/drm/rcar-du/rcar_du_kms.c
@@ -95,6 +95,40 @@ static const struct rcar_du_format_info 
rcar_du_format_infos[] = {
.planes = 2,
.pnmr = PnMR_SPIM_TP_OFF | PnMR_DDDF_YC,
.edf = PnDDCR4_EDF_NONE,
+   }, {
+   .fourcc = DRM_FORMAT_NV61,
+   .bpp = 16,
+   .planes = 2,
+   .pnmr = PnMR_SPIM_TP_OFF | PnMR_DDDF_YC,
+   .edf = PnDDCR4_EDF_NONE,
+   },
+};
+
+static const struct rcar_du_format_info rcar_vsp_format_infos[] = {
+   {
+   .fourcc = DRM_FORMAT_RGB332,
+   .bpp = 8,
+   }, {
+   .fourcc = DRM_FORMAT_ARGB,
+   .bpp = 16,
+   }, {
+   .fourcc = DRM_FORMAT_XRGB,
+   .bpp = 16,
+   }, {
+   .fourcc = DRM_FORMAT_BGR888,
+   .bpp = 24,
+   }, {
+   .fourcc = DRM_FORMAT_RGB888,
+   .bpp = 24,
+   }, {
+   .fourcc = DRM_FORMAT_BGRA,
+   .bpp = 32,
+   }, {
+   .fourcc = DRM_FORMAT_BGRX,
+   .bpp = 32,
+   }, {
+   .fourcc = DRM_FORMAT_YVYU,
+   .bpp = 16,
},
/* The following formats are not supported on Gen2 and thus have no
 * associated .pnmr or .edf settings.
@@ -142,6 +176,18 @@ const struct rcar_du_format_info *rcar_du_format_info(u32 
fourcc)
return NULL;
 }
 
+const struct rcar_du_format_info *rcar_vsp_format_info(u32 fourcc)
+{
+   unsigned int i;
+
+   for (i = 0; i < ARRAY_SIZE(rcar_vsp_format_infos); ++i) {
+   if (rcar_vsp_format_infos[i].fourcc == fourcc)
+   return _vsp_format_infos[i];
+   }
+
+   return NULL;
+}
+
 /* 
-
  * Frame buffer
  */
@@ -178,6 +224,15 @@ rcar_du_fb_create(struct drm_device *dev, struct drm_file 
*file_priv,
unsigned int i;
 
format = rcar_du_format_info(mode_cmd->pixel_format);
+
+   if (rcar_du_has(rcdu, RCAR_DU_FEATURE_VSP1_SOURCE) &&
+   (format == NULL)) {
+   format = rcar_vsp_format_info(mode_cmd->pixel_format);
+   }
+
+   if (rcar_du_has(rcdu, RCAR_DU_FEATURE_VSP1_SOURCE) && (format != NULL))
+   goto done;
+
if (format == NULL) {
dev_dbg(dev->dev, "unsupported pixel format %08x\n",
mode_cmd->pixel_format);
@@ -210,7 +265,7 @@ rcar_du_fb_create(struct drm_device *dev, struct drm_file 
*file_priv,
return ERR_PTR(-EINVAL);
}
}
-
+done:
return drm_fb_cma_create(dev, file_priv, mode_cmd);
 }
 
@@ -278,7 +333,6 @@ static void rcar_du_atomic_work(struct work_struct *work)
 {
struct rcar_du_commit *commit =
container_of(work, struct rcar_du_commit, work);
-
rcar_du_atomic_complete(commit);
 }
 
diff --git a/drivers/gpu/drm/rcar-du/rcar_du_kms.h 
b/drivers/gpu/drm/rcar-du/rcar_du_kms.h
index 07951d5..10eb51a 100644
--- a/drivers/gpu/drm/rcar-du/rcar_du_kms.h
+++ b/drivers/gpu/drm/rcar-du/rcar_du_kms.h
@@ -30,6 +30,7 @@ struct rcar_du_format_info {
 };
 
 const struct rcar_du_format_info *rcar_du_format_info(u32 fourcc);
+const struct rcar_du_format_info *rcar_vsp_format_info(u32 fourcc);
 
 int rcar_du_modeset_init(struct rcar_du_device *rcdu);
 
diff --git a/drivers/gpu/drm/rcar-du/rcar_du_vsp.c 
b/drivers/gpu/drm/rcar-du/rcar_du_vsp.c
index 89176e6..94e9181 100644
--- a/drivers/gpu/drm/rcar-du/rcar_du_vsp.c
+++ b/drivers/gpu/drm/rcar-du/rcar_du_vsp.c
@@ -143,6 +143,28 @@ static const u32 formats_v4l2[] = {
V4L2_PIX_FMT_YVU444M,
 };
 
+static const u32 formats_xlate[][2] = {
+   { DRM_FORMAT_RGB332, V4L2_PIX_FMT_RGB332 },
+   { DRM_FORMAT_ARGB, V4L2_PIX_FMT_ARGB444 },
+   { DRM_FORMAT_XRGB, V4L2_PIX_FMT_XRGB444 },
+   { DRM_FORMAT_ARGB1555, V4L2_PIX_FMT_ARGB555 },
+   { DRM_FORMAT_XRGB1555, V4L2_PIX_FMT_XRGB555 },
+   { DRM_FORMAT_RGB565, V4L2_PIX_FMT_RGB565 },
+   { DRM_FORMAT_BGR888, V4L2_PIX_FMT_RGB24 },
+   { DRM_FORMAT_RGB888, V4L2_PIX_FMT_BGR24 },
+   { 

[RFC 10/21] drm: rcar-du: Fix VSP plane number per devices

[Ulrich Hecht]

From: Koji Matsuoka 

Signed-off-by: Koji Matsuoka 
Signed-off-by: Geert Uytterhoeven 
---
 drivers/gpu/drm/rcar-du/rcar_du_drv.c | 2 ++
 drivers/gpu/drm/rcar-du/rcar_du_drv.h | 3 ++-
 drivers/gpu/drm/rcar-du/rcar_du_vsp.c | 2 +-
 3 files changed, 5 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/rcar-du/rcar_du_drv.c 
b/drivers/gpu/drm/rcar-du/rcar_du_drv.c
index 3907461..26fd3ba 100644
--- a/drivers/gpu/drm/rcar-du/rcar_du_drv.c
+++ b/drivers/gpu/drm/rcar-du/rcar_du_drv.c
@@ -108,6 +108,7 @@ static const struct rcar_du_device_info 
rcar_du_r8a7791_info = {
},
},
.num_lvds = 1,
+   .vsp_num = 4,
 };
 
 static const struct rcar_du_device_info rcar_du_r8a7794_info = {
@@ -167,6 +168,7 @@ static const struct rcar_du_device_info 
rcar_du_r8a7795_info = {
},
.num_lvds = 1,
.dpll_ch =  BIT(1) | BIT(2),
+   .vsp_num = 5,
 };
 
 static const struct of_device_id rcar_du_of_table[] = {
diff --git a/drivers/gpu/drm/rcar-du/rcar_du_drv.h 
b/drivers/gpu/drm/rcar-du/rcar_du_drv.h
index 790829b..6413b7e 100644
--- a/drivers/gpu/drm/rcar-du/rcar_du_drv.h
+++ b/drivers/gpu/drm/rcar-du/rcar_du_drv.h
@@ -70,12 +70,13 @@ struct rcar_du_device_info {
struct rcar_du_output_routing routes[RCAR_DU_OUTPUT_MAX];
unsigned int num_lvds;
unsigned int dpll_ch;
+   unsigned int vsp_num;
 };
 
 #define RCAR_DU_MAX_CRTCS  4
 #define RCAR_DU_MAX_GROUPS DIV_ROUND_UP(RCAR_DU_MAX_CRTCS, 2)
 #define RCAR_DU_MAX_LVDS   2
-#define RCAR_DU_MAX_VSPS   4
+#define RCAR_DU_MAX_VSPS   5
 
 struct rcar_du_device {
struct device *dev;
diff --git a/drivers/gpu/drm/rcar-du/rcar_du_vsp.c 
b/drivers/gpu/drm/rcar-du/rcar_du_vsp.c
index 4927fb3..89176e6 100644
--- a/drivers/gpu/drm/rcar-du/rcar_du_vsp.c
+++ b/drivers/gpu/drm/rcar-du/rcar_du_vsp.c
@@ -349,7 +349,7 @@ int rcar_du_vsp_init(struct rcar_du_vsp *vsp)
 /* The VSP2D (Gen3) has 5 RPFs, but the VSP1D (Gen2) is limited to
  * 4 RPFs.
  */
-   vsp->num_planes = rcdu->info->gen >= 3 ? 5 : 4;
+   vsp->num_planes = rcdu->info->vsp_num;
 
vsp->planes = devm_kcalloc(rcdu->dev, vsp->num_planes,
   sizeof(*vsp->planes), GFP_KERNEL);
-- 
2.7.4

[RFC 11/21] drm: rcar-du: Fix VSP feed plane number

[Ulrich Hecht]

From: Koji Matsuoka 

VSP feeds plane1 and plane3 with R-Car Gen3.

Signed-off-by: Koji Matsuoka 
Signed-off-by: Geert Uytterhoeven 
---
 drivers/gpu/drm/rcar-du/rcar_du_plane.c | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/rcar-du/rcar_du_plane.c 
b/drivers/gpu/drm/rcar-du/rcar_du_plane.c
index 8d5e59b..027c4cfb 100644
--- a/drivers/gpu/drm/rcar-du/rcar_du_plane.c
+++ b/drivers/gpu/drm/rcar-du/rcar_du_plane.c
@@ -489,7 +489,9 @@ static void rcar_du_plane_setup_format_gen2(struct 
rcar_du_group *rgrp,
rcar_du_plane_write(rgrp, index, PnDDCR2, ddcr2);
 
ddcr4 = state->format->edf | PnDDCR4_CODE;
-   if (state->source != RCAR_DU_PLANE_MEMORY)
+
+   if ((state->source != RCAR_DU_PLANE_MEMORY)
+   && (!rcar_du_has(rcdu, RCAR_DU_FEATURE_GEN3_REGS)))
ddcr4 |= PnDDCR4_VSPS;
 
rcar_du_plane_write(rgrp, index, PnDDCR4, ddcr4);
-- 
2.7.4

[RFC 08/21] drm: rcar-du: Add DPLL support

[Ulrich Hecht]

From: Koji Matsuoka 

Signed-off-by: Koji Matsuoka 
Signed-off-by: Geert Uytterhoeven 
---
 drivers/gpu/drm/rcar-du/rcar_du_crtc.c  | 97 -
 drivers/gpu/drm/rcar-du/rcar_du_crtc.h  |  8 +++
 drivers/gpu/drm/rcar-du/rcar_du_drv.c   |  1 +
 drivers/gpu/drm/rcar-du/rcar_du_drv.h   |  1 +
 drivers/gpu/drm/rcar-du/rcar_du_plane.h |  7 ++-
 drivers/gpu/drm/rcar-du/rcar_du_regs.h  | 19 +++
 6 files changed, 131 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/rcar-du/rcar_du_crtc.c 
b/drivers/gpu/drm/rcar-du/rcar_du_crtc.c
index 0d8bdda..e10943b 100644
--- a/drivers/gpu/drm/rcar-du/rcar_du_crtc.c
+++ b/drivers/gpu/drm/rcar-du/rcar_du_crtc.c
@@ -30,6 +30,12 @@
 #include "rcar_du_regs.h"
 #include "rcar_du_vsp.h"
 
+#define PRODUCT_REG0xfff00044
+#define PRODUCT_H3_BIT (0x4f << 8)
+#define PRODUCT_MASK   (0x7f << 8)
+#define CUT_ES1(0x00)
+#define CUT_ES1_MASK   (0x00ff)
+
 static u32 rcar_du_crtc_read(struct rcar_du_crtc *rcrtc, u32 reg)
 {
struct rcar_du_device *rcdu = rcrtc->group->dev;
@@ -106,14 +112,74 @@ static void rcar_du_crtc_put(struct rcar_du_crtc *rcrtc)
  * Hardware Setup
  */
 
+static void rcar_du_dpll_divider(struct dpll_info *dpll, unsigned int extclk,
+unsigned int mode_clock)
+{
+   unsigned long dpllclk;
+   unsigned long diff;
+   unsigned long n, m, fdpll;
+   bool match_flag = false;
+   bool clk_diff_set = true;
+
+   for (n = 39; n < 120; n++) {
+   for (m = 0; m < 4; m++) {
+   for (fdpll = 1; fdpll < 32; fdpll++) {
+   /* 1/2 (FRQSEL=1) for duty rate 50% */
+   dpllclk = extclk * (n + 1) / (m + 1)
+/ (fdpll + 1) / 2;
+   if (dpllclk >= 4)
+   continue;
+
+   diff = abs((long)dpllclk - (long)mode_clock);
+   if (clk_diff_set ||
+   ((diff == 0) || (dpll->diff > diff))) {
+   dpll->diff = diff;
+   dpll->n = n;
+   dpll->m = m;
+   dpll->fdpll = fdpll;
+   dpll->dpllclk = dpllclk;
+
+   if (clk_diff_set)
+   clk_diff_set = false;
+
+   if (diff == 0) {
+   match_flag = true;
+   break;
+   }
+   }
+   }
+   if (match_flag)
+   break;
+   }
+   if (match_flag)
+   break;
+   }
+}
+
 static void rcar_du_crtc_set_display_timing(struct rcar_du_crtc *rcrtc)
 {
const struct drm_display_mode *mode = >crtc.state->adjusted_mode;
+   struct rcar_du_device *rcdu = rcrtc->group->dev;
unsigned long mode_clock = mode->clock * 1000;
unsigned long clk;
u32 value;
u32 escr;
u32 div;
+   u32 dpll_reg = 0;
+   struct dpll_info *dpll;
+   void __iomem *product_reg;
+   bool h3_es1_workaround = false;
+
+   dpll = kzalloc(sizeof(*dpll), GFP_KERNEL);
+   if (dpll == NULL)
+   return;
+
+   /* DU2 DPLL Clock Select bit workaround in R-Car H3(ES1.0) */
+   product_reg = ioremap(PRODUCT_REG, 0x04);
+   if (((readl(product_reg) & PRODUCT_MASK) == PRODUCT_H3_BIT)
+   && ((readl(product_reg) & CUT_ES1_MASK) == CUT_ES1))
+   h3_es1_workaround = true;
+   iounmap(product_reg);
 
/* Compute the clock divisor and select the internal or external dot
 * clock based on the requested frequency.
@@ -130,6 +196,15 @@ static void rcar_du_crtc_set_display_timing(struct 
rcar_du_crtc *rcrtc)
u32 extdiv;
 
extclk = clk_get_rate(rcrtc->extclock);
+
+   if (rcdu->info->dpll_ch & (0x01 << rcrtc->index)) {
+   rcar_du_dpll_divider(dpll, extclk, mode_clock);
+   extclk = dpll->dpllclk;
+   dev_dbg(rcrtc->group->dev->dev,
+   "dpllclk:%d, fdpll:%d, n:%d, m:%d, diff:%d\n",
+dpll->dpllclk, dpll->fdpll, dpll->n, dpll->m,
+dpll->diff);
+   }
extdiv = DIV_ROUND_CLOSEST(extclk, mode_clock);
extdiv = clamp(extdiv, 1U, 64U) - 1;
 
@@ -140,7 +215,27 @@ static void rcar_du_crtc_set_display_timing(struct 

[RFC 01/21] drm: rcar-du: Remove i2c slave encoder interface for hdmi encoder

[Ulrich Hecht]

From: Archit Taneja 

The hdmi output in rcar-du uses the i2c slave encoder interface to link
to the adv7511 encoder chip. The kms driver creates encoder and connector
entities that internally uses the drm_encoder_slave_funcs ops provided by
the slave encoder driver.

Change the driver such that it expects a bridge entity instead of a slave
encoder. The hdmi connector code isn't needed anymore as we expect the
adv7511 bridge driver to create/manage the connector.

Note that the kms driver still expects a connector node for hdmi to be
present in DT. This node has no connection to the connector created
by the bridge driver.

Compile tested only.

Signed-off-by: Archit Taneja 
Signed-off-by: Geert Uytterhoeven 
---
 drivers/gpu/drm/rcar-du/Makefile  |   3 +-
 drivers/gpu/drm/rcar-du/rcar_du_encoder.c |   3 +-
 drivers/gpu/drm/rcar-du/rcar_du_encoder.h |   7 +-
 drivers/gpu/drm/rcar-du/rcar_du_hdmicon.c | 117 --
 drivers/gpu/drm/rcar-du/rcar_du_hdmicon.h |  31 
 drivers/gpu/drm/rcar-du/rcar_du_hdmienc.c |  67 +
 6 files changed, 22 insertions(+), 206 deletions(-)
 delete mode 100644 drivers/gpu/drm/rcar-du/rcar_du_hdmicon.c
 delete mode 100644 drivers/gpu/drm/rcar-du/rcar_du_hdmicon.h

diff --git a/drivers/gpu/drm/rcar-du/Makefile b/drivers/gpu/drm/rcar-du/Makefile
index 827711e..2ade186 100644
--- a/drivers/gpu/drm/rcar-du/Makefile
+++ b/drivers/gpu/drm/rcar-du/Makefile
@@ -7,8 +7,7 @@ rcar-du-drm-y := rcar_du_crtc.o \
 rcar_du_plane.o \
 rcar_du_vgacon.o
 
-rcar-du-drm-$(CONFIG_DRM_RCAR_HDMI)+= rcar_du_hdmicon.o \
-  rcar_du_hdmienc.o
+rcar-du-drm-$(CONFIG_DRM_RCAR_HDMI)+= rcar_du_hdmienc.o
 rcar-du-drm-$(CONFIG_DRM_RCAR_LVDS)+= rcar_du_lvdsenc.o
 
 rcar-du-drm-$(CONFIG_DRM_RCAR_VSP) += rcar_du_vsp.o
diff --git a/drivers/gpu/drm/rcar-du/rcar_du_encoder.c 
b/drivers/gpu/drm/rcar-du/rcar_du_encoder.c
index 4e939e4..1b16297 100644
--- a/drivers/gpu/drm/rcar-du/rcar_du_encoder.c
+++ b/drivers/gpu/drm/rcar-du/rcar_du_encoder.c
@@ -19,7 +19,6 @@
 
 #include "rcar_du_drv.h"
 #include "rcar_du_encoder.h"
-#include "rcar_du_hdmicon.h"
 #include "rcar_du_hdmienc.h"
 #include "rcar_du_kms.h"
 #include "rcar_du_lvdscon.h"
@@ -186,7 +185,7 @@ int rcar_du_encoder_init(struct rcar_du_device *rcdu,
break;
 
case DRM_MODE_ENCODER_TMDS:
-   ret = rcar_du_hdmi_connector_init(rcdu, renc);
+   /* connector managed by the bridge driver */
break;
 
default:
diff --git a/drivers/gpu/drm/rcar-du/rcar_du_encoder.h 
b/drivers/gpu/drm/rcar-du/rcar_du_encoder.h
index 719b6f2a..dde523a 100644
--- a/drivers/gpu/drm/rcar-du/rcar_du_encoder.h
+++ b/drivers/gpu/drm/rcar-du/rcar_du_encoder.h
@@ -15,7 +15,6 @@
 #define __RCAR_DU_ENCODER_H__
 
 #include 
-#include 
 
 struct rcar_du_device;
 struct rcar_du_hdmienc;
@@ -30,16 +29,16 @@ enum rcar_du_encoder_type {
 };
 
 struct rcar_du_encoder {
-   struct drm_encoder_slave slave;
+   struct drm_encoder base;
enum rcar_du_output output;
struct rcar_du_hdmienc *hdmi;
struct rcar_du_lvdsenc *lvds;
 };
 
 #define to_rcar_encoder(e) \
-   container_of(e, struct rcar_du_encoder, slave.base)
+   container_of(e, struct rcar_du_encoder, base)
 
-#define rcar_encoder_to_drm_encoder(e) (&(e)->slave.base)
+#define rcar_encoder_to_drm_encoder(e) (&(e)->base)
 
 struct rcar_du_connector {
struct drm_connector connector;
diff --git a/drivers/gpu/drm/rcar-du/rcar_du_hdmicon.c 
b/drivers/gpu/drm/rcar-du/rcar_du_hdmicon.c
deleted file mode 100644
index 6c92714..000
--- a/drivers/gpu/drm/rcar-du/rcar_du_hdmicon.c
+++ /dev/null
@@ -1,117 +0,0 @@
-/*
- * R-Car Display Unit HDMI Connector
- *
- * Copyright (C) 2014 Renesas Electronics Corporation
- *
- * Contact: Laurent Pinchart (laurent.pinch...@ideasonboard.com)
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- */
-
-#include 
-#include 
-#include 
-#include 
-#include 
-
-#include "rcar_du_drv.h"
-#include "rcar_du_encoder.h"
-#include "rcar_du_hdmicon.h"
-#include "rcar_du_kms.h"
-
-#define to_slave_funcs(e)  (to_rcar_encoder(e)->slave.slave_funcs)
-
-static int rcar_du_hdmi_connector_get_modes(struct drm_connector *connector)
-{
-   struct rcar_du_connector *con = to_rcar_connector(connector);
-   struct drm_encoder *encoder = rcar_encoder_to_drm_encoder(con->encoder);
-   const struct drm_encoder_slave_funcs *sfuncs = to_slave_funcs(encoder);
-
-   if (sfuncs->get_modes == NULL)
-   return 0;
-
-   return sfuncs->get_modes(encoder, connector);
-}
-
-static int 

[RFC 03/21] media: vsp1: Set format to RPF input source

[Ulrich Hecht]

From: Koji Matsuoka 

The output format of the RPF must be unified in RGB or YCbCr by
specification of the H/W. To unify the output format in RGB in
driver, if the input format is YCbCr, the output format must be
converted to RGB by CSC (Color Space Conversion).
The driver is missing the format setting of the RPF input source,
so it does not pass through the process to enable the CSC.
This patch adds format setting of the RPF input source.

Signed-off-by: Koji Matsuoka 
[geert: Rebased, s/fmtinfo/rpf->fmtinfo]
Signed-off-by: Geert Uytterhoeven 
---
 drivers/media/platform/vsp1/vsp1_drm.c | 6 ++
 1 file changed, 6 insertions(+)

diff --git a/drivers/media/platform/vsp1/vsp1_drm.c 
b/drivers/media/platform/vsp1/vsp1_drm.c
index ff961b2..c5ee06b 100644
--- a/drivers/media/platform/vsp1/vsp1_drm.c
+++ b/drivers/media/platform/vsp1/vsp1_drm.c
@@ -383,6 +383,12 @@ static int vsp1_du_setup_rpf_pipe(struct vsp1_device *vsp1,
 
/* BRU sink, propagate the format from the RPF source. */
format.pad = bru_input;
+   format.format.code = rpf->fmtinfo->mbus;
+
+   ret = v4l2_subdev_call(>entity.subdev, pad, set_fmt, NULL,
+  );
+   if (ret < 0)
+   return ret;
 
ret = v4l2_subdev_call(>bru->entity.subdev, pad, set_fmt, NULL,
   );
-- 
2.7.4

[RFC 04/21] drm: bridge/dw_hdmi: add dw hdmi i2c bus adapter support

[Ulrich Hecht]

From: Vladimir Zapolskiy 

The change adds support of internal HDMI I2C master controller, this
subdevice is used by default, if "ddc-i2c-bus" DT property is omitted.

The main purpose of this functionality is to support reading EDID from
an HDMI monitor on boards, which don't have an I2C bus connected to
DDC pins.

Signed-off-by: Vladimir Zapolskiy 
Signed-off-by: Koji Matsuoka 
Signed-off-by: Geert Uytterhoeven 
---
 drivers/gpu/drm/bridge/dw-hdmi.c | 331 ++-
 1 file changed, 325 insertions(+), 6 deletions(-)

diff --git a/drivers/gpu/drm/bridge/dw-hdmi.c b/drivers/gpu/drm/bridge/dw-hdmi.c
index c9d9412..1cfff2f 100644
--- a/drivers/gpu/drm/bridge/dw-hdmi.c
+++ b/drivers/gpu/drm/bridge/dw-hdmi.c
@@ -1,14 +1,15 @@
 /*
+ * DesignWare High-Definition Multimedia Interface (HDMI) driver
+ *
+ * Copyright (C) 2013-2015 Mentor Graphics Inc.
  * Copyright (C) 2011-2013 Freescale Semiconductor, Inc.
+ * Copyright (C) 2010, Guennadi Liakhovetski 
  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License as published by
  * the Free Software Foundation; either version 2 of the License, or
  * (at your option) any later version.
  *
- * Designware High-Definition Multimedia Interface (HDMI) driver
- *
- * Copyright (C) 2010, Guennadi Liakhovetski 
  */
 #include 
 #include 
@@ -31,6 +32,26 @@
 #include "dw-hdmi.h"
 #include "dw-hdmi-audio.h"
 
+/* HDMI_IH_I2CM_STAT0 and HDMI_IH_MUTE_I2CM_STAT0 register bits */
+#define HDMI_IH_I2CM_STAT0_ERROR   BIT(0)
+#define HDMI_IH_I2CM_STAT0_DONEBIT(1)
+
+/* HDMI_I2CM_OPERATION register bits */
+#define HDMI_I2CM_OPERATION_READ   BIT(0)
+#define HDMI_I2CM_OPERATION_READ_EXT   BIT(1)
+#define HDMI_I2CM_OPERATION_WRITE  BIT(4)
+
+/* HDMI_I2CM_INT register bits */
+#define HDMI_I2CM_INT_DONE_MASKBIT(2)
+#define HDMI_I2CM_INT_DONE_POL BIT(3)
+
+/* HDMI_I2CM_CTLINT register bits */
+#define HDMI_I2CM_CTLINT_ARB_MASK  BIT(2)
+#define HDMI_I2CM_CTLINT_ARB_POL   BIT(3)
+#define HDMI_I2CM_CTLINT_NAC_MASK  BIT(6)
+#define HDMI_I2CM_CTLINT_NAC_POL   BIT(7)
+
+
 #define HDMI_EDID_LEN  512
 
 #define RGB0
@@ -101,6 +122,17 @@ struct hdmi_data_info {
struct hdmi_vmode video_mode;
 };
 
+struct dw_hdmi_i2c {
+   struct i2c_adapter  adap;
+
+   spinlock_t  lock;
+   struct completion   cmp;
+   u8  stat;
+
+   u8  slave_reg;
+   boolis_regaddr;
+};
+
 struct dw_hdmi {
struct drm_connector connector;
struct drm_encoder *encoder;
@@ -111,6 +143,7 @@ struct dw_hdmi {
struct device *dev;
struct clk *isfr_clk;
struct clk *iahb_clk;
+   struct dw_hdmi_i2c *i2c;
 
struct hdmi_data_info hdmi_data;
const struct dw_hdmi_plat_data *plat_data;
@@ -198,6 +231,242 @@ static void hdmi_mask_writeb(struct dw_hdmi *hdmi, u8 
data, unsigned int reg,
hdmi_modb(hdmi, data << shift, mask, reg);
 }
 
+static void dw_hdmi_i2c_init(struct dw_hdmi *hdmi)
+{
+   unsigned long flags;
+
+   spin_lock_irqsave(>i2c->lock, flags);
+
+   /* Set Fast Mode speed */
+   hdmi_writeb(hdmi, 0x0b, HDMI_I2CM_DIV);
+
+   /* Software reset */
+   hdmi_writeb(hdmi, 0x00, HDMI_I2CM_SOFTRSTZ);
+
+   /* Set done, not acknowledged and arbitration interrupt polarities */
+   hdmi_writeb(hdmi, HDMI_I2CM_INT_DONE_POL, HDMI_I2CM_INT);
+   hdmi_writeb(hdmi, HDMI_I2CM_CTLINT_NAC_POL | HDMI_I2CM_CTLINT_ARB_POL,
+   HDMI_I2CM_CTLINT);
+
+   /* Clear DONE and ERROR interrupts */
+   hdmi_writeb(hdmi, HDMI_IH_I2CM_STAT0_ERROR | HDMI_IH_I2CM_STAT0_DONE,
+   HDMI_IH_I2CM_STAT0);
+
+   /* Mute DONE and ERROR interrupts */
+   hdmi_writeb(hdmi, HDMI_IH_I2CM_STAT0_ERROR | HDMI_IH_I2CM_STAT0_DONE,
+   HDMI_IH_MUTE_I2CM_STAT0);
+
+   spin_unlock_irqrestore(>i2c->lock, flags);
+}
+
+static int dw_hdmi_i2c_read(struct dw_hdmi *hdmi,
+   unsigned char *buf, int length)
+{
+   int stat;
+   unsigned long flags;
+   struct dw_hdmi_i2c *i2c = hdmi->i2c;
+
+   spin_lock_irqsave(>lock, flags);
+
+   if (!i2c->is_regaddr) {
+   dev_dbg(hdmi->dev, "set read register address to 0\n");
+   i2c->slave_reg = 0x00;
+   i2c->is_regaddr = true;
+   }
+
+   while (length--) {
+   hdmi_writeb(hdmi, i2c->slave_reg++, HDMI_I2CM_ADDRESS);
+   hdmi_writeb(hdmi,
+   HDMI_I2CM_OPERATION_READ, HDMI_I2CM_OPERATION);
+   i2c->stat = 

[RFC 02/21] drm: i2c: adv7511: Convert to drm_bridge

[Ulrich Hecht]

From: Archit Taneja 

We don't want to use the old i2c slave encoder interface anymore.

Remove that and make the i2c driver create a drm_bridge entity instead.
Converting to bridges helps because the kms drivers don't need to
exract encoder slave ops from this driver and use it within their
own encoder/connector ops.

The driver now creates its own connector when a kms driver attaches
itself to the bridge. Therefore, kms drivers don't need to create
their own connectors anymore.

The old encoder slave ops are now used by the new bridge and connector
entities.

Signed-off-by: Archit Taneja 
Signed-off-by: Laurent Pinchart 
Signed-off-by: Geert Uytterhoeven 
---
 drivers/gpu/drm/i2c/adv7511.c | 224 --
 1 file changed, 150 insertions(+), 74 deletions(-)

diff --git a/drivers/gpu/drm/i2c/adv7511.c b/drivers/gpu/drm/i2c/adv7511.c
index a02112b..a104b43 100644
--- a/drivers/gpu/drm/i2c/adv7511.c
+++ b/drivers/gpu/drm/i2c/adv7511.c
@@ -16,7 +16,8 @@
 #include 
 #include 
 #include 
-#include 
+#include 
+#include 
 
 #include "adv7511.h"
 
@@ -36,7 +37,8 @@ struct adv7511 {
bool edid_read;
 
wait_queue_head_t wq;
-   struct drm_encoder *encoder;
+   struct drm_bridge bridge;
+   struct drm_connector connector;
 
bool embedded_sync;
enum adv7511_sync_polarity vsync_polarity;
@@ -48,11 +50,6 @@ struct adv7511 {
struct gpio_desc *gpio_pd;
 };
 
-static struct adv7511 *encoder_to_adv7511(struct drm_encoder *encoder)
-{
-   return to_encoder_slave(encoder)->slave_priv;
-}
-
 /* ADI recommended values for proper operation. */
 static const struct reg_sequence adv7511_fixed_registers[] = {
{ 0x98, 0x03 },
@@ -446,8 +443,8 @@ static int adv7511_irq_process(struct adv7511 *adv7511)
regmap_write(adv7511->regmap, ADV7511_REG_INT(0), irq0);
regmap_write(adv7511->regmap, ADV7511_REG_INT(1), irq1);
 
-   if (irq0 & ADV7511_INT0_HPD && adv7511->encoder)
-   drm_helper_hpd_irq_event(adv7511->encoder->dev);
+   if (irq0 & ADV7511_INT0_HPD && adv7511->bridge.dev)
+   drm_helper_hpd_irq_event(adv7511->bridge.dev);
 
if (irq0 & ADV7511_INT0_EDID_READY || irq1 & ADV7511_INT1_DDC_ERROR) {
adv7511->edid_read = true;
@@ -563,13 +560,12 @@ static int adv7511_get_edid_block(void *data, u8 *buf, 
unsigned int block,
 }
 
 /* 
-
- * Encoder operations
+ * ADV75xx helpers
  */
 
-static int adv7511_get_modes(struct drm_encoder *encoder,
+static int adv7511_get_modes(struct adv7511 *adv7511,
 struct drm_connector *connector)
 {
-   struct adv7511 *adv7511 = encoder_to_adv7511(encoder);
struct edid *edid;
unsigned int count;
 
@@ -606,21 +602,9 @@ static int adv7511_get_modes(struct drm_encoder *encoder,
return count;
 }
 
-static void adv7511_encoder_dpms(struct drm_encoder *encoder, int mode)
-{
-   struct adv7511 *adv7511 = encoder_to_adv7511(encoder);
-
-   if (mode == DRM_MODE_DPMS_ON)
-   adv7511_power_on(adv7511);
-   else
-   adv7511_power_off(adv7511);
-}
-
 static enum drm_connector_status
-adv7511_encoder_detect(struct drm_encoder *encoder,
-  struct drm_connector *connector)
+adv7511_detect(struct adv7511 *adv7511, struct drm_connector *connector)
 {
-   struct adv7511 *adv7511 = encoder_to_adv7511(encoder);
enum drm_connector_status status;
unsigned int val;
bool hpd;
@@ -644,7 +628,7 @@ adv7511_encoder_detect(struct drm_encoder *encoder,
if (status == connector_status_connected && hpd && adv7511->powered) {
regcache_mark_dirty(adv7511->regmap);
adv7511_power_on(adv7511);
-   adv7511_get_modes(encoder, connector);
+   adv7511_get_modes(adv7511, connector);
if (adv7511->status == connector_status_connected)
status = connector_status_disconnected;
} else {
@@ -658,8 +642,8 @@ adv7511_encoder_detect(struct drm_encoder *encoder,
return status;
 }
 
-static int adv7511_encoder_mode_valid(struct drm_encoder *encoder,
- struct drm_display_mode *mode)
+static int adv7511_mode_valid(struct adv7511 *adv7511,
+ struct drm_display_mode *mode)
 {
if (mode->clock > 165000)
return MODE_CLOCK_HIGH;
@@ -667,11 +651,10 @@ static int adv7511_encoder_mode_valid(struct drm_encoder 
*encoder,
return MODE_OK;
 }
 
-static void adv7511_encoder_mode_set(struct drm_encoder *encoder,
-struct drm_display_mode *mode,
-struct drm_display_mode *adj_mode)
+static void 

[RFC 07/21] drm: rcar-du: Add dw_hdmi driver startup

[Ulrich Hecht]

From: Koji Matsuoka 

The HDMI driver in the R-Car Gen3 uses dw_hdmi driver.

Signed-off-by: Koji Matsuoka 
[geert: Select DRM_DW_HDMI on non-r8a7795 to fix shmobile_defconfig build]
Signed-off-by: Geert Uytterhoeven 
---
 drivers/gpu/drm/rcar-du/Kconfig   |   2 +
 drivers/gpu/drm/rcar-du/rcar_du_encoder.c |   9 +-
 drivers/gpu/drm/rcar-du/rcar_du_encoder.h |   6 +-
 drivers/gpu/drm/rcar-du/rcar_du_hdmienc.c | 225 +++---
 drivers/gpu/drm/rcar-du/rcar_du_kms.c |   6 +-
 5 files changed, 227 insertions(+), 21 deletions(-)

diff --git a/drivers/gpu/drm/rcar-du/Kconfig b/drivers/gpu/drm/rcar-du/Kconfig
index 7fc3ca5..d7c7ffa 100644
--- a/drivers/gpu/drm/rcar-du/Kconfig
+++ b/drivers/gpu/drm/rcar-du/Kconfig
@@ -15,6 +15,8 @@ config DRM_RCAR_DU
 config DRM_RCAR_HDMI
bool "R-Car DU HDMI Encoder Support"
depends on DRM_RCAR_DU
+   depends on OF
+   select DRM_DW_HDMI
help
  Enable support for external HDMI encoders.
 
diff --git a/drivers/gpu/drm/rcar-du/rcar_du_encoder.c 
b/drivers/gpu/drm/rcar-du/rcar_du_encoder.c
index 1b16297..5d64893 100644
--- a/drivers/gpu/drm/rcar-du/rcar_du_encoder.c
+++ b/drivers/gpu/drm/rcar-du/rcar_du_encoder.c
@@ -1,7 +1,7 @@
 /*
  * rcar_du_encoder.c  --  R-Car Display Unit Encoder
  *
- * Copyright (C) 2013-2014 Renesas Electronics Corporation
+ * Copyright (C) 2013-2015 Renesas Electronics Corporation
  *
  * Contact: Laurent Pinchart (laurent.pinch...@ideasonboard.com)
  *
@@ -118,7 +118,8 @@ int rcar_du_encoder_init(struct rcar_du_device *rcdu,
 enum rcar_du_encoder_type type,
 enum rcar_du_output output,
 struct device_node *enc_node,
-struct device_node *con_node)
+struct device_node *con_node,
+const char *device_name)
 {
struct rcar_du_encoder *renc;
struct drm_encoder *encoder;
@@ -162,8 +163,12 @@ int rcar_du_encoder_init(struct rcar_du_device *rcdu,
break;
}
 
+   renc->device_name = device_name;
+
if (type == RCAR_DU_ENCODER_HDMI) {
ret = rcar_du_hdmienc_init(rcdu, renc, enc_node);
+   if (of_device_is_compatible(enc_node, "rockchip,rcar-dw-hdmi"))
+   goto done;
if (ret < 0)
goto done;
} else {
diff --git a/drivers/gpu/drm/rcar-du/rcar_du_encoder.h 
b/drivers/gpu/drm/rcar-du/rcar_du_encoder.h
index dde523a..51a4664 100644
--- a/drivers/gpu/drm/rcar-du/rcar_du_encoder.h
+++ b/drivers/gpu/drm/rcar-du/rcar_du_encoder.h
@@ -1,7 +1,7 @@
 /*
  * rcar_du_encoder.h  --  R-Car Display Unit Encoder
  *
- * Copyright (C) 2013-2014 Renesas Electronics Corporation
+ * Copyright (C) 2013-2015 Renesas Electronics Corporation
  *
  * Contact: Laurent Pinchart (laurent.pinch...@ideasonboard.com)
  *
@@ -33,6 +33,7 @@ struct rcar_du_encoder {
enum rcar_du_output output;
struct rcar_du_hdmienc *hdmi;
struct rcar_du_lvdsenc *lvds;
+   const char *device_name;
 };
 
 #define to_rcar_encoder(e) \
@@ -55,6 +56,7 @@ int rcar_du_encoder_init(struct rcar_du_device *rcdu,
 enum rcar_du_encoder_type type,
 enum rcar_du_output output,
 struct device_node *enc_node,
-struct device_node *con_node);
+struct device_node *con_node,
+const char *device_name);
 
 #endif /* __RCAR_DU_ENCODER_H__ */
diff --git a/drivers/gpu/drm/rcar-du/rcar_du_hdmienc.c 
b/drivers/gpu/drm/rcar-du/rcar_du_hdmienc.c
index 15d553a..b8b89a0 100644
--- a/drivers/gpu/drm/rcar-du/rcar_du_hdmienc.c
+++ b/drivers/gpu/drm/rcar-du/rcar_du_hdmienc.c
@@ -1,7 +1,7 @@
 /*
  * R-Car Display Unit HDMI Encoder
  *
- * Copyright (C) 2014 Renesas Electronics Corporation
+ * Copyright (C) 2014-2015 Renesas Electronics Corporation
  *
  * Contact: Laurent Pinchart (laurent.pinch...@ideasonboard.com)
  *
@@ -13,10 +13,13 @@
 
 #include 
 
+#include 
 #include 
 #include 
 #include 
 
+#include 
+
 #include "rcar_du_drv.h"
 #include "rcar_du_encoder.h"
 #include "rcar_du_hdmienc.h"
@@ -24,7 +27,9 @@
 
 struct rcar_du_hdmienc {
struct rcar_du_encoder *renc;
+   struct device *dev;
bool enabled;
+   unsigned int index;
 };
 
 #define to_rcar_hdmienc(e) (to_rcar_encoder(e)->hdmi)
@@ -32,6 +37,10 @@ struct rcar_du_hdmienc {
 static void rcar_du_hdmienc_disable(struct drm_encoder *encoder)
 {
struct rcar_du_hdmienc *hdmienc = to_rcar_hdmienc(encoder);
+   const struct drm_bridge_funcs *bfuncs = encoder->bridge->funcs;
+
+   if ((bfuncs) && (bfuncs->post_disable))
+   bfuncs->post_disable(encoder->bridge);
 
if (hdmienc->renc->lvds)

[RFC 09/21] drm: rcar-du: Fix display registers for R-Car Gen3

[Ulrich Hecht]

From: Koji Matsuoka 

Signed-off-by: Koji Matsuoka 
Signed-off-by: Geert Uytterhoeven 
---
 drivers/gpu/drm/rcar-du/rcar_du_drv.c   | 3 ++-
 drivers/gpu/drm/rcar-du/rcar_du_group.c | 5 +
 drivers/gpu/drm/rcar-du/rcar_du_plane.c | 4 +++-
 3 files changed, 10 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/rcar-du/rcar_du_drv.c 
b/drivers/gpu/drm/rcar-du/rcar_du_drv.c
index 5ed0d61..3907461 100644
--- a/drivers/gpu/drm/rcar-du/rcar_du_drv.c
+++ b/drivers/gpu/drm/rcar-du/rcar_du_drv.c
@@ -137,7 +137,8 @@ static const struct rcar_du_device_info 
rcar_du_r8a7795_info = {
.gen = 3,
.features = RCAR_DU_FEATURE_CRTC_IRQ_CLOCK
  | RCAR_DU_FEATURE_EXT_CTRL_REGS
- | RCAR_DU_FEATURE_VSP1_SOURCE,
+ | RCAR_DU_FEATURE_VSP1_SOURCE
+ | RCAR_DU_FEATURE_GEN3_REGS,
.num_crtcs = 4,
.routes = {
/* R8A7795 has one RGB output, two HDMI outputs and one
diff --git a/drivers/gpu/drm/rcar-du/rcar_du_group.c 
b/drivers/gpu/drm/rcar-du/rcar_du_group.c
index 33b2fc5..55dd3bd 100644
--- a/drivers/gpu/drm/rcar-du/rcar_du_group.c
+++ b/drivers/gpu/drm/rcar-du/rcar_du_group.c
@@ -101,6 +101,11 @@ static void rcar_du_group_setup(struct rcar_du_group *rgrp)
rcar_du_group_write(rgrp, DEFR5, DEFR5_CODE | DEFR5_DEFE5);
 
rcar_du_group_setup_pins(rgrp);
+   if (rcdu->info->gen == 3) {
+   rcar_du_group_write(rgrp, DEFR6, DEFR6_CODE |
+ DEFR6_ODPM22_DISP);
+   rcar_du_group_write(rgrp, DEFR10, DEFR10_CODE | DEFR10_DEFE10);
+   }
 
if (rcar_du_has(rgrp->dev, RCAR_DU_FEATURE_EXT_CTRL_REGS)) {
rcar_du_group_setup_defr8(rgrp);
diff --git a/drivers/gpu/drm/rcar-du/rcar_du_plane.c 
b/drivers/gpu/drm/rcar-du/rcar_du_plane.c
index 8460ae1..8d5e59b 100644
--- a/drivers/gpu/drm/rcar-du/rcar_du_plane.c
+++ b/drivers/gpu/drm/rcar-du/rcar_du_plane.c
@@ -458,6 +458,7 @@ static void rcar_du_plane_setup_format_gen2(struct 
rcar_du_group *rgrp,
unsigned int index,
const struct rcar_du_plane_state 
*state)
 {
+   struct rcar_du_device *rcdu = rgrp->dev;
u32 ddcr2 = PnDDCR2_CODE;
u32 ddcr4;
 
@@ -484,7 +485,8 @@ static void rcar_du_plane_setup_format_gen2(struct 
rcar_du_group *rgrp,
}
}
 
-   rcar_du_plane_write(rgrp, index, PnDDCR2, ddcr2);
+   if (!rcar_du_has(rcdu, RCAR_DU_FEATURE_GEN3_REGS))
+   rcar_du_plane_write(rgrp, index, PnDDCR2, ddcr2);
 
ddcr4 = state->format->edf | PnDDCR4_CODE;
if (state->source != RCAR_DU_PLANE_MEMORY)
-- 
2.7.4

[RFC 05/21] drm: bridge/dw_hdmi: Fix R-Car Gen3 device support

[Ulrich Hecht]

From: Koji Matsuoka 

Signed-off-by: Koji Matsuoka 
Signed-off-by: Geert Uytterhoeven 
---
 drivers/gpu/drm/bridge/dw-hdmi.c | 158 ++-
 include/drm/bridge/dw_hdmi.h |   9 +++
 2 files changed, 131 insertions(+), 36 deletions(-)

diff --git a/drivers/gpu/drm/bridge/dw-hdmi.c b/drivers/gpu/drm/bridge/dw-hdmi.c
index 1cfff2f..55e73e8 100644
--- a/drivers/gpu/drm/bridge/dw-hdmi.c
+++ b/drivers/gpu/drm/bridge/dw-hdmi.c
@@ -1,6 +1,7 @@
 /*
  * DesignWare High-Definition Multimedia Interface (HDMI) driver
  *
+ * Copyright (C) 2015 Renesas Electronics Corporation
  * Copyright (C) 2013-2015 Mentor Graphics Inc.
  * Copyright (C) 2011-2013 Freescale Semiconductor, Inc.
  * Copyright (C) 2010, Guennadi Liakhovetski 
@@ -21,6 +22,7 @@
 #include 
 #include 
 
+#include 
 #include 
 #include 
 #include 
@@ -143,6 +145,7 @@ struct dw_hdmi {
struct device *dev;
struct clk *isfr_clk;
struct clk *iahb_clk;
+
struct dw_hdmi_i2c *i2c;
 
struct hdmi_data_info hdmi_data;
@@ -174,6 +177,11 @@ struct dw_hdmi {
unsigned int audio_cts;
unsigned int audio_n;
bool audio_enable;
+   int ratio;
+   bool interlaced;
+   bool isfr_use;
+   bool iahb_use;
+   int num;
 
void (*write)(struct dw_hdmi *hdmi, u8 val, int offset);
u8 (*read)(struct dw_hdmi *hdmi, int offset);
@@ -1008,6 +1016,7 @@ static int hdmi_phy_configure(struct dw_hdmi *hdmi, 
unsigned char prep,
const struct dw_hdmi_mpll_config *mpll_config = pdata->mpll_cfg;
const struct dw_hdmi_curr_ctrl *curr_ctrl = pdata->cur_ctr;
const struct dw_hdmi_phy_config *phy_config = pdata->phy_config;
+   const struct dw_hdmi_multi_div *multi_div = pdata->multi_div;
 
if (prep)
return -EINVAL;
@@ -1043,6 +1052,13 @@ static int hdmi_phy_configure(struct dw_hdmi *hdmi, 
unsigned char prep,
phy_config->mpixelclock)
break;
 
+   if (hdmi->dev_type == RCAR_HDMI) {
+   for (; multi_div->mpixelclock != (~0UL); multi_div++)
+   if (hdmi->hdmi_data.video_mode.mpixelclock <=
+   multi_div->mpixelclock)
+   break;
+   }
+
if (mpll_config->mpixelclock == ~0UL ||
curr_ctrl->mpixelclock == ~0UL ||
phy_config->mpixelclock == ~0UL) {
@@ -1051,6 +1067,13 @@ static int hdmi_phy_configure(struct dw_hdmi *hdmi, 
unsigned char prep,
return -EINVAL;
}
 
+   if ((multi_div->mpixelclock == ~0UL) &&
+   (hdmi->dev_type == RCAR_HDMI)) {
+   dev_err(hdmi->dev, "Pixel clock %d - unsupported by HDMI\n",
+   hdmi->hdmi_data.video_mode.mpixelclock);
+   return -EINVAL;
+   }
+
/* Enable csc path */
if (cscon)
val = HDMI_MC_FLOWCTRL_FEED_THROUGH_OFF_CSC_IN_PATH;
@@ -1077,21 +1100,27 @@ static int hdmi_phy_configure(struct dw_hdmi *hdmi, 
unsigned char prep,
hdmi_phy_test_clear(hdmi, 0);
 
hdmi_phy_i2c_write(hdmi, mpll_config->res[res_idx].cpce, 0x06);
-   hdmi_phy_i2c_write(hdmi, mpll_config->res[res_idx].gmp, 0x15);
+   if (hdmi->dev_type != RCAR_HDMI)
+   hdmi_phy_i2c_write(hdmi, mpll_config->res[res_idx].gmp, 0x15);
 
/* CURRCTRL */
hdmi_phy_i2c_write(hdmi, curr_ctrl->curr[res_idx], 0x10);
 
-   hdmi_phy_i2c_write(hdmi, 0x, 0x13);  /* PLLPHBYCTRL */
-   hdmi_phy_i2c_write(hdmi, 0x0006, 0x17);
-
-   hdmi_phy_i2c_write(hdmi, phy_config->term, 0x19);  /* TXTERM */
-   hdmi_phy_i2c_write(hdmi, phy_config->sym_ctr, 0x09); /* CKSYMTXCTRL */
-   hdmi_phy_i2c_write(hdmi, phy_config->vlev_ctr, 0x0E); /* VLEVCTRL */
+   if (hdmi->dev_type == RCAR_HDMI)
+   hdmi_phy_i2c_write(hdmi, multi_div->multi[res_idx], 0x11);
 
-   /* REMOVE CLK TERM */
-   hdmi_phy_i2c_write(hdmi, 0x8000, 0x05);  /* CKCALCTRL */
+   if (hdmi->dev_type != RCAR_HDMI) {
+   hdmi_phy_i2c_write(hdmi, 0x, 0x13);  /* PLLPHBYCTRL */
+   hdmi_phy_i2c_write(hdmi, 0x0006, 0x17);
 
+   hdmi_phy_i2c_write(hdmi, phy_config->term, 0x19);  /* TXTERM */
+   hdmi_phy_i2c_write(hdmi, phy_config->sym_ctr,
+0x09); /* CKSYMTXCTRL */
+   hdmi_phy_i2c_write(hdmi, phy_config->vlev_ctr,
+0x0E); /* VLEVCTRL */
+   /* REMOVE CLK TERM */
+   hdmi_phy_i2c_write(hdmi, 0x8000, 0x05);  /* CKCALCTRL */
+   }
dw_hdmi_phy_enable_powerdown(hdmi, false);
 
/* toggle TMDS enable */
@@ -1102,7 +1131,8 @@ static int hdmi_phy_configure(struct dw_hdmi *hdmi, 
unsigned char prep,
dw_hdmi_phy_gen2_txpwron(hdmi, 1);

[RFC 06/21] drm: rcar-du: Add R8A7795 device support

[Ulrich Hecht]

From: Koji Matsuoka 

Signed-off-by: Koji Matsuoka 
Signed-off-by: Geert Uytterhoeven 
---
 drivers/gpu/drm/rcar-du/rcar_du_crtc.h |  4 +++-
 drivers/gpu/drm/rcar-du/rcar_du_drv.c  | 14 --
 drivers/gpu/drm/rcar-du/rcar_du_drv.h  |  2 ++
 3 files changed, 17 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/rcar-du/rcar_du_crtc.h 
b/drivers/gpu/drm/rcar-du/rcar_du_crtc.h
index 6f08b7e..459e539 100644
--- a/drivers/gpu/drm/rcar-du/rcar_du_crtc.h
+++ b/drivers/gpu/drm/rcar-du/rcar_du_crtc.h
@@ -1,7 +1,7 @@
 /*
  * rcar_du_crtc.h  --  R-Car Display Unit CRTCs
  *
- * Copyright (C) 2013-2014 Renesas Electronics Corporation
+ * Copyright (C) 2013-2015 Renesas Electronics Corporation
  *
  * Contact: Laurent Pinchart (laurent.pinch...@ideasonboard.com)
  *
@@ -61,6 +61,8 @@ enum rcar_du_output {
RCAR_DU_OUTPUT_DPAD1,
RCAR_DU_OUTPUT_LVDS0,
RCAR_DU_OUTPUT_LVDS1,
+   RCAR_DU_OUTPUT_HDMI0,
+   RCAR_DU_OUTPUT_HDMI1,
RCAR_DU_OUTPUT_TCON,
RCAR_DU_OUTPUT_MAX,
 };
diff --git a/drivers/gpu/drm/rcar-du/rcar_du_drv.c 
b/drivers/gpu/drm/rcar-du/rcar_du_drv.c
index fb9242d..0a93d2a 100644
--- a/drivers/gpu/drm/rcar-du/rcar_du_drv.c
+++ b/drivers/gpu/drm/rcar-du/rcar_du_drv.c
@@ -140,14 +140,24 @@ static const struct rcar_du_device_info 
rcar_du_r8a7795_info = {
  | RCAR_DU_FEATURE_VSP1_SOURCE,
.num_crtcs = 4,
.routes = {
-   /* R8A7795 has one RGB output, one LVDS output and two
-* (currently unsupported) HDMI outputs.
+   /* R8A7795 has one RGB output, two HDMI outputs and one
+* LVDS output.
 */
[RCAR_DU_OUTPUT_DPAD0] = {
.possible_crtcs = BIT(3),
.encoder_type = DRM_MODE_ENCODER_NONE,
.port = 0,
},
+   [RCAR_DU_OUTPUT_HDMI0] = {
+   .possible_crtcs = BIT(1),
+   .encoder_type = RCAR_DU_ENCODER_HDMI,
+   .port = 1,
+   },
+   [RCAR_DU_OUTPUT_HDMI1] = {
+   .possible_crtcs = BIT(2),
+   .encoder_type = RCAR_DU_ENCODER_HDMI,
+   .port = 2,
+   },
[RCAR_DU_OUTPUT_LVDS0] = {
.possible_crtcs = BIT(0),
.encoder_type = DRM_MODE_ENCODER_LVDS,
diff --git a/drivers/gpu/drm/rcar-du/rcar_du_drv.h 
b/drivers/gpu/drm/rcar-du/rcar_du_drv.h
index ed35467..d1d1d8d 100644
--- a/drivers/gpu/drm/rcar-du/rcar_du_drv.h
+++ b/drivers/gpu/drm/rcar-du/rcar_du_drv.h
@@ -20,6 +20,7 @@
 #include "rcar_du_crtc.h"
 #include "rcar_du_group.h"
 #include "rcar_du_vsp.h"
+#include "rcar_du_encoder.h"
 
 struct clk;
 struct device;
@@ -31,6 +32,7 @@ struct rcar_du_lvdsenc;
 #define RCAR_DU_FEATURE_CRTC_IRQ_CLOCK (1 << 0)/* Per-CRTC IRQ and 
clock */
 #define RCAR_DU_FEATURE_EXT_CTRL_REGS  (1 << 1)/* Has extended control 
registers */
 #define RCAR_DU_FEATURE_VSP1_SOURCE(1 << 2)/* Has inputs from VSP1 
*/
+#define RCAR_DU_FEATURE_GEN3_REGS  (1 << 3)/* Use Gen3 registers */
 
 #define RCAR_DU_QUIRK_ALIGN_128B   (1 << 0)/* Align pitches to 128 
bytes */
 #define RCAR_DU_QUIRK_LVDS_LANES   (1 << 1)/* LVDS lanes 1 and 3 
inverted */
-- 
2.7.4

[RFC 00/21] Renesas r8a7795/Salvator-X HDMI output prototype

[Ulrich Hecht]

Hi!

This is a prototype of HDMI output support for the Renesas r8a7795 SoC and
Salvator-X board.  It is based on the renesas-devel-20160516-v4.6 tree and
includes the bridge API conversion patches to the adv7511 and rcar-du
drivers written by Archit Taneja.

The obvious issue with this series is the awkward binding of the dw-hdmi
bridge IP, which can be seen in the "drm: rcar-du: Add dw_hdmi driver
startup" patch.  Any comments on how to implement this interface properly
are much appreciated.

Functionally, this series works as expected on both connectors, but EDID
reading is currently broken.

CU
Uli


Archit Taneja (2):
  drm: rcar-du: Remove i2c slave encoder interface for hdmi encoder
  drm: i2c: adv7511: Convert to drm_bridge

Koji Matsuoka (12):
  media: vsp1: Set format to RPF input source
  drm: bridge/dw_hdmi: Fix R-Car Gen3 device support
  drm: rcar-du: Add R8A7795 device support
  drm: rcar-du: Add dw_hdmi driver startup
  drm: rcar-du: Add DPLL support
  drm: rcar-du: Fix display registers for R-Car Gen3
  drm: rcar-du: Fix VSP plane number per devices
  drm: rcar-du: Fix VSP feed plane number
  drm: rcar-du: Add pixel format support
  drm: rcar-du: Fix display max size to 4096x2160 size
  arm64: dts: salvator-x: Add DU pins, HDMI connectors and encoder
  arm64: configs: Enable R-Car DU related config

Kuninori Morimoto (1):
  arm64: defconfig: add VIDEO_RENESAS_FCP

Ulrich Hecht (5):
  v4l: vsp1: Change VSP1 LIF linebuffer FIFO
  pinctrl: sh-pfc: r8a7795: Add DU support
  pinctrl: sh-pfc: r8a7795: Add HDMI CEC support
  arm64: dts: r8a7795: Add HDMI encoder support
  arm64: dts: r8a7795: add HDMI support to DU

Vladimir Zapolskiy (1):
  drm: bridge/dw_hdmi: add dw hdmi i2c bus adapter support

 arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts | 107 +
 arch/arm64/boot/dts/renesas/r8a7795.dtsi   |  33 +-
 arch/arm64/configs/defconfig   |  15 +
 drivers/gpu/drm/bridge/dw-hdmi.c   | 489 +++--
 drivers/gpu/drm/i2c/adv7511.c  | 224 ++
 drivers/gpu/drm/rcar-du/Kconfig|   2 +
 drivers/gpu/drm/rcar-du/Makefile   |   3 +-
 drivers/gpu/drm/rcar-du/rcar_du_crtc.c |  97 +++-
 drivers/gpu/drm/rcar-du/rcar_du_crtc.h |  12 +-
 drivers/gpu/drm/rcar-du/rcar_du_drv.c  |  20 +-
 drivers/gpu/drm/rcar-du/rcar_du_drv.h  |   6 +-
 drivers/gpu/drm/rcar-du/rcar_du_encoder.c  |  12 +-
 drivers/gpu/drm/rcar-du/rcar_du_encoder.h  |  13 +-
 drivers/gpu/drm/rcar-du/rcar_du_group.c|   5 +
 drivers/gpu/drm/rcar-du/rcar_du_hdmicon.c  | 117 -
 drivers/gpu/drm/rcar-du/rcar_du_hdmicon.h  |  31 --
 drivers/gpu/drm/rcar-du/rcar_du_hdmienc.c  | 260 ---
 drivers/gpu/drm/rcar-du/rcar_du_kms.c  |  68 ++-
 drivers/gpu/drm/rcar-du/rcar_du_kms.h  |   1 +
 drivers/gpu/drm/rcar-du/rcar_du_plane.c|   8 +-
 drivers/gpu/drm/rcar-du/rcar_du_plane.h|   7 +-
 drivers/gpu/drm/rcar-du/rcar_du_regs.h |  19 +
 drivers/gpu/drm/rcar-du/rcar_du_vsp.c  |  51 ++-
 drivers/media/platform/vsp1/vsp1_drm.c |   6 +
 drivers/media/platform/vsp1/vsp1_lif.c |   6 +-
 drivers/pinctrl/sh-pfc/pfc-r8a7795.c   | 113 +
 include/drm/bridge/dw_hdmi.h   |   9 +
 27 files changed, 1388 insertions(+), 346 deletions(-)
 delete mode 100644 drivers/gpu/drm/rcar-du/rcar_du_hdmicon.c
 delete mode 100644 drivers/gpu/drm/rcar-du/rcar_du_hdmicon.h

-- 
2.7.4

Re: [PATCH 01/49] ASoC: simple-card: remove duplicate header

[Mark Brown]

On Fri, May 20, 2016 at 09:38:39AM +, Kuninori Morimoto wrote:
> 
> From: Kuninori Morimoto 
> 
> simple-card.h includes soc.h, and soc.h includes soc-dai.h
> Let's remove these header.

It's not automatically good to remove headers, one common reason for
build breaks is that a file will rely on some header including another
header for an API it uses but then the header will change and the C file
will stop building.  It's better to directly include any headers that
are being used to avoid issues like this.


signature.asc
Description: PGP signature

Re: [PATCH net-next] ravb: Add ESF in RCR for enabling separation filter

[Sergei Shtylyov]

On 05/29/2016 11:25 PM, Yoshihiro Kaneko wrote:


From: Masaru Nagai 

This patch adds enabling separation filter(ESF) is setting value of B'11.
This setting filter for separating AVB stream frames from non-AVB stream
frames is enabled. Non-matching frames from a stream are processed in
queue 0(best effort). H/W manual recommends B'11 or B'10.
When B'10 is setting, Non-mating frames are discarded.


   It was somewhat hard for me to parse that...


Signed-off-by: Masaru Nagai 
Signed-off-by: Kazuya Mizuguchi 
Signed-off-by: Yoshihiro Kaneko 


Acked-by: Sergei Shtylyov 

MBR, Sergei

Re: [PATCH net-next] ravb: Add SET_RUNTIME_PM_OPS macro

[Sergei Shtylyov]

Hello.

On 05/29/2016 11:25 PM, Yoshihiro Kaneko wrote:


From: Kazuya Mizuguchi 

Use SET_RUNTIME_PM_OPS macro instead of assigning a member of
dev_pm_ops directly.

Signed-off-by: Kazuya Mizuguchi 
Signed-off-by: Yoshihiro Kaneko 


Acked-by: Sergei Shtylyov 

MBR, Sergei

Re: [PATCH 3/4] dt-bindings: Document Renesas R-Car FCP power-domains usage

[Kieran Bingham]

Hi Geert,

On 28/05/16 20:03, Geert Uytterhoeven wrote:
> Hi Kieran,
> 
> On Fri, May 27, 2016 at 7:19 PM, Kieran Bingham  
> wrote:
>> The example misses the power-domains usage, and documentation that the
>> property is used by the node.
>>
>> Signed-off-by: Kieran Bingham 
> 
> Thanks for your patch!
> 
>> ---
>>  Documentation/devicetree/bindings/media/renesas,fcp.txt | 3 +++
>>  1 file changed, 3 insertions(+)
>>
>> diff --git a/Documentation/devicetree/bindings/media/renesas,fcp.txt 
>> b/Documentation/devicetree/bindings/media/renesas,fcp.txt
>> index 1c0718b501ef..464bb7ae4b92 100644
>> --- a/Documentation/devicetree/bindings/media/renesas,fcp.txt
>> +++ b/Documentation/devicetree/bindings/media/renesas,fcp.txt
>> @@ -21,6 +21,8 @@ are paired with. These DT bindings currently support the 
>> FCPV and FCPF.
>>
>>   - reg: the register base and size for the device registers
>>   - clocks: Reference to the functional clock
>> + - power-domains : power-domain property defined with a phandle
>> +   to respective power domain.
> 
> I'd write "power domain specifier" instead of "phandle". While SYSC on R-Car
> Gen3 uses #power-domain-cells = 0, the FCP module may show up on another
> SoC that uses a different value, needing more than just a phandle.
> 
> In fact I'm inclined to leave out the power-domains property completely:
> it's not a feature of the FCP, but of the SoC the FCP is part of.
> power-domains properties may appear in any device node where needed.

I'm happy to just drop this part. It was mainly the addition to the
example I was after, as I had followed the example, and thus missed the
power-domain setting.

>>  Device node example
>> @@ -30,4 +32,5 @@ Device node example
>> compatible = "renesas,r8a7795-fcpv", "renesas,fcpv";
>> reg = <0 0xfea2f000 0 0x200>;
>> clocks = < CPG_MOD 602>;
>> +   power-domains = < R8A7795_PD_A3VP>;
> 
> Adding it to the example doesn't hurt, though.

Ok, I'll adjust and just keep the example in v2.

-- 
Regards

Kieran Bingham

Re: [PATCH 2/4] dt-bindings: Update Renesas R-Car FCP DT binding

[Kieran Bingham]

Hi Geert!

On 28/05/16 20:06, Geert Uytterhoeven wrote:
> Hi Kieran,
> 
> On Fri, May 27, 2016 at 7:19 PM, Kieran Bingham  
> wrote:
>> The FCP driver, can also support the FCPF variant for FDP1 compatible
>> processing.
>>
>> Signed-off-by: Kieran Bingham 
> 
> Thanks for your patch!
> 
>> ---
>>  Documentation/devicetree/bindings/media/renesas,fcp.txt | 3 ++-
>>  1 file changed, 2 insertions(+), 1 deletion(-)
>>
>> Cc: devicet...@vger.kernel.org
>>
>> diff --git a/Documentation/devicetree/bindings/media/renesas,fcp.txt 
>> b/Documentation/devicetree/bindings/media/renesas,fcp.txt
>> index 6a12960609d8..1c0718b501ef 100644
>> --- a/Documentation/devicetree/bindings/media/renesas,fcp.txt
>> +++ b/Documentation/devicetree/bindings/media/renesas,fcp.txt
>> @@ -7,11 +7,12 @@ conversion of AXI transactions in order to reduce the 
>> memory bandwidth.
>>
>>  There are three types of FCP: FCP for Codec (FCPC), FCP for VSP (FCPV) and 
>> FCP
>>  for FDP (FCPF). Their configuration and behaviour depend on the module they
>> -are paired with. These DT bindings currently support the FCPV only.
>> +are paired with. These DT bindings currently support the FCPV and FCPF.
>>
>>   - compatible: Must be one or more of the following
>>
>> - "renesas,r8a7795-fcpv" for R8A7795 (R-Car H3) compatible 'FCP for VSP'
>> +   - "renesas,r8a7795-fcpf" for R8A7795 (R-Car H3) compatible 'FCP for FDP'
>> - "renesas,fcpv" for generic compatible 'FCP for VSP'
> 
> I guess checkpatch complained about your dtsi additions because you forgot
> to add  "renesas,fcpf" here?

Yes. Looks quite obvious doesn't it :)
I thought CP.pl was complaining because the file was renesas,fcp.txt,
and I was adding in fcpf!.

I was clearly a bit too keen to get those patches out on a friday
evening. I must remember that I'm not smarter than checkpatch!

I'll add the missing line :)

> Gr{oetje,eeting}s,
> 
> Geert
> 
> --
> Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- 
> ge...@linux-m68k.org
> 
> In personal conversations with technical people, I call myself a hacker. But
> when I'm talking to journalists I just say "programmer" or something like 
> that.
> -- Linus Torvalds
> 

-- 
Regards

Kieran Bingham

Re: R8A7795 FDP1 clock parentage

[Kieran Bingham]

Hi Morimoto-san,

On 30/05/16 07:32, Kuninori Morimoto wrote:
>>> Just to add to this request, could you ask the HW engineers to confirm
>>> the clock parents for the FCPF (0,1,2) as well please?
>>>
>>> They too are currently listed as R8A7795_CLK_S2D1, however now that I am
>>> trying to enable the FCPF and read registers from it - the VCR is
>>> returning as 0x00 (I expect 0x0101) and then I'm getting
>>>  "Bad mode in Error handler detected, code 0xbf02 -- SError"
>>>
>>> My suspicion is that my clock has not been enabled correctly :)
>>
>> About FCP, I had same request from Laurent, and its answer was this thread.
>>
>> http://thread.gmane.org/gmane.linux.kernel.renesas-soc/662/focus=1304

Thank you for that reference. It was helpful!

>> # I think this "parent clock" settings itself is not super critical
>> # (= it works anyway with wrong settings)
>> # it seems other issues ?

You were right :) - It was the power-domain. It's resolved now and
working. Thank you for your help.

> I got information from HW team.
> About H3 ES1 FDP1 parent clock is "S2D1"

Perfect, thanks for confirming this. Now the patch is unblocked from
submission.

-- 
Regards

Kieran Bingham

Re: R8A7795 FDP1 clock parentage

[Kuninori Morimoto]

Hi Kieran

> > Just to add to this request, could you ask the HW engineers to confirm
> > the clock parents for the FCPF (0,1,2) as well please?
> > 
> > They too are currently listed as R8A7795_CLK_S2D1, however now that I am
> > trying to enable the FCPF and read registers from it - the VCR is
> > returning as 0x00 (I expect 0x0101) and then I'm getting
> >  "Bad mode in Error handler detected, code 0xbf02 -- SError"
> > 
> > My suspicion is that my clock has not been enabled correctly :)
> 
> About FCP, I had same request from Laurent, and its answer was this thread.
> 
> http://thread.gmane.org/gmane.linux.kernel.renesas-soc/662/focus=1304
> 
> # I think this "parent clock" settings itself is not super critical
> # (= it works anyway with wrong settings)
> # it seems other issues ?

I got information from HW team.
About H3 ES1 FDP1 parent clock is "S2D1"