[PATCH 3/3] iommu/ipmmu-vmsa: Hook up r8a7796 DT matching code

[Magnus Damm]

From: Magnus Damm 

Support the r8a7796 IPMMU by sharing feature flags between
r8a7795 and r8a7796. Also update IOMMU_OF_DECLARE to hook
up the updated compat string.

Signed-off-by: Magnus Damm 
---

 drivers/iommu/ipmmu-vmsa.c |9 +++--
 1 file changed, 7 insertions(+), 2 deletions(-)

--- 0031/drivers/iommu/ipmmu-vmsa.c
+++ work/drivers/iommu/ipmmu-vmsa.c 2016-06-06 11:19:40.210607110 +0900
@@ -1074,7 +1074,7 @@ static const struct ipmmu_features ipmmu
.twobit_imttbcr_sl0 = false,
 };
 
-static const struct ipmmu_features ipmmu_features_r8a7795 = {
+static const struct ipmmu_features ipmmu_features_rcar_gen3 = {
.use_ns_alias_offset = false,
.has_cache_leaf_nodes = true,
.has_eight_ctx = true,
@@ -1088,7 +1088,10 @@ static const struct of_device_id ipmmu_o
.data = _features_default,
}, {
.compatible = "renesas,ipmmu-r8a7795",
-   .data = _features_r8a7795,
+   .data = _features_rcar_gen3,
+   }, {
+   .compatible = "renesas,ipmmu-r8a7796",
+   .data = _features_rcar_gen3,
}, {
/* Terminator */
},
@@ -1268,6 +1271,8 @@ IOMMU_OF_DECLARE(ipmmu_vmsa_iommu_of, "r
 ipmmu_vmsa_iommu_of_setup);
 IOMMU_OF_DECLARE(ipmmu_r8a7795_iommu_of, "renesas,ipmmu-r8a7795",
 ipmmu_vmsa_iommu_of_setup);
+IOMMU_OF_DECLARE(ipmmu_r8a7796_iommu_of, "renesas,ipmmu-r8a7796",
+ipmmu_vmsa_iommu_of_setup);
 #endif
 
 MODULE_DESCRIPTION("IOMMU API for Renesas VMSA-compatible IPMMU");

[PATCH 2/3] iommu/ipmmu-vmsa: Increase maximum micro-TLBS to 48

[Magnus Damm]

From: Magnus Damm 

Bump up the maximum numbers of micro-TLBS to 48.

Each IPMMU device instance get micro-TLB assignment via
the "iommus" property in DT. Older SoCs tend to use a
maximum number of 32 micro-TLBd per IPMMU instance however
newer SoCs such as r8a7796 make use of up to 48 micro-TLBs.

At this point no SoC specific handling is done to validate
the maximum number of micro-TLBs, and because of that the
DT information is assumed to be within correct range for
each particular SoC.

If needed in the future SoC specific feature flags can be
added to handle the maximum number of micro-TLBs without
requiring DT changes, however at this point this does not
seem necessary.

Signed-off-by: Magnus Damm 
---

 drivers/iommu/ipmmu-vmsa.c |2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

--- 0029/drivers/iommu/ipmmu-vmsa.c
+++ work/drivers/iommu/ipmmu-vmsa.c 2016-06-06 11:17:33.230607110 +0900
@@ -1115,7 +1115,7 @@ static int ipmmu_probe(struct platform_d
}
 
mmu->dev = >dev;
-   mmu->num_utlbs = 32;
+   mmu->num_utlbs = 48;
spin_lock_init(>lock);
bitmap_zero(mmu->ctx, IPMMU_CTX_MAX);
mmu->features = match->data;

[PATCH 0/3] iommu/ipmmu-vmsa: Initial r8a7796 support

[Magnus Damm]

iommu/ipmmu-vmsa: Initial r8a7796 support

[PATCH 1/3] iommu/ipmmu-vmsa: Add r8a7796 DT binding
[PATCH 2/3] iommu/ipmmu-vmsa: Increase maximum micro-TLBS to 48
[PATCH 3/3] iommu/ipmmu-vmsa: Hook up r8a7796 DT matching code

This series adds r8a7796 support to the IPMMU driver. The DT binding
gets updated, maximum number of micro-TLBs are increased and the
driver is adjusted to match on the new DT binding.

The main differences between r8a7795 and r8a7796 IPMMUs are:
1) Number of on-chip IPMMU device instances
2) Interrupt register bit assignment for IPMMU-MM
3) Maximum number of micro-TLBs
4) Micro-TLB assignment

DT binding extension and change number 3 above are part of this patch
series. Other changes will be part of DT integration code that will be
submitted separately.

Signed-off-by: Magnus Damm 
---

 Developed on top of next-20160602 and:
 [PATCH v3 00/06] iommu/ipmmu-vmsa: IPMMU multi-arch update V3
 [PATCH v2 00/11] iommu/ipmmu-vmsa: r8a7795 support V2

 Documentation/devicetree/bindings/iommu/renesas,ipmmu-vmsa.txt |1 
 drivers/iommu/ipmmu-vmsa.c |   11 
+++---
 2 files changed, 9 insertions(+), 3 deletions(-)

[PATCH v1 00/25] PCI: Request host bridge window resources

[Bjorn Helgaas]

Several host bridge drivers (designware and all derivatives, iproc,
xgene, xilinx, and xilinx-nwl) don't request the MMIO and I/O port
windows they forward downstream to the PCI bus.

That means the PCI core can't request resources for PCI bridge
windows and PCI BARs.

Several other drivers (altera, generic, mvebu, rcar, tegra) do request
the windows, but use some duplicated code to do it.

This adds a new devm_request_pci_bus_resources() interface and changes
these drivers to use it.  It also fixes several error paths where we failed
to free the resource list allocated by of_pci_get_host_bridge_resources().

Tegra guys, please take a look at "PCI: tegra: Remove top-level resource
from hierarchy" in particular.  Removing the top-level resource definitely
makes /proc/iomem look uglier (although it will look more like that of
other drivers).  A short-term fix could be to include device information in
the resource name.  I think a better long-term fix would be to make the DT
or platform device core request all the resources from the DT.

Comments welcome.  I expect we'll trip over something here, so I marked
this "v1" and I don't plan to put it into -next for a while.

This is on my pci/host-request-windows branch, which you can pull or view
at 
https://git.kernel.org/cgit/linux/kernel/git/helgaas/pci.git/log/?h=pci/host-request-windows

---

Bjorn Helgaas (25):
  PCI: Add devm_request_pci_bus_resources()
  PCI: designware: Free bridge resource list on failure
  PCI: designware: Request host bridge window resources
  PCI: designware: Simplify host bridge window iteration
  PCI: iproc: Request host bridge window resources
  PCI: xgene: Free bridge resource list on failure
  PCI: xgene: Request host bridge window resources
  PCI: xilinx: Free bridge resource list on failure
  PCI: xilinx: Request host bridge window resources
  PCI: xilinx-nwl: Free bridge resource list on failure
  PCI: xilinx-nwl: Request host bridge window resources
  PCI: xilinx-nwl: Use dev_printk() when possible
  PCI: altera: Request host bridge window resources with core function
  PCI: altera: Simplify host bridge window iteration
  PCI: generic: Free resource list close to where it's allocated
  PCI: generic: Request host bridge window resources with core function
  PCI: generic: Simplify host bridge window iteration
  PCI: mvebu: Request host bridge window resources with core function
  PCI: rcar Gen2: Request host bridge window resources
  PCI: rcar: Request host bridge window resources with core function
  PCI: rcar: Simplify host bridge window iteration
  PCI: tegra: Remove top-level resource from hierarchy
  PCI: tegra: Request host bridge window resources with core function
  PCI: versatile: Request host bridge window resources with core function
  PCI: versatile: Simplify host bridge window iteration


 drivers/pci/bus.c  |   29 +
 drivers/pci/host/pci-host-common.c |   61 +++-
 drivers/pci/host/pci-mvebu.c   |   17 --
 drivers/pci/host/pci-rcar-gen2.c   |4 ++
 drivers/pci/host/pci-tegra.c   |   35 +++--
 drivers/pci/host/pci-versatile.c   |   29 ++---
 drivers/pci/host/pci-xgene.c   |   16 -
 drivers/pci/host/pcie-altera.c |   35 ++---
 drivers/pci/host/pcie-designware.c |   34 +---
 drivers/pci/host/pcie-iproc.c  |4 ++
 drivers/pci/host/pcie-rcar.c   |   33 +--
 drivers/pci/host/pcie-xilinx-nwl.c |   20 +---
 drivers/pci/host/pcie-xilinx.c |   16 -
 include/linux/pci.h|5 ++-
 14 files changed, 170 insertions(+), 168 deletions(-)

[PATCH v1 02/25] PCI: designware: Free bridge resource list on failure

[Bjorn Helgaas]

of_pci_get_host_bridge_resources() allocates a list of resources for host
bridge windows.  If we fail after allocating that list, free it before we
return error.

Signed-off-by: Bjorn Helgaas 
---
 drivers/pci/host/pcie-designware.c |   24 +---
 1 file changed, 17 insertions(+), 7 deletions(-)

diff --git a/drivers/pci/host/pcie-designware.c 
b/drivers/pci/host/pcie-designware.c
index aafd766..9ade767 100644
--- a/drivers/pci/host/pcie-designware.c
+++ b/drivers/pci/host/pcie-designware.c
@@ -493,7 +493,8 @@ int dw_pcie_host_init(struct pcie_port *pp)
resource_size(pp->cfg));
if (!pp->dbi_base) {
dev_err(pp->dev, "error with ioremap\n");
-   return -ENOMEM;
+   ret = -ENOMEM;
+   goto error;
}
}
 
@@ -504,7 +505,8 @@ int dw_pcie_host_init(struct pcie_port *pp)
pp->cfg0_size);
if (!pp->va_cfg0_base) {
dev_err(pp->dev, "error with ioremap in function\n");
-   return -ENOMEM;
+   ret = -ENOMEM;
+   goto error;
}
}
 
@@ -513,7 +515,8 @@ int dw_pcie_host_init(struct pcie_port *pp)
pp->cfg1_size);
if (!pp->va_cfg1_base) {
dev_err(pp->dev, "error with ioremap\n");
-   return -ENOMEM;
+   ret = -ENOMEM;
+   goto error;
}
}
 
@@ -528,7 +531,8 @@ int dw_pcie_host_init(struct pcie_port *pp)
_pcie_msi_chip);
if (!pp->irq_domain) {
dev_err(pp->dev, "irq domain init failed\n");
-   return -ENXIO;
+   ret = -ENXIO;
+   goto error;
}
 
for (i = 0; i < MAX_MSI_IRQS; i++)
@@ -536,7 +540,7 @@ int dw_pcie_host_init(struct pcie_port *pp)
} else {
ret = pp->ops->msi_host_init(pp, _pcie_msi_chip);
if (ret < 0)
-   return ret;
+   goto error;
}
}
 
@@ -552,8 +556,10 @@ int dw_pcie_host_init(struct pcie_port *pp)
} else
bus = pci_scan_root_bus(pp->dev, pp->root_bus_nr, _pcie_ops,
pp, );
-   if (!bus)
-   return -ENOMEM;
+   if (!bus) {
+   ret = -ENOMEM;
+   goto error;
+   }
 
if (pp->ops->scan_bus)
pp->ops->scan_bus(pp);
@@ -571,6 +577,10 @@ int dw_pcie_host_init(struct pcie_port *pp)
 
pci_bus_add_devices(bus);
return 0;
+
+error:
+   pci_free_resource_list();
+   return ret;
 }
 
 static int dw_pcie_rd_other_conf(struct pcie_port *pp, struct pci_bus *bus,

[PATCH v1 05/25] PCI: iproc: Request host bridge window resources

[Bjorn Helgaas]

Request host bridge window resources so they appear in ioport_resource and
iomem_resource and are reflected in /proc/ioports and /proc/iomem.

Signed-off-by: Bjorn Helgaas 
---
 drivers/pci/host/pcie-iproc.c |4 
 1 file changed, 4 insertions(+)

diff --git a/drivers/pci/host/pcie-iproc.c b/drivers/pci/host/pcie-iproc.c
index a576aee..e167b2f 100644
--- a/drivers/pci/host/pcie-iproc.c
+++ b/drivers/pci/host/pcie-iproc.c
@@ -462,6 +462,10 @@ int iproc_pcie_setup(struct iproc_pcie *pcie, struct 
list_head *res)
if (!pcie || !pcie->dev || !pcie->base)
return -EINVAL;
 
+   ret = devm_request_pci_bus_resources(pcie->dev, res);
+   if (ret)
+   return ret;
+
ret = phy_init(pcie->phy);
if (ret) {
dev_err(pcie->dev, "unable to initialize PCIe PHY\n");

[PATCH v1 01/25] PCI: Add devm_request_pci_bus_resources()

[Bjorn Helgaas]

Several host bridge drivers iterate through the list of bridge windows to
request resources.  Several others don't request the window resources at
all.

Add a devm_request_pci_bus_resources() interface to make it easier for
drivers to request all the window resources.

Signed-off-by: Bjorn Helgaas 
---
 drivers/pci/bus.c   |   29 -
 include/linux/pci.h |5 -
 2 files changed, 32 insertions(+), 2 deletions(-)

diff --git a/drivers/pci/bus.c b/drivers/pci/bus.c
index dd7cdbe..78b90c7 100644
--- a/drivers/pci/bus.c
+++ b/drivers/pci/bus.c
@@ -91,6 +91,34 @@ void pci_bus_remove_resources(struct pci_bus *bus)
}
 }
 
+int devm_request_pci_bus_resources(struct device *dev,
+  struct list_head *resources)
+{
+   struct resource_entry *win;
+   struct resource *parent, *res;
+   int err;
+
+   resource_list_for_each_entry(win, resources) {
+   res = win->res;
+   switch (resource_type(res)) {
+   case IORESOURCE_IO:
+   parent = _resource;
+   break;
+   case IORESOURCE_MEM:
+   parent = _resource;
+   break;
+   default:
+   continue;
+   }
+
+   err = devm_request_resource(dev, parent, res);
+   if (err)
+   return err;
+   }
+
+   return 0;
+}
+
 static struct pci_bus_region pci_32_bit = {0, 0xULL};
 #ifdef CONFIG_PCI_BUS_ADDR_T_64BIT
 static struct pci_bus_region pci_64_bit = {0,
@@ -397,4 +425,3 @@ void pci_bus_put(struct pci_bus *bus)
put_device(>dev);
 }
 EXPORT_SYMBOL(pci_bus_put);
-
diff --git a/include/linux/pci.h b/include/linux/pci.h
index b67e4df..6ac8360 100644
--- a/include/linux/pci.h
+++ b/include/linux/pci.h
@@ -1143,9 +1143,12 @@ void pci_add_resource(struct list_head *resources, 
struct resource *res);
 void pci_add_resource_offset(struct list_head *resources, struct resource *res,
 resource_size_t offset);
 void pci_free_resource_list(struct list_head *resources);
-void pci_bus_add_resource(struct pci_bus *bus, struct resource *res, unsigned 
int flags);
+void pci_bus_add_resource(struct pci_bus *bus, struct resource *res,
+ unsigned int flags);
 struct resource *pci_bus_resource_n(const struct pci_bus *bus, int n);
 void pci_bus_remove_resources(struct pci_bus *bus);
+int devm_request_pci_bus_resources(struct device *dev,
+  struct list_head *resources);
 
 #define pci_bus_for_each_resource(bus, res, i) \
for (i = 0; \

[PATCH v1 04/25] PCI: designware: Simplify host bridge window iteration

[Bjorn Helgaas]

The switch is the only statement in the resource_list_for_each_entry()
loop, so remove unnecessary "continue" statements in the switch.

No functional change intended.

Signed-off-by: Bjorn Helgaas 
---
 drivers/pci/host/pcie-designware.c |6 +-
 1 file changed, 1 insertion(+), 5 deletions(-)

diff --git a/drivers/pci/host/pcie-designware.c 
b/drivers/pci/host/pcie-designware.c
index 8304aeb..12afce1 100644
--- a/drivers/pci/host/pcie-designware.c
+++ b/drivers/pci/host/pcie-designware.c
@@ -465,11 +465,9 @@ int dw_pcie_host_init(struct pcie_port *pp)
pp->io_size = resource_size(pp->io);
pp->io_bus_addr = pp->io->start - win->offset;
ret = pci_remap_iospace(pp->io, pp->io_base);
-   if (ret) {
+   if (ret)
dev_warn(pp->dev, "error %d: failed to map 
resource %pR\n",
 ret, pp->io);
-   continue;
-   }
break;
case IORESOURCE_MEM:
pp->mem = win->res;
@@ -487,8 +485,6 @@ int dw_pcie_host_init(struct pcie_port *pp)
case IORESOURCE_BUS:
pp->busn = win->res;
break;
-   default:
-   continue;
}
}
 

[PATCH v1 06/25] PCI: xgene: Free bridge resource list on failure

[Bjorn Helgaas]

of_pci_get_host_bridge_resources() allocates a list of resources for host
bridge windows.  If we fail after allocating that list, free it before we
return error.

Signed-off-by: Bjorn Helgaas 
---
 drivers/pci/host/pci-xgene.c |   12 +---
 1 file changed, 9 insertions(+), 3 deletions(-)

diff --git a/drivers/pci/host/pci-xgene.c b/drivers/pci/host/pci-xgene.c
index ae00ce2..bc4e1c6 100644
--- a/drivers/pci/host/pci-xgene.c
+++ b/drivers/pci/host/pci-xgene.c
@@ -542,12 +542,14 @@ static int xgene_pcie_probe_bridge(struct platform_device 
*pdev)
 
ret = xgene_pcie_setup(port, , iobase);
if (ret)
-   return ret;
+   goto error;
 
bus = pci_create_root_bus(>dev, 0,
_pcie_ops, port, );
-   if (!bus)
-   return -ENOMEM;
+   if (!bus) {
+   ret = -ENOMEM;
+   goto error;
+   }
 
pci_scan_child_bus(bus);
pci_assign_unassigned_bus_resources(bus);
@@ -555,6 +557,10 @@ static int xgene_pcie_probe_bridge(struct platform_device 
*pdev)
 
platform_set_drvdata(pdev, port);
return 0;
+
+error:
+   pci_free_resource_list();
+   return ret;
 }
 
 static const struct of_device_id xgene_pcie_match_table[] = {

[PATCH v1 10/25] PCI: xilinx-nwl: Free bridge resource list on failure

[Bjorn Helgaas]

of_pci_get_host_bridge_resources() allocates a list of resources for host
bridge windows.  If we fail after allocating that list, free it before we
return error.

Signed-off-by: Bjorn Helgaas 
---
 drivers/pci/host/pcie-xilinx-nwl.c |   14 ++
 1 file changed, 10 insertions(+), 4 deletions(-)

diff --git a/drivers/pci/host/pcie-xilinx-nwl.c 
b/drivers/pci/host/pcie-xilinx-nwl.c
index 3479d30..506da7b 100644
--- a/drivers/pci/host/pcie-xilinx-nwl.c
+++ b/drivers/pci/host/pcie-xilinx-nwl.c
@@ -832,20 +832,22 @@ static int nwl_pcie_probe(struct platform_device *pdev)
err = nwl_pcie_init_irq_domain(pcie);
if (err) {
dev_err(pcie->dev, "Failed creating IRQ Domain\n");
-   return err;
+   goto error;
}
 
bus = pci_create_root_bus(>dev, pcie->root_busno,
  _pcie_ops, pcie, );
-   if (!bus)
-   return -ENOMEM;
+   if (!bus) {
+   err = -ENOMEM;
+   goto error;
+   }
 
if (IS_ENABLED(CONFIG_PCI_MSI)) {
err = nwl_pcie_enable_msi(pcie, bus);
if (err < 0) {
dev_err(>dev,
"failed to enable MSI support: %d\n", err);
-   return err;
+   goto error;
}
}
pci_scan_child_bus(bus);
@@ -855,6 +857,10 @@ static int nwl_pcie_probe(struct platform_device *pdev)
pci_bus_add_devices(bus);
platform_set_drvdata(pdev, pcie);
return 0;
+
+error:
+   pci_free_resource_list();
+   return err;
 }
 
 static int nwl_pcie_remove(struct platform_device *pdev)

[PATCH v1 12/25] PCI: xilinx-nwl: Use dev_printk() when possible

[Bjorn Helgaas]

Use dev_printk() when possible to make messages more useful.

Signed-off-by: Bjorn Helgaas 
---
 drivers/pci/host/pcie-xilinx-nwl.c |2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/pci/host/pcie-xilinx-nwl.c 
b/drivers/pci/host/pcie-xilinx-nwl.c
index 3c16bbf..0b597d9 100644
--- a/drivers/pci/host/pcie-xilinx-nwl.c
+++ b/drivers/pci/host/pcie-xilinx-nwl.c
@@ -825,7 +825,7 @@ static int nwl_pcie_probe(struct platform_device *pdev)
 
err = of_pci_get_host_bridge_resources(node, 0, 0xff, , );
if (err) {
-   pr_err("Getting bridge resources failed\n");
+   dev_err(pcie->dev, "Getting bridge resources failed\n");
return err;
}
 

[PATCH v1 09/25] PCI: xilinx: Request host bridge window resources

[Bjorn Helgaas]

Request host bridge window resources so they appear in ioport_resource and
iomem_resource and are reflected in /proc/ioports and /proc/iomem.

Signed-off-by: Bjorn Helgaas 
---
 drivers/pci/host/pcie-xilinx.c |5 +
 1 file changed, 5 insertions(+)

diff --git a/drivers/pci/host/pcie-xilinx.c b/drivers/pci/host/pcie-xilinx.c
index 5c456db..4703aa3 100644
--- a/drivers/pci/host/pcie-xilinx.c
+++ b/drivers/pci/host/pcie-xilinx.c
@@ -693,6 +693,11 @@ static int xilinx_pcie_probe(struct platform_device *pdev)
dev_err(dev, "Getting bridge resources failed\n");
return err;
}
+
+   err = devm_request_pci_bus_resources(dev, );
+   if (err)
+   goto error;
+
bus = pci_create_root_bus(>dev, 0,
  _pcie_ops, port, );
if (!bus) {

[PATCH v1 07/25] PCI: xgene: Request host bridge window resources

[Bjorn Helgaas]

Request host bridge window resources so they appear in ioport_resource and
iomem_resource and are reflected in /proc/ioports and /proc/iomem.

For example, the following entries did not previously appear in /proc/iomem:

  e18000-e1 : /soc/pcie@1f2b
e18000-e182ff : PCI Bus :01
  e18000-e181ff : :01:00.0
  e18200-e1820f : :01:00.0
  e18210-e1821f : :01:00.0
  f0-ff : /soc/pcie@1f2b

Signed-off-by: Bjorn Helgaas 
---
 drivers/pci/host/pci-xgene.c |4 
 1 file changed, 4 insertions(+)

diff --git a/drivers/pci/host/pci-xgene.c b/drivers/pci/host/pci-xgene.c
index bc4e1c6..7eb20cc 100644
--- a/drivers/pci/host/pci-xgene.c
+++ b/drivers/pci/host/pci-xgene.c
@@ -540,6 +540,10 @@ static int xgene_pcie_probe_bridge(struct platform_device 
*pdev)
if (ret)
return ret;
 
+   ret = devm_request_pci_bus_resources(>dev, );
+   if (ret)
+   goto error;
+
ret = xgene_pcie_setup(port, , iobase);
if (ret)
goto error;

[PATCH v1 16/25] PCI: generic: Request host bridge window resources with core function

[Bjorn Helgaas]

Use devm_request_pci_bus_resources() to request host bridge window
resources instead of doing it by hand in the driver.

No functional change intended.

Signed-off-by: Bjorn Helgaas 
---
 drivers/pci/host/pci-host-common.c |   12 +---
 1 file changed, 5 insertions(+), 7 deletions(-)

diff --git a/drivers/pci/host/pci-host-common.c 
b/drivers/pci/host/pci-host-common.c
index 16a4e61..e7515fd 100644
--- a/drivers/pci/host/pci-host-common.c
+++ b/drivers/pci/host/pci-host-common.c
@@ -36,12 +36,15 @@ static int gen_pci_parse_request_of_pci_ranges(struct 
device *dev,
if (err)
return err;
 
+   err = devm_request_pci_bus_resources(dev, resources);
+   if (err)
+   goto out_release_res;
+
resource_list_for_each_entry(win, resources) {
-   struct resource *parent, *res = win->res;
+   struct resource *res = win->res;
 
switch (resource_type(res)) {
case IORESOURCE_IO:
-   parent = _resource;
err = pci_remap_iospace(res, iobase);
if (err) {
dev_warn(dev, "error %d: failed to map resource 
%pR\n",
@@ -50,7 +53,6 @@ static int gen_pci_parse_request_of_pci_ranges(struct device 
*dev,
}
break;
case IORESOURCE_MEM:
-   parent = _resource;
res_valid |= !(res->flags & IORESOURCE_PREFETCH);
break;
case IORESOURCE_BUS:
@@ -58,10 +60,6 @@ static int gen_pci_parse_request_of_pci_ranges(struct device 
*dev,
default:
continue;
}
-
-   err = devm_request_resource(dev, parent, res);
-   if (err)
-   goto out_release_res;
}
 
if (!res_valid) {

[PATCH v1 15/25] PCI: generic: Free resource list close to where it's allocated

[Bjorn Helgaas]

Previously we allocated the PCI resource list in
gen_pci_parse_request_of_pci_ranges(), but if we had an error, we freed it
on error in gen_pci_init().

Reorder gen_pci_init() so we can take care of error path cleanup in
gen_pci_parse_request_of_pci_ranges() instead.

Signed-off-by: Bjorn Helgaas 
---
 drivers/pci/host/pci-host-common.c |   32 +++-
 1 file changed, 15 insertions(+), 17 deletions(-)

diff --git a/drivers/pci/host/pci-host-common.c 
b/drivers/pci/host/pci-host-common.c
index 8cba7ab..16a4e61 100644
--- a/drivers/pci/host/pci-host-common.c
+++ b/drivers/pci/host/pci-host-common.c
@@ -73,6 +73,7 @@ static int gen_pci_parse_request_of_pci_ranges(struct device 
*dev,
return 0;
 
 out_release_res:
+   pci_free_resource_list(resources);
return err;
 }
 
@@ -89,33 +90,30 @@ static struct pci_config_window *gen_pci_init(struct device 
*dev,
struct resource *bus_range = NULL;
struct pci_config_window *cfg;
 
-   /* Parse our PCI ranges and request their resources */
-   err = gen_pci_parse_request_of_pci_ranges(dev, resources, _range);
-   if (err)
-   goto err_out;
-
err = of_address_to_resource(dev->of_node, 0, );
if (err) {
dev_err(dev, "missing \"reg\" property\n");
-   goto err_out;
+   return err;
}
 
cfg = pci_ecam_create(dev, , bus_range, ops);
-   if (IS_ERR(cfg)) {
-   err = PTR_ERR(cfg);
-   goto err_out;
-   }
+   if (IS_ERR(cfg))
+   return PTR_ERR(cfg);
 
err = devm_add_action(dev, gen_pci_unmap_cfg, cfg);
-   if (err) {
-   gen_pci_unmap_cfg(cfg);
-   goto err_out;
-   }
+   if (err)
+   goto err_cfg;
+
+   /* Parse our PCI ranges and request their resources */
+   err = gen_pci_parse_request_of_pci_ranges(dev, resources, _range);
+   if (err)
+   goto err_cfg;
+
return cfg;
 
-err_out:
-   pci_free_resource_list(resources);
-   return ERR_PTR(err);
+err_cfg:
+   gen_pci_unmap_cfg(cfg);
+   return err;
 }
 
 int pci_host_common_probe(struct platform_device *pdev,

[PATCH v1 19/25] PCI: rcar Gen2: Request host bridge window resources

[Bjorn Helgaas]

Request host bridge window resources so they appear in ioport_resource and
iomem_resource and are reflected in /proc/ioports and /proc/iomem.

Signed-off-by: Bjorn Helgaas 
---
 drivers/pci/host/pci-rcar-gen2.c |4 
 1 file changed, 4 insertions(+)

diff --git a/drivers/pci/host/pci-rcar-gen2.c b/drivers/pci/host/pci-rcar-gen2.c
index 9980a4b..617a6b2 100644
--- a/drivers/pci/host/pci-rcar-gen2.c
+++ b/drivers/pci/host/pci-rcar-gen2.c
@@ -194,6 +194,7 @@ static int rcar_pci_setup(int nr, struct pci_sys_data *sys)
struct rcar_pci_priv *priv = sys->private_data;
void __iomem *reg = priv->reg;
u32 val;
+   int ret;
 
pm_runtime_enable(priv->dev);
pm_runtime_get_sync(priv->dev);
@@ -275,6 +276,9 @@ static int rcar_pci_setup(int nr, struct pci_sys_data *sys)
/* Add PCI resources */
pci_add_resource(>resources, >io_res);
pci_add_resource(>resources, >mem_res);
+   ret = devm_request_pci_bus_resources(priv->dev, >resources);
+   if (ret < 0)
+   return ret;
 
/* Setup bus number based on platform device id / of bus-range */
sys->busnr = priv->busnr;

[PATCH v1 14/25] PCI: altera: Simplify host bridge window iteration

[Bjorn Helgaas]

The switch is the only statement in the resource_list_for_each_entry()
loop, so remove unnecessary "continue" statements in the switch.  Simplify
checking for the required non-prefetchable memory aperture.  Inline
altera_pcie_release_of_pci_ranges(), which is only called once.

No functional change intended.

Signed-off-by: Bjorn Helgaas 
---
 drivers/pci/host/pcie-altera.c |   24 ++--
 1 file changed, 6 insertions(+), 18 deletions(-)

diff --git a/drivers/pci/host/pcie-altera.c b/drivers/pci/host/pcie-altera.c
index b97abbc..cf20c67 100644
--- a/drivers/pci/host/pcie-altera.c
+++ b/drivers/pci/host/pcie-altera.c
@@ -415,11 +415,6 @@ static void altera_pcie_isr(struct irq_desc *desc)
chained_irq_exit(chip, desc);
 }
 
-static void altera_pcie_release_of_pci_ranges(struct altera_pcie *pcie)
-{
-   pci_free_resource_list(>resources);
-}
-
 static int altera_pcie_parse_request_of_pci_ranges(struct altera_pcie *pcie)
 {
int err, res_valid = 0;
@@ -439,25 +434,18 @@ static int altera_pcie_parse_request_of_pci_ranges(struct 
altera_pcie *pcie)
resource_list_for_each_entry(win, >resources) {
struct resource *res = win->res;
 
-   switch (resource_type(res)) {
-   case IORESOURCE_MEM:
+   if (resource_type(res) == IORESOURCE_MEM)
res_valid |= !(res->flags & IORESOURCE_PREFETCH);
-   break;
-   default:
-   continue;
-   }
}
 
-   if (!res_valid) {
-   dev_err(dev, "non-prefetchable memory resource required\n");
-   err = -EINVAL;
-   goto out_release_res;
-   }
+   if (res_valid)
+   return 0;
 
-   return 0;
+   dev_err(dev, "non-prefetchable memory resource required\n");
+   err = -EINVAL;
 
 out_release_res:
-   altera_pcie_release_of_pci_ranges(pcie);
+   pci_free_resource_list(>resources);
return err;
 }
 

[PATCH v1 21/25] PCI: rcar: Simplify host bridge window iteration

[Bjorn Helgaas]

The switch is the only statement in the resource_list_for_each_entry()
loop, so remove unnecessary cases and "continue" statements in the switch.
Inline rcar_pcie_release_of_pci_ranges(), which is only called once.

No functional change intended.

Signed-off-by: Bjorn Helgaas 
---
 drivers/pci/host/pcie-rcar.c |   21 +++--
 1 file changed, 3 insertions(+), 18 deletions(-)

diff --git a/drivers/pci/host/pcie-rcar.c b/drivers/pci/host/pcie-rcar.c
index ce096db..6546ca7 100644
--- a/drivers/pci/host/pcie-rcar.c
+++ b/drivers/pci/host/pcie-rcar.c
@@ -938,11 +938,6 @@ static const struct of_device_id rcar_pcie_of_match[] = {
 };
 MODULE_DEVICE_TABLE(of, rcar_pcie_of_match);
 
-static void rcar_pcie_release_of_pci_ranges(struct rcar_pcie *pci)
-{
-   pci_free_resource_list(>resources);
-}
-
 static int rcar_pcie_parse_request_of_pci_ranges(struct rcar_pcie *pci)
 {
int err;
@@ -962,28 +957,18 @@ static int rcar_pcie_parse_request_of_pci_ranges(struct 
rcar_pcie *pci)
resource_list_for_each_entry(win, >resources) {
struct resource *res = win->res;
 
-   switch (resource_type(res)) {
-   case IORESOURCE_IO:
+   if (resource_type(res) == IORESOURCE_IO) {
err = pci_remap_iospace(res, iobase);
-   if (err) {
+   if (err)
dev_warn(dev, "error %d: failed to map resource 
%pR\n",
 err, res);
-   continue;
-   }
-   break;
-   case IORESOURCE_MEM:
-   break;
-
-   case IORESOURCE_BUS:
-   default:
-   continue;
}
}
 
return 0;
 
 out_release_res:
-   rcar_pcie_release_of_pci_ranges(pci);
+   pci_free_resource_list(>resources);
return err;
 }
 

[PATCH v1 17/25] PCI: generic: Simplify host bridge window iteration

[Bjorn Helgaas]

The switch is the only statement in the resource_list_for_each_entry()
loop, so remove unnecessary "continue" statements in the switch.  Simplify
checking for the required non-prefetchable memory aperture.

No functional change intended.

Signed-off-by: Bjorn Helgaas 
---
 drivers/pci/host/pci-host-common.c |   17 ++---
 1 file changed, 6 insertions(+), 11 deletions(-)

diff --git a/drivers/pci/host/pci-host-common.c 
b/drivers/pci/host/pci-host-common.c
index e7515fd..bb03120 100644
--- a/drivers/pci/host/pci-host-common.c
+++ b/drivers/pci/host/pci-host-common.c
@@ -46,29 +46,24 @@ static int gen_pci_parse_request_of_pci_ranges(struct 
device *dev,
switch (resource_type(res)) {
case IORESOURCE_IO:
err = pci_remap_iospace(res, iobase);
-   if (err) {
+   if (err)
dev_warn(dev, "error %d: failed to map resource 
%pR\n",
 err, res);
-   continue;
-   }
break;
case IORESOURCE_MEM:
res_valid |= !(res->flags & IORESOURCE_PREFETCH);
break;
case IORESOURCE_BUS:
*bus_range = res;
-   default:
-   continue;
+   break;
}
}
 
-   if (!res_valid) {
-   dev_err(dev, "non-prefetchable memory resource required\n");
-   err = -EINVAL;
-   goto out_release_res;
-   }
+   if (res_valid)
+   return 0;
 
-   return 0;
+   dev_err(dev, "non-prefetchable memory resource required\n");
+   err = -EINVAL;
 
 out_release_res:
pci_free_resource_list(resources);

[PATCH v1 22/25] PCI: tegra: Remove top-level resource from hierarchy

[Bjorn Helgaas]

41534e53786d ("PCI: tegra: Implement a proper resource hierarchy") did two
things:

  1) It added a top-level resource that encloses all resources declared in
 the DT description, including registers and bridge apertures, and

  2) It requested the bridge apertures, which means the PCI core can track
 the resources used by PCI devices below the bridge.

The latter is necessary, but the former is questionable because there's no
guarantee that the bridge registers and the apertures are contiguous.  In
this example:

  # cat /proc/iomem
  -3fff : /pcie-controller@3000
-0fff : /pcie-controller@3000/pci@1,0
3000-37ff : pads
3800-39ff : afi
1000-1fff : cs

the resource tree claims that [mem 0x3a00-0x0fff] is consumed by
/pcie-controller@3000, but it's not mentioned in the DT, and it might
actually be used by other devices.

Remove the top-level resource so we don't claim more than the device
actually consumes.

This reintroduces the problem that we can't match the resources, e.g.,
"pads", "afi", "cs", etc., to the DT device.  I think this should be solved
by having the DT core request all resources of all devices in the DT (it
does not do that today).  If a driver claims the device, it can request the
resources it uses.  For example:

  # cat /proc/iomem
  -0fff : /pcie-controller@3000
-0fff : /pcie-controller@3000/pci@1,0
  3000-37ff : /pcie-controller@3000
3000-37ff : pads
  3800-39ff : /pcie-controller@3000
3800-39ff : afi
  1000-1fff : /pcie-controller@3000
1000-1fff : cs
  ...

Signed-off-by: Bjorn Helgaas 
---
 drivers/pci/host/pci-tegra.c |   23 +++
 1 file changed, 3 insertions(+), 20 deletions(-)

diff --git a/drivers/pci/host/pci-tegra.c b/drivers/pci/host/pci-tegra.c
index c388468..920a899 100644
--- a/drivers/pci/host/pci-tegra.c
+++ b/drivers/pci/host/pci-tegra.c
@@ -274,7 +274,6 @@ struct tegra_pcie {
struct list_head buses;
struct resource *cs;
 
-   struct resource all;
struct resource io;
struct resource pio;
struct resource mem;
@@ -623,7 +622,7 @@ static int tegra_pcie_setup(int nr, struct pci_sys_data 
*sys)
sys->mem_offset = pcie->offset.mem;
sys->io_offset = pcie->offset.io;
 
-   err = devm_request_resource(pcie->dev, >all, >io);
+   err = devm_request_resource(pcie->dev, _resource, >io);
if (err < 0)
return err;
 
@@ -631,11 +630,11 @@ static int tegra_pcie_setup(int nr, struct pci_sys_data 
*sys)
if (err < 0)
return err;
 
-   err = devm_request_resource(pcie->dev, >all, >mem);
+   err = devm_request_resource(pcie->dev, _resource, >mem);
if (err < 0)
return err;
 
-   err = devm_request_resource(pcie->dev, >all, >prefetch);
+   err = devm_request_resource(pcie->dev, _resource, 
>prefetch);
if (err)
return err;
 
@@ -1822,12 +1821,6 @@ static int tegra_pcie_parse_dt(struct tegra_pcie *pcie)
struct resource res;
int err;
 
-   memset(>all, 0, sizeof(pcie->all));
-   pcie->all.flags = IORESOURCE_MEM;
-   pcie->all.name = np->full_name;
-   pcie->all.start = ~0;
-   pcie->all.end = 0;
-
if (of_pci_range_parser_init(, np)) {
dev_err(pcie->dev, "missing \"ranges\" property\n");
return -EINVAL;
@@ -1880,18 +1873,8 @@ static int tegra_pcie_parse_dt(struct tegra_pcie *pcie)
}
break;
}
-
-   if (res.start <= pcie->all.start)
-   pcie->all.start = res.start;
-
-   if (res.end >= pcie->all.end)
-   pcie->all.end = res.end;
}
 
-   err = devm_request_resource(pcie->dev, _resource, >all);
-   if (err < 0)
-   return err;
-
err = of_pci_parse_bus_range(np, >busn);
if (err < 0) {
dev_err(pcie->dev, "failed to parse ranges property: %d\n",

[PATCH v1 20/25] PCI: rcar: Request host bridge window resources with core function

[Bjorn Helgaas]

Use devm_request_pci_bus_resources() to request host bridge window
resources instead of doing it by hand in the driver.

No functional change intended.

Signed-off-by: Bjorn Helgaas 
---
 drivers/pci/host/pcie-rcar.c |   12 +---
 1 file changed, 5 insertions(+), 7 deletions(-)

diff --git a/drivers/pci/host/pcie-rcar.c b/drivers/pci/host/pcie-rcar.c
index 3509218..ce096db 100644
--- a/drivers/pci/host/pcie-rcar.c
+++ b/drivers/pci/host/pcie-rcar.c
@@ -955,12 +955,15 @@ static int rcar_pcie_parse_request_of_pci_ranges(struct 
rcar_pcie *pci)
if (err)
return err;
 
+   err = devm_request_pci_bus_resources(dev, >resources);
+   if (err)
+   goto out_release_res;
+
resource_list_for_each_entry(win, >resources) {
-   struct resource *parent, *res = win->res;
+   struct resource *res = win->res;
 
switch (resource_type(res)) {
case IORESOURCE_IO:
-   parent = _resource;
err = pci_remap_iospace(res, iobase);
if (err) {
dev_warn(dev, "error %d: failed to map resource 
%pR\n",
@@ -969,17 +972,12 @@ static int rcar_pcie_parse_request_of_pci_ranges(struct 
rcar_pcie *pci)
}
break;
case IORESOURCE_MEM:
-   parent = _resource;
break;
 
case IORESOURCE_BUS:
default:
continue;
}
-
-   err = devm_request_resource(dev, parent, res);
-   if (err)
-   goto out_release_res;
}
 
return 0;

[PATCH v1 18/25] PCI: mvebu: Request host bridge window resources with core function

[Bjorn Helgaas]

Use devm_request_pci_bus_resources() to request host bridge window
resources instead of doing it by hand in the driver.

No functional change intended.

Signed-off-by: Bjorn Helgaas 
---
 drivers/pci/host/pci-mvebu.c |   17 +++--
 1 file changed, 7 insertions(+), 10 deletions(-)

diff --git a/drivers/pci/host/pci-mvebu.c b/drivers/pci/host/pci-mvebu.c
index 6b451df..2287a4e 100644
--- a/drivers/pci/host/pci-mvebu.c
+++ b/drivers/pci/host/pci-mvebu.c
@@ -839,25 +839,22 @@ static struct pci_ops mvebu_pcie_ops = {
 static int mvebu_pcie_setup(int nr, struct pci_sys_data *sys)
 {
struct mvebu_pcie *pcie = sys_to_pcie(sys);
-   int i;
+   int err, i;
 
pcie->mem.name = "PCI MEM";
pcie->realio.name = "PCI I/O";
 
-   if (request_resource(_resource, >mem))
-   return 0;
-
-   if (resource_size(>realio) != 0) {
-   if (request_resource(_resource, >realio)) {
-   release_resource(>mem);
-   return 0;
-   }
+   if (resource_size(>realio) != 0)
pci_add_resource_offset(>resources, >realio,
sys->io_offset);
-   }
+
pci_add_resource_offset(>resources, >mem, sys->mem_offset);
pci_add_resource(>resources, >busn);
 
+   err = devm_request_pci_bus_resources(>pdev->dev, >resources);
+   if (err)
+   return 0;
+
for (i = 0; i < pcie->nports; i++) {
struct mvebu_pcie_port *port = >ports[i];
 

[PATCH v1 25/25] PCI: versatile: Simplify host bridge window iteration

[Bjorn Helgaas]

The switch is the only statement in the resource_list_for_each_entry()
loop, so remove unnecessary "continue" statements in the switch.  Simplify
checking for the required non-prefetchable memory aperture.

No functional change intended.

Signed-off-by: Bjorn Helgaas 
---
 drivers/pci/host/pci-versatile.c |   17 +
 1 file changed, 5 insertions(+), 12 deletions(-)

diff --git a/drivers/pci/host/pci-versatile.c b/drivers/pci/host/pci-versatile.c
index 273edac..f2344057 100644
--- a/drivers/pci/host/pci-versatile.c
+++ b/drivers/pci/host/pci-versatile.c
@@ -90,11 +90,9 @@ static int versatile_pci_parse_request_of_pci_ranges(struct 
device *dev,
switch (resource_type(res)) {
case IORESOURCE_IO:
err = pci_remap_iospace(res, iobase);
-   if (err) {
+   if (err)
dev_warn(dev, "error %d: failed to map resource 
%pR\n",
 err, res);
-   continue;
-   }
break;
case IORESOURCE_MEM:
res_valid |= !(res->flags & IORESOURCE_PREFETCH);
@@ -104,19 +102,14 @@ static int 
versatile_pci_parse_request_of_pci_ranges(struct device *dev,
mem++;
 
break;
-   case IORESOURCE_BUS:
-   default:
-   continue;
}
}
 
-   if (!res_valid) {
-   dev_err(dev, "non-prefetchable memory resource required\n");
-   err = -EINVAL;
-   goto out_release_res;
-   }
+   if (res_valid)
+   return 0;
 
-   return 0;
+   dev_err(dev, "non-prefetchable memory resource required\n");
+   err = -EINVAL;
 
 out_release_res:
pci_free_resource_list(res);

[PATCH v1 24/25] PCI: versatile: Request host bridge window resources with core function

[Bjorn Helgaas]

Use devm_request_pci_bus_resources() to request host bridge window
resources instead of doing it by hand in the driver.

No functional change intended.

Signed-off-by: Bjorn Helgaas 
---
 drivers/pci/host/pci-versatile.c |   12 +---
 1 file changed, 5 insertions(+), 7 deletions(-)

diff --git a/drivers/pci/host/pci-versatile.c b/drivers/pci/host/pci-versatile.c
index f843a72..273edac 100644
--- a/drivers/pci/host/pci-versatile.c
+++ b/drivers/pci/host/pci-versatile.c
@@ -80,12 +80,15 @@ static int versatile_pci_parse_request_of_pci_ranges(struct 
device *dev,
if (err)
return err;
 
+   err = devm_request_pci_bus_resources(dev, res);
+   if (err)
+   goto out_release_res;
+
resource_list_for_each_entry(win, res) {
-   struct resource *parent, *res = win->res;
+   struct resource *res = win->res;
 
switch (resource_type(res)) {
case IORESOURCE_IO:
-   parent = _resource;
err = pci_remap_iospace(res, iobase);
if (err) {
dev_warn(dev, "error %d: failed to map resource 
%pR\n",
@@ -94,7 +97,6 @@ static int versatile_pci_parse_request_of_pci_ranges(struct 
device *dev,
}
break;
case IORESOURCE_MEM:
-   parent = _resource;
res_valid |= !(res->flags & IORESOURCE_PREFETCH);
 
writel(res->start >> 28, PCI_IMAP(mem));
@@ -106,10 +108,6 @@ static int 
versatile_pci_parse_request_of_pci_ranges(struct device *dev,
default:
continue;
}
-
-   err = devm_request_resource(dev, parent, res);
-   if (err)
-   goto out_release_res;
}
 
if (!res_valid) {

[PATCH v1 08/25] PCI: xilinx: Free bridge resource list on failure

[Bjorn Helgaas]

of_pci_get_host_bridge_resources() allocates a list of resources for host
bridge windows.  If we fail after allocating that list, free it before we
return error.

Signed-off-by: Bjorn Helgaas 
---
 drivers/pci/host/pcie-xilinx.c |   11 ---
 1 file changed, 8 insertions(+), 3 deletions(-)

diff --git a/drivers/pci/host/pcie-xilinx.c b/drivers/pci/host/pcie-xilinx.c
index 65f0fe0..5c456db 100644
--- a/drivers/pci/host/pcie-xilinx.c
+++ b/drivers/pci/host/pcie-xilinx.c
@@ -660,7 +660,6 @@ static int xilinx_pcie_probe(struct platform_device *pdev)
struct xilinx_pcie_port *port;
struct device *dev = >dev;
struct pci_bus *bus;
-
int err;
resource_size_t iobase = 0;
LIST_HEAD(res);
@@ -696,8 +695,10 @@ static int xilinx_pcie_probe(struct platform_device *pdev)
}
bus = pci_create_root_bus(>dev, 0,
  _pcie_ops, port, );
-   if (!bus)
-   return -ENOMEM;
+   if (!bus) {
+   err = -ENOMEM;
+   goto error;
+   }
 
 #ifdef CONFIG_PCI_MSI
xilinx_pcie_msi_chip.dev = port->dev;
@@ -712,6 +713,10 @@ static int xilinx_pcie_probe(struct platform_device *pdev)
platform_set_drvdata(pdev, port);
 
return 0;
+
+error:
+   pci_free_resource_list();
+   return err;
 }
 
 /**

Re: [PATCH 07/13] ARM: dts: r8a7792: initial SoC device tree

[Sergei Shtylyov]

Hello.

On 06/01/2016 03:57 AM, Simon Horman wrote:


The initial R8A7792 SoC device tree including 2 CPU cores, GIC, timer, SYSC,
and the required  clock descriptions.

Signed-off-by: Sergei Shtylyov 


This is rather large for an initial DTSI. Did you give any consideration
to splitting it up: e.g. only providing what is needed to get to a serial
console?


   Was done in the v2 patchset...


With regards to SMP. Have you checked to make sure CPU hotplug works
on all CPUs?


   How to test the CPU hotplug? I've now added the SMP support and made sure 
both CPUs are online and serve IRQs...



And that the system behaves sanely on suspend/resume.


   I'd be thankful if you told me how to test that. :-)


If it is not possible to verify this at this stage then I would recommend
only enabling one CPU at this stage.


   Had a hard time debugging SMP until I realized I'd removed CPU1 from the 
device tree. :-)


MBR, Sergei

Re: [PATCH v2 10/11] ARM: dts: blanche: initial device tree

[Sergei Shtylyov]

On 06/04/2016 12:35 AM, Sergei Shtylyov wrote:


Add the initial device  tree for the R8A7792 SoC based Blanche board.
The board has 2 debug serial ports: SCIF0 and SCIF3; include support for
them,  so that  the serial console  can  work.

Signed-off-by: Sergei Shtylyov 
Acked-by: Simon Horman 
Reviewed-by: Geert Uytterhoeven 


[...]

Index: renesas/arch/arm/boot/dts/r8a7792-blanche.dts
===
--- /dev/null
+++ renesas/arch/arm/boot/dts/r8a7792-blanche.dts
@@ -0,0 +1,44 @@
+/*
+ * Device Tree Source for the Blanche board
+ *
+ * Copyright (C) 2016 Cogent Embedded, Inc.


   Looks like I need to add the Renesas Electronics copyright here. Pleae 
hold one merging this patch as well.


MBR, Sergei

Re: [PATCH 04/13] ARM: shmobile: r8a7792: basic SoC support

[Sergei Shtylyov]

Hello.

On 06/01/2016 01:18 AM, Sergei Shtylyov wrote:


Add minimal support for the R-Car V2H (R8A7792) SoC.

Signed-off-by: Sergei Shtylyov 


[...]


Index: renesas/arch/arm/mach-shmobile/setup-r8a7792.c
===
--- /dev/null
+++ renesas/arch/arm/mach-shmobile/setup-r8a7792.c
@@ -0,0 +1,34 @@
+/*
+ * r8a7792 processor support
+ *
+ * Copyright (C) 2014  Renesas Electronics Corporation


   Hm, I thought I'd stamped Cogent's copyright here... Please hold on with 
merging this patch.


[...]

MBR, Sergei

Re: [PATCH 14/14] drm/shmobile: use drm_crtc_vblank_{get,put}()

[Laurent Pinchart]

Hi Gustavo,

Thank you for the patch.

On Monday 06 Jun 2016 11:41:45 Gustavo Padovan wrote:
> From: Gustavo Padovan 
> 
> Replace the legacy drm_vblank_{get,put}() with the new helper functions.
> 
> Signed-off-by: Gustavo Padovan 

Acked-by: Laurent Pinchart 

> ---
>  drivers/gpu/drm/shmobile/shmob_drm_crtc.c | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/gpu/drm/shmobile/shmob_drm_crtc.c
> b/drivers/gpu/drm/shmobile/shmob_drm_crtc.c index 1e154fc..6547b1d 100644
> --- a/drivers/gpu/drm/shmobile/shmob_drm_crtc.c
> +++ b/drivers/gpu/drm/shmobile/shmob_drm_crtc.c
> @@ -441,7 +441,7 @@ void shmob_drm_crtc_finish_page_flip(struct
> shmob_drm_crtc *scrtc) scrtc->event = NULL;
>   if (event) {
>   drm_crtc_send_vblank_event(>crtc, event);
> - drm_vblank_put(dev, 0);
> + drm_crtc_vblank_put(>crtc);
>   }
>   spin_unlock_irqrestore(>event_lock, flags);
>  }
> @@ -467,7 +467,7 @@ static int shmob_drm_crtc_page_flip(struct drm_crtc
> *crtc,
> 
>   if (event) {
>   event->pipe = 0;
> - drm_vblank_get(dev, 0);
> + drm_crtc_vblank_get(>crtc);
>   spin_lock_irqsave(>event_lock, flags);
>   scrtc->event = event;
>   spin_unlock_irqrestore(>event_lock, flags);

-- 
Regards,

Laurent Pinchart

[PATCH 1/3] pinctrl: sh-pfc: refactor voltage setting

[Wolfram Sang]

From: Wolfram Sang 

All known hardware being able to switch voltages has the same POCCTRL
register. So, factor out the common code to the core and keep only
the pin-to-bit mapping SoC specific. Convert the only user, r8a7790.
In case POCCTRL should ever get more complex (more voltages to select?),
we should probably switch over to a describing array like drive strength
does currently.

Reviewed-by: Geert Uytterhoeven 
Signed-off-by: Wolfram Sang 
---
 drivers/pinctrl/sh-pfc/pfc-r8a7790.c | 58 
 drivers/pinctrl/sh-pfc/pinctrl.c | 41 +++--
 drivers/pinctrl/sh-pfc/sh_pfc.h  |  4 +--
 3 files changed, 40 insertions(+), 63 deletions(-)

diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7790.c 
b/drivers/pinctrl/sh-pfc/pfc-r8a7790.c
index eed8daa464cc1e..1537a077939977 100644
--- a/drivers/pinctrl/sh-pfc/pfc-r8a7790.c
+++ b/drivers/pinctrl/sh-pfc/pfc-r8a7790.c
@@ -4696,47 +4696,6 @@ static const char * const vin3_groups[] = {
"vin3_clk",
 };
 
-#define IOCTRL6 0x8c
-
-static int r8a7790_get_io_voltage(struct sh_pfc *pfc, unsigned int pin)
-{
-   u32 data, mask;
-
-   if (WARN(pin < RCAR_GP_PIN(3, 0) || pin > RCAR_GP_PIN(3, 31), "invalid 
pin %#x", pin))
-   return -EINVAL;
-
-   data = ioread32(pfc->windows->virt + IOCTRL6),
-   /* Bits in IOCTRL6 are numbered in opposite order to pins */
-   mask = 0x8000 >> (pin & 0x1f);
-
-   return (data & mask) ? 3300 : 1800;
-}
-
-static int r8a7790_set_io_voltage(struct sh_pfc *pfc, unsigned int pin, u16 mV)
-{
-   u32 data, mask;
-
-   if (WARN(pin < RCAR_GP_PIN(3, 0) || pin > RCAR_GP_PIN(3, 31), "invalid 
pin %#x", pin))
-   return -EINVAL;
-
-   if (mV != 1800 && mV != 3300)
-   return -EINVAL;
-
-   data = ioread32(pfc->windows->virt + IOCTRL6);
-   /* Bits in IOCTRL6 are numbered in opposite order to pins */
-   mask = 0x8000 >> (pin & 0x1f);
-
-   if (mV == 3300)
-   data |= mask;
-   else
-   data &= ~mask;
-
-   iowrite32(~data, pfc->windows->virt); /* unlock reg */
-   iowrite32(data, pfc->windows->virt + IOCTRL6);
-
-   return 0;
-}
-
 static const struct sh_pfc_function pinmux_functions[] = {
SH_PFC_FUNCTION(audio_clk),
SH_PFC_FUNCTION(avb),
@@ -5736,14 +5695,23 @@ static const struct pinmux_cfg_reg pinmux_config_regs[] 
= {
{ },
 };
 
-static const struct sh_pfc_soc_operations pinmux_ops = {
-   .get_io_voltage = r8a7790_get_io_voltage,
-   .set_io_voltage = r8a7790_set_io_voltage,
+static int r8a7790_pin_to_pocctrl(struct sh_pfc *pfc, unsigned int pin, u32 
*pocctrl)
+{
+   if (pin < RCAR_GP_PIN(3, 0) || pin > RCAR_GP_PIN(3, 31))
+   return -EINVAL;
+
+   *pocctrl = 0xe606008c;
+
+   return 31 - (pin & 0x1f);
+}
+
+static const struct sh_pfc_soc_operations r8a7790_pinmux_ops = {
+   .pin_to_pocctrl = r8a7790_pin_to_pocctrl,
 };
 
 const struct sh_pfc_soc_info r8a7790_pinmux_info = {
.name = "r8a77900_pfc",
-   .ops = _ops,
+   .ops = _pinmux_ops,
.unlock_reg = 0xe606, /* PMMR */
 
.function = { PINMUX_FUNCTION_BEGIN, PINMUX_FUNCTION_END },
diff --git a/drivers/pinctrl/sh-pfc/pinctrl.c b/drivers/pinctrl/sh-pfc/pinctrl.c
index fdb445d68b9a08..d4e65bc7dacd67 100644
--- a/drivers/pinctrl/sh-pfc/pinctrl.c
+++ b/drivers/pinctrl/sh-pfc/pinctrl.c
@@ -632,19 +632,21 @@ static int sh_pfc_pinconf_get(struct pinctrl_dev 
*pctldev, unsigned _pin,
}
 
case PIN_CONFIG_POWER_SOURCE: {
-   int ret;
+   u32 pocctrl, val;
+   int bit;
 
-   if (!pfc->info->ops || !pfc->info->ops->get_io_voltage)
+   if (!pfc->info->ops || !pfc->info->ops->pin_to_pocctrl)
return -ENOTSUPP;
 
+   bit = pfc->info->ops->pin_to_pocctrl(pfc, _pin, );
+   if (WARN(bit < 0, "invalid pin %#x", _pin))
+   return bit;
+
spin_lock_irqsave(>lock, flags);
-   ret = pfc->info->ops->get_io_voltage(pfc, _pin);
+   val = sh_pfc_read_reg(pfc, pocctrl, 32);
spin_unlock_irqrestore(>lock, flags);
 
-   if (ret < 0)
-   return ret;
-
-   *config = ret;
+   *config = (val & BIT(bit)) ? 3300 : 1800;
break;
}
 
@@ -696,20 +698,29 @@ static int sh_pfc_pinconf_set(struct pinctrl_dev 
*pctldev, unsigned _pin,
}
 
case PIN_CONFIG_POWER_SOURCE: {
-   unsigned int arg =
-   pinconf_to_config_argument(configs[i]);
-   int ret;
+   unsigned int mV = 
pinconf_to_config_argument(configs[i]);
+   u32 pocctrl, val;
+

[PATCH 0/3] pinctrl: sh-pfc: add r8a7795 support for voltage switching

[Wolfram Sang]

This series adds support for PFC voltage switching for r8a7795. I decided to
refactor voltage switching because all Gen2 and Gen3 hardware follow the same
style to do that. So, we can put generic handling to the core and keep only
pin-to-bit mapping SoC specific. See patch 1 for details.

Tested on a Lager board (r8a7790/H2) and a Salvator-X (r8a7795/H3) by using
UHS/non-UHS SD cards. They work fine with SDR50 and the POCCTRL register
setting was also verified.

Branch is here:

git://git.kernel.org/pub/scm/linux/kernel/git/wsa/linux.git 
renesas/topic/h3-pfc-set-voltage

Changes since RFC:
* be precise in encoding which pins can do voltage switching on bank3
* addded Geert's reviewed tag (thanks!)

Please apply,

   Wolfram

Wolfram Sang (3):
  pinctrl: sh-pfc: refactor voltage setting
  pinctrl: sh-pfc: r8a7795: add support for voltage switching
  arm64: dts: r8a7795: salvator: enable UHS for SDHI 0 & 3

 arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts | 22 +++-
 drivers/pinctrl/sh-pfc/pfc-r8a7790.c   | 58 +-
 drivers/pinctrl/sh-pfc/pfc-r8a7795.c   | 28 ++-
 drivers/pinctrl/sh-pfc/pinctrl.c   | 41 +--
 drivers/pinctrl/sh-pfc/sh_pfc.h|  4 +-
 5 files changed, 86 insertions(+), 67 deletions(-)

-- 
2.8.1

[PATCH 14/14] drm/shmobile: use drm_crtc_vblank_{get,put}()

[Gustavo Padovan]

From: Gustavo Padovan 

Replace the legacy drm_vblank_{get,put}() with the new helper functions.

Signed-off-by: Gustavo Padovan 
---
 drivers/gpu/drm/shmobile/shmob_drm_crtc.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/shmobile/shmob_drm_crtc.c 
b/drivers/gpu/drm/shmobile/shmob_drm_crtc.c
index 1e154fc..6547b1d 100644
--- a/drivers/gpu/drm/shmobile/shmob_drm_crtc.c
+++ b/drivers/gpu/drm/shmobile/shmob_drm_crtc.c
@@ -441,7 +441,7 @@ void shmob_drm_crtc_finish_page_flip(struct shmob_drm_crtc 
*scrtc)
scrtc->event = NULL;
if (event) {
drm_crtc_send_vblank_event(>crtc, event);
-   drm_vblank_put(dev, 0);
+   drm_crtc_vblank_put(>crtc);
}
spin_unlock_irqrestore(>event_lock, flags);
 }
@@ -467,7 +467,7 @@ static int shmob_drm_crtc_page_flip(struct drm_crtc *crtc,
 
if (event) {
event->pipe = 0;
-   drm_vblank_get(dev, 0);
+   drm_crtc_vblank_get(>crtc);
spin_lock_irqsave(>event_lock, flags);
scrtc->event = event;
spin_unlock_irqrestore(>event_lock, flags);
-- 
2.5.5

Re: [PATCH v2 2/4] clk: renesas: Add r8a7796 CPG Core Clock Definitions

[Geert Uytterhoeven]

Hi Dirk,

On Mon, Jun 6, 2016 at 2:03 PM, Dirk Behme  wrote:
> On 30.05.2016 18:36, Dirk Behme wrote:
>> On 30.05.2016 18:28, Geert Uytterhoeven wrote:
>>> Add all R-Car M3-W Clock Pulse Generator Core Clock Outputs, as listed
>>> in Table 8.2b ("List of Clocks [R-Car M3-W]") of the R-Car Gen3
>>> datasheet (rev. 0.51 + Errata for Rev051 Mar 31 2016).
>>>
>>> Note that internal CPG clocks (S0, S1, S2, S3, SDSRC, and SSPSRC) are
>>> not included, as they are used as internal clock sources only, and never
>>> referenced from DT.
>>>
>>> Signed-off-by: Geert Uytterhoeven 
>>> Tested-by: Simon Horman 
>>> ---
>>> v2:
>>>- Add Tested-by.
>>> ---
>>>   include/dt-bindings/clock/r8a7796-cpg-mssr.h | 69
>>> 
>>>   1 file changed, 69 insertions(+)
>>>   create mode 100644 include/dt-bindings/clock/r8a7796-cpg-mssr.h
>>>
>>> diff --git a/include/dt-bindings/clock/r8a7796-cpg-mssr.h
>>> b/include/dt-bindings/clock/r8a7796-cpg-mssr.h
>>> new file mode 100644
>>> index ..1e5942695f0dd057
>>> --- /dev/null
>>> +++ b/include/dt-bindings/clock/r8a7796-cpg-mssr.h
>>> @@ -0,0 +1,69 @@
>>> +/*
>>> + * Copyright (C) 2016 Renesas Electronics Corp.
>>> + *
>>> + * This program is free software; you can redistribute it and/or modify
>>> + * it under the terms of the GNU General Public License as published by
>>> + * the Free Software Foundation; either version 2 of the License, or
>>> + * (at your option) any later version.
>>> + */
>>> +#ifndef __DT_BINDINGS_CLOCK_R8A7796_CPG_MSSR_H__
>>> +#define __DT_BINDINGS_CLOCK_R8A7796_CPG_MSSR_H__
>>> +
>>> +#include 
>>> +
>>> +/* r8a7796 CPG Core Clocks */
>>> +#define R8A7796_CLK_Z0

[...]

>> I think we recently started a discussion to find a more clever way to
>> avoid re-defining (copy & paste) all this R-Car3 clocks  (compare [1])
>> where they are the same over the R-Car3 family while still being able to
>> deal with the differences.
>>
>> Best regards
>>
>> Dirk
>>
>> [1]
>>
>> https://git.kernel.org/cgit/linux/kernel/git/torvalds/linux.git/tree/include/dt-bindings/clock/r8a7795-cpg-mssr.h
>
> What's the status of the discussion I mentioned above?

As mentioned in that thread,the CPGs in r8a7795 and r8a7796 provide
slightly different sets of clocks. Future members of the R-Car Gen3
family may provide the same or different sets of clocks, we don't know.

As Magnus already mentions, we try to stay as close as possible to the
datasheet (which is unfortunately a moving target, too).

For CPG Core Clocks, the datasheet only provides us with a list of named
clocks.  There are no fixed numbers. So either we refer to clocks by
name, or by coming up with our own numbering scheme (which has to be a
stable set of numbers, i.e. append only).

For MSSR (Module) Clocks, the datasheet does provide us with numbers
(MSTP register index + bit index inside the register).

The way the CPG/MSSR drivers handles these clocks was heavily influenced
by the experience we gained with the Common Clock Framework and DT on
R-Car Gen2.

R-Car Gen2 described all clocks and their registers in DT. The goal
(utopia?) here was to handle all SoCs from the family with a single
driver, provided it was fed with the right description in DT.

For CPG Core Clocks, this lead to a mix of:
  - Nodes for fixed factor clocks,
  - Nodes for variable factor clocks, specifying a register to operate
on,
  - Special CPG clocks that couldn't be handled by the above, using a
common (family-specific) list of definitions for clocks, that had to
be extended constantly.

For MSSR Clocks (called "MSTP" for historical reasons), each set of 32
clocks had its own node, with multiple registers, and three separate
arrays for parent clocks, clock indices, and clock names, that had to be
kept in sync. The clock indices were defines, using numbers from the
datasheet, but they were still easy to abuse (which register does the
define apply to?).

As the CCF was quite new and best practices were still under
development, all of this was difficult to define up-front.
Due to the complexity, it was also hard to review and maintain, leading
to many errors.
The arbitrary (grown organically) offsets for the various MSSR-related
registers also made it hard to ever add module reset support.

Hence the call for a new framework, designed in close collaboration with the
clock maintainer, and implemented in the CPG/MSSR driver.
The goals were:
  - Make the DT part user friendly, reviewer friendly, and maintainer
friendly, as it provides a stable ABI, and thus must be obviously
correct from the beginning,
  - Hide complexity and internals in the driver, as this can be reworked
and extended at any time, without breaking the DT ABI,
  - Hence, describe CPG/MSSR as a single simple block in DT,
  - Support both new and existing SoCs (PoC was done for r8a7791),
  - Allow for adding module reset support (the 

Re: [RFC 2/3] pinctrl: sh-pfc: r8a7795: add support for voltage switching

[Geert Uytterhoeven]

Hi Wolfram,

On Mon, Jun 6, 2016 at 1:03 PM, Wolfram Sang  wrote:
> On Mon, Jun 06, 2016 at 09:23:35AM +0200, Geert Uytterhoeven wrote:
>> On Mon, Jun 6, 2016 at 8:50 AM, Wolfram Sang  wrote:
>> > From: Wolfram Sang 
>> >
>> > Signed-off-by: Wolfram Sang 
>> > ---
>> >  drivers/pinctrl/sh-pfc/pfc-r8a7795.c | 24 ++--
>> >  1 file changed, 22 insertions(+), 2 deletions(-)
>> >
>> > diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7795.c 
>> > b/drivers/pinctrl/sh-pfc/pfc-r8a7795.c
>> > index 44632b1a5c978c..8e068d8534de00 100644
>> > --- a/drivers/pinctrl/sh-pfc/pfc-r8a7795.c
>> > +++ b/drivers/pinctrl/sh-pfc/pfc-r8a7795.c
>> > @@ -17,8 +17,8 @@
>> > PORT_GP_CFG_16(0, fn, sfx, SH_PFC_PIN_CFG_DRIVE_STRENGTH),  \
>> > PORT_GP_CFG_28(1, fn, sfx, SH_PFC_PIN_CFG_DRIVE_STRENGTH),  \
>> > PORT_GP_CFG_15(2, fn, sfx, SH_PFC_PIN_CFG_DRIVE_STRENGTH),  \
>> > -   PORT_GP_CFG_16(3, fn, sfx, SH_PFC_PIN_CFG_DRIVE_STRENGTH),  \
>> > -   PORT_GP_CFG_18(4, fn, sfx, SH_PFC_PIN_CFG_DRIVE_STRENGTH),  \
>> > +   PORT_GP_CFG_16(3, fn, sfx, SH_PFC_PIN_CFG_DRIVE_STRENGTH | 
>> > SH_PFC_PIN_CFG_IO_VOLTAGE),  \
>>
>> Shouldn't this be split in PORT_GP_CFG_12() with SH_PFC_PIN_CFG_IO_VOLTAGE,
>> and PORT_GP_CFG_4() without?
>
> Right. However, PORT_GP_CFG_4 doesn't allow to set an offset for the pin
> numbers. Options I see:

> a) keep it as is and rely on the checks in pin_to_pocctrl()
> b) use PORT_GP_CFG_12 and 4 times PORT_GP_CFG_1 which allow setting the
>pin number
> c) introduce (yet another) macro like PORT_GP_CFG_4_OFS
>
> So far, I thought a) was good enough. Now I tend to option b) because it
> is indeed more precise. We still can do c) if demand for such a macro
> increases.
>
> What do you think?

Option b is fine for me.

Thanks!

Gr{oetje,eeting}s,

Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- ge...@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds

Re: [RFC 2/3] pinctrl: sh-pfc: r8a7795: add support for voltage switching

[Wolfram Sang]

On Mon, Jun 06, 2016 at 09:23:35AM +0200, Geert Uytterhoeven wrote:
> Hi Wolfram,
> 
> On Mon, Jun 6, 2016 at 8:50 AM, Wolfram Sang  wrote:
> > From: Wolfram Sang 
> >
> > Signed-off-by: Wolfram Sang 
> > ---
> >  drivers/pinctrl/sh-pfc/pfc-r8a7795.c | 24 ++--
> >  1 file changed, 22 insertions(+), 2 deletions(-)
> >
> > diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7795.c 
> > b/drivers/pinctrl/sh-pfc/pfc-r8a7795.c
> > index 44632b1a5c978c..8e068d8534de00 100644
> > --- a/drivers/pinctrl/sh-pfc/pfc-r8a7795.c
> > +++ b/drivers/pinctrl/sh-pfc/pfc-r8a7795.c
> > @@ -17,8 +17,8 @@
> > PORT_GP_CFG_16(0, fn, sfx, SH_PFC_PIN_CFG_DRIVE_STRENGTH),  \
> > PORT_GP_CFG_28(1, fn, sfx, SH_PFC_PIN_CFG_DRIVE_STRENGTH),  \
> > PORT_GP_CFG_15(2, fn, sfx, SH_PFC_PIN_CFG_DRIVE_STRENGTH),  \
> > -   PORT_GP_CFG_16(3, fn, sfx, SH_PFC_PIN_CFG_DRIVE_STRENGTH),  \
> > -   PORT_GP_CFG_18(4, fn, sfx, SH_PFC_PIN_CFG_DRIVE_STRENGTH),  \
> > +   PORT_GP_CFG_16(3, fn, sfx, SH_PFC_PIN_CFG_DRIVE_STRENGTH | 
> > SH_PFC_PIN_CFG_IO_VOLTAGE),  \
> 
> Shouldn't this be split in PORT_GP_CFG_12() with SH_PFC_PIN_CFG_IO_VOLTAGE,
> and PORT_GP_CFG_4() without?

Right. However, PORT_GP_CFG_4 doesn't allow to set an offset for the pin
numbers. Options I see:

a) keep it as is and rely on the checks in pin_to_pocctrl()
b) use PORT_GP_CFG_12 and 4 times PORT_GP_CFG_1 which allow setting the
   pin number
c) introduce (yet another) macro like PORT_GP_CFG_4_OFS

So far, I thought a) was good enough. Now I tend to option b) because it
is indeed more precise. We still can do c) if demand for such a macro
increases.

What do you think?

Thanks,

   Wolfram

Re: [PATCH/RFC 0/1] soc: renesas: Add DT fixup code for backwards compatibility

[Geert Uytterhoeven]

On Thu, Jun 2, 2016 at 11:24 PM, Laurent Pinchart
 wrote:
> On Wednesday 01 Jun 2016 15:27:59 Rob Herring wrote:
>> On Wed, Jun 1, 2016 at 2:50 PM, Geert Uytterhoeven wrote:
>> > When moving functionality from C code to DT, we're regularly faced with
>> > stable DT issues: old DTBs should keep on working. This requires keeping
>> > workaround code in the kernel.
>> >
>> > An alternative solution to having workaround C code, would be to
>> > dynamically modify the DT, to add missing device nodes and phandle links.
>> >
>> > This has several advantages:
>> >   - All workarounds are kept together,
>> >   - Workarounds can be enabled/disabled using a single Kconfig option,
>> >   - Individual driver code is not polluted by workaround code.
>> >
>> > Examples of missing support in DT are:
>> >   - A device node for the R-Car RST (Reset Controller), which a.o.
>> > provides access to the Mode Pins (currently handled using an
>> > hardcoded address in platform/driver code), cfr. the series
>> > "[PATCH/RFC v3 00/22] soc: renesas: Add R-Car RST driver for
>> > obtaining mode pin state" I've just sent
>> > (http://www.spinics.net/lists/linux-renesas-soc/msg04289.html),
>> >
>> >   - A device node for the R-Car SYSC (System Controller), to link CPUs
>> > to their respective power domains (On R-Car Gen2 CPUs can be
>> > auto-detected, as there's a register indicating which CPU cores are
>> > present),
>> >
>> >   - Add a device node for the R-Car Gen2 APMU (Advanced Power
>> >
>> > Management Unit), for modern CPU bringup using "enable-method".
>> > Note that the method from this RFC doesn't work for
>> > "enable-method", as that is parsed in arm_dt_init_cpu_maps(),
>> > immediately after unflatten_device_tree(), long before initcalls
>> > run.
>> >
>> > However, there are other possible uses:
>> >   - Workarounds for hardware bugs: early engineering samples of an SoC
>> >
>> > may have non-functional devices. This would allow to describe the
>> > latest (functional) hardware in the .dtsi, knowing that the fixup
>> > code will disable non-functional devices when running on an early
>> > engineering sample, based on reading the PRR (Product Revision
>> > Register).
>> >
>> >   - Handle other differences between SoC versions, e.g. change
>> >
>> > compatible values for an early engineering sample that needs special
>> > handling, or limit the features of a device.
>> >
>> >   - Add SoC-specific compatible values to all device nodes (e.g. add
>> >
>> > "renesas,r8a7795-wdt" to a node already having
>> > "renesas,rcar-gen3-wdt" when running on r8a7795). This would make
>> > it easier to share .dtsi files within the same SoC family, without
>> > relying on e.g. C preprocessor tricks.
>> >
>> > This proof-of-concept implements this for the missing R-Car RST (Reset
>> > Controller) node. This poc is not suitable for all of the above, as some
>> > DT structures (e.g. the CPU's "enable-method) are parsed long before
>> > early_initcall(), and would need a different workaround.
>> >
>> > What do you think?
>>
>> I have no objection to this method of dealing with compatibility.
>> However your handling is still C code. What I would like to see here
>> is using overlays to apply updates. I would like to be able to take 2
>> dts files and create an overlay dts based on their diff (or you could
>> do this step manually). Then build the overlay dtb into the kernel and
>> apply it on boot based on some match. Then thru the magic of linker
>> sections, it becomes a matter of just adding the dtbo into the build
>> and a one line declaration:
>>
>> DT_QUIRK(my_quirk_dtbo, "vendor,board");
>>
>> BTW, I'd also like to see tools to apply overlays offline into a new
>> dtb or compile dts files and overlays to a dtb.
>
> We need to keep the use case in mind. The main (and possibly only) reason why
> we want to patch DT this way is to support systems whose DTB can't be updated
> (otherwise we could just update the DTB) and isn't fully known in advance to
> the kernel (otherwise we would just bundle an updated full DTB with the
> kernel). We thus need a heuristic-based approach at runtime to identify
> missing or outdated DT pieces and patch them, with some level of fuzziness.
> I'm not sure we could handle this with overlays.

Indeed. While I'm a big fan of DT overlays, I don't think they're suitable for
all kinds of fixups we need.
Simple things like adding a device node for the RST could be handled with a
built-in overlay.
More complex things, like adding SYSC and APMU devices nodes need some
extra bit of logic, to e.g. add phandles to/from the (existing) CPU nodes.
The same is true for fixups that need to check on which revision of the SoC
they're running.

>> > Should this be handled at another level? E.g. operate on the FDT?
>>
>> We should try to avoid doing things with the FDT if possible.

OK. So I 

Re: [RFC 3/3] arm64: dts: r8a7795: salvator: enable UHS for SDHI 0 & 3

[Geert Uytterhoeven]

On Mon, Jun 6, 2016 at 8:50 AM, Wolfram Sang  wrote:
> From: Wolfram Sang 
>
> Signed-off-by: Wolfram Sang 

Reviewed-by: Geert Uytterhoeven 

Gr{oetje,eeting}s,

Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- ge...@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds

Re: [RFC 2/3] pinctrl: sh-pfc: r8a7795: add support for voltage switching

[Geert Uytterhoeven]

Hi Wolfram,

On Mon, Jun 6, 2016 at 8:50 AM, Wolfram Sang  wrote:
> From: Wolfram Sang 
>
> Signed-off-by: Wolfram Sang 
> ---
>  drivers/pinctrl/sh-pfc/pfc-r8a7795.c | 24 ++--
>  1 file changed, 22 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7795.c 
> b/drivers/pinctrl/sh-pfc/pfc-r8a7795.c
> index 44632b1a5c978c..8e068d8534de00 100644
> --- a/drivers/pinctrl/sh-pfc/pfc-r8a7795.c
> +++ b/drivers/pinctrl/sh-pfc/pfc-r8a7795.c
> @@ -17,8 +17,8 @@
> PORT_GP_CFG_16(0, fn, sfx, SH_PFC_PIN_CFG_DRIVE_STRENGTH),  \
> PORT_GP_CFG_28(1, fn, sfx, SH_PFC_PIN_CFG_DRIVE_STRENGTH),  \
> PORT_GP_CFG_15(2, fn, sfx, SH_PFC_PIN_CFG_DRIVE_STRENGTH),  \
> -   PORT_GP_CFG_16(3, fn, sfx, SH_PFC_PIN_CFG_DRIVE_STRENGTH),  \
> -   PORT_GP_CFG_18(4, fn, sfx, SH_PFC_PIN_CFG_DRIVE_STRENGTH),  \
> +   PORT_GP_CFG_16(3, fn, sfx, SH_PFC_PIN_CFG_DRIVE_STRENGTH | 
> SH_PFC_PIN_CFG_IO_VOLTAGE),  \

Shouldn't this be split in PORT_GP_CFG_12() with SH_PFC_PIN_CFG_IO_VOLTAGE,
and PORT_GP_CFG_4() without?

> +   PORT_GP_CFG_18(4, fn, sfx, SH_PFC_PIN_CFG_DRIVE_STRENGTH | 
> SH_PFC_PIN_CFG_IO_VOLTAGE),  \

Apart from that:
Reviewed-by: Geert Uytterhoeven 

Gr{oetje,eeting}s,

Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- ge...@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds

Re: [RFC 1/3] pinctrl: sh-pfc: refactor voltage setting

[Geert Uytterhoeven]

On Mon, Jun 6, 2016 at 8:50 AM, Wolfram Sang  wrote:
> From: Wolfram Sang 
>
> All known hardware being able to switch voltages has the same POCCTRL
> register. So, factor out the common code to the core and keep only
> the pin-to-bit mapping SoC specific. Convert the only user, r8a7790.
> In case POCCTRL should ever get more complex (more voltages to select?),
> we should probably switch over to a describing array like drive strength
> does currently.
>
> Signed-off-by: Wolfram Sang 

Reviewed-by: Geert Uytterhoeven 

Gr{oetje,eeting}s,

Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- ge...@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds

Re: [PATCH v2 00/11] iommu/ipmmu-vmsa: r8a7795 support V2

[Geert Uytterhoeven]

Hi Magnus,

On Mon, Jun 6, 2016 at 5:57 AM, Magnus Damm  wrote:
> iommu/ipmmu-vmsa: r8a7795 support V2
>
> [PATCH v2 01/11] iommu/ipmmu-vmsa: Introduce features, break out alias
> [PATCH v2 02/11] iommu/ipmmu-vmsa: Add optional root device feature
> [PATCH v2 03/11] iommu/ipmmu-vmsa: Enable multi context support
> [PATCH v2 04/11] iommu/ipmmu-vmsa: Reuse iommu groups
> [PATCH v2 05/11] iommu/ipmmu-vmsa: Make use of IOMMU_OF_DECLARE()
> [PATCH v2 06/11] iommu/ipmmu-vmsa: Teach xlate() to skip disabled iommus
> [PATCH v2 07/11] iommu/ipmmu-vmsa: IPMMU device is 64-bit bus master
> [PATCH v2 08/11] iommu/ipmmu-vmsa: Write IMCTR twice
> [PATCH v2 09/11] iommu/ipmmu-vmsa: Make IMBUSCTR setup optional
> [PATCH v2 10/11] iommu/ipmmu-vmsa: Allow two bit SL0
> [PATCH v2 11/11] iommu/ipmmu-vmsa: Hook up r8a7795 DT matching code

Thanks for your series!

For your convenience, I've queued it up in topic/r8a7795-ipmmu-v2 at
https://git.kernel.org/cgit/linux/kernel/git/geert/renesas-drivers.git, and
will include it in next renesas-drivers release.

Gr{oetje,eeting}s,

Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- ge...@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds

[RFC 2/3] pinctrl: sh-pfc: r8a7795: add support for voltage switching

[Wolfram Sang]

From: Wolfram Sang 

Signed-off-by: Wolfram Sang 
---
 drivers/pinctrl/sh-pfc/pfc-r8a7795.c | 24 ++--
 1 file changed, 22 insertions(+), 2 deletions(-)

diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7795.c 
b/drivers/pinctrl/sh-pfc/pfc-r8a7795.c
index 44632b1a5c978c..8e068d8534de00 100644
--- a/drivers/pinctrl/sh-pfc/pfc-r8a7795.c
+++ b/drivers/pinctrl/sh-pfc/pfc-r8a7795.c
@@ -17,8 +17,8 @@
PORT_GP_CFG_16(0, fn, sfx, SH_PFC_PIN_CFG_DRIVE_STRENGTH),  \
PORT_GP_CFG_28(1, fn, sfx, SH_PFC_PIN_CFG_DRIVE_STRENGTH),  \
PORT_GP_CFG_15(2, fn, sfx, SH_PFC_PIN_CFG_DRIVE_STRENGTH),  \
-   PORT_GP_CFG_16(3, fn, sfx, SH_PFC_PIN_CFG_DRIVE_STRENGTH),  \
-   PORT_GP_CFG_18(4, fn, sfx, SH_PFC_PIN_CFG_DRIVE_STRENGTH),  \
+   PORT_GP_CFG_16(3, fn, sfx, SH_PFC_PIN_CFG_DRIVE_STRENGTH | 
SH_PFC_PIN_CFG_IO_VOLTAGE),  \
+   PORT_GP_CFG_18(4, fn, sfx, SH_PFC_PIN_CFG_DRIVE_STRENGTH | 
SH_PFC_PIN_CFG_IO_VOLTAGE),  \
PORT_GP_CFG_26(5, fn, sfx, SH_PFC_PIN_CFG_DRIVE_STRENGTH),  \
PORT_GP_CFG_32(6, fn, sfx, SH_PFC_PIN_CFG_DRIVE_STRENGTH),  \
PORT_GP_CFG_4(7, fn, sfx, SH_PFC_PIN_CFG_DRIVE_STRENGTH)
@@ -4765,8 +4765,28 @@ static const struct pinmux_drive_reg pinmux_drive_regs[] 
= {
{ },
 };
 
+static int r8a7795_pin_to_pocctrl(struct sh_pfc *pfc, unsigned int pin, u32 
*pocctrl)
+{
+   int bit = -EINVAL;
+
+   *pocctrl = 0xe6060380;
+
+   if (pin >= RCAR_GP_PIN(3, 0) && pin <= RCAR_GP_PIN(3, 11))
+   bit = pin & 0x1f;
+
+   if (pin >= RCAR_GP_PIN(4, 0) && pin <= RCAR_GP_PIN(4, 17))
+   bit = (pin & 0x1f) + 12;
+
+   return bit;
+}
+
+static const struct sh_pfc_soc_operations r8a7795_pinmux_ops = {
+   .pin_to_pocctrl = r8a7795_pin_to_pocctrl,
+};
+
 const struct sh_pfc_soc_info r8a7795_pinmux_info = {
.name = "r8a77950_pfc",
+   .ops = _pinmux_ops,
.unlock_reg = 0xe606, /* PMMR */
 
.function = { PINMUX_FUNCTION_BEGIN, PINMUX_FUNCTION_END },
-- 
2.8.1

[RFC 1/3] pinctrl: sh-pfc: refactor voltage setting

[Wolfram Sang]

From: Wolfram Sang 

All known hardware being able to switch voltages has the same POCCTRL
register. So, factor out the common code to the core and keep only
the pin-to-bit mapping SoC specific. Convert the only user, r8a7790.
In case POCCTRL should ever get more complex (more voltages to select?),
we should probably switch over to a describing array like drive strength
does currently.

Signed-off-by: Wolfram Sang 
---
 drivers/pinctrl/sh-pfc/pfc-r8a7790.c | 58 
 drivers/pinctrl/sh-pfc/pinctrl.c | 41 +++--
 drivers/pinctrl/sh-pfc/sh_pfc.h  |  4 +--
 3 files changed, 40 insertions(+), 63 deletions(-)

diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7790.c 
b/drivers/pinctrl/sh-pfc/pfc-r8a7790.c
index eed8daa464cc1e..1537a077939977 100644
--- a/drivers/pinctrl/sh-pfc/pfc-r8a7790.c
+++ b/drivers/pinctrl/sh-pfc/pfc-r8a7790.c
@@ -4696,47 +4696,6 @@ static const char * const vin3_groups[] = {
"vin3_clk",
 };
 
-#define IOCTRL6 0x8c
-
-static int r8a7790_get_io_voltage(struct sh_pfc *pfc, unsigned int pin)
-{
-   u32 data, mask;
-
-   if (WARN(pin < RCAR_GP_PIN(3, 0) || pin > RCAR_GP_PIN(3, 31), "invalid 
pin %#x", pin))
-   return -EINVAL;
-
-   data = ioread32(pfc->windows->virt + IOCTRL6),
-   /* Bits in IOCTRL6 are numbered in opposite order to pins */
-   mask = 0x8000 >> (pin & 0x1f);
-
-   return (data & mask) ? 3300 : 1800;
-}
-
-static int r8a7790_set_io_voltage(struct sh_pfc *pfc, unsigned int pin, u16 mV)
-{
-   u32 data, mask;
-
-   if (WARN(pin < RCAR_GP_PIN(3, 0) || pin > RCAR_GP_PIN(3, 31), "invalid 
pin %#x", pin))
-   return -EINVAL;
-
-   if (mV != 1800 && mV != 3300)
-   return -EINVAL;
-
-   data = ioread32(pfc->windows->virt + IOCTRL6);
-   /* Bits in IOCTRL6 are numbered in opposite order to pins */
-   mask = 0x8000 >> (pin & 0x1f);
-
-   if (mV == 3300)
-   data |= mask;
-   else
-   data &= ~mask;
-
-   iowrite32(~data, pfc->windows->virt); /* unlock reg */
-   iowrite32(data, pfc->windows->virt + IOCTRL6);
-
-   return 0;
-}
-
 static const struct sh_pfc_function pinmux_functions[] = {
SH_PFC_FUNCTION(audio_clk),
SH_PFC_FUNCTION(avb),
@@ -5736,14 +5695,23 @@ static const struct pinmux_cfg_reg pinmux_config_regs[] 
= {
{ },
 };
 
-static const struct sh_pfc_soc_operations pinmux_ops = {
-   .get_io_voltage = r8a7790_get_io_voltage,
-   .set_io_voltage = r8a7790_set_io_voltage,
+static int r8a7790_pin_to_pocctrl(struct sh_pfc *pfc, unsigned int pin, u32 
*pocctrl)
+{
+   if (pin < RCAR_GP_PIN(3, 0) || pin > RCAR_GP_PIN(3, 31))
+   return -EINVAL;
+
+   *pocctrl = 0xe606008c;
+
+   return 31 - (pin & 0x1f);
+}
+
+static const struct sh_pfc_soc_operations r8a7790_pinmux_ops = {
+   .pin_to_pocctrl = r8a7790_pin_to_pocctrl,
 };
 
 const struct sh_pfc_soc_info r8a7790_pinmux_info = {
.name = "r8a77900_pfc",
-   .ops = _ops,
+   .ops = _pinmux_ops,
.unlock_reg = 0xe606, /* PMMR */
 
.function = { PINMUX_FUNCTION_BEGIN, PINMUX_FUNCTION_END },
diff --git a/drivers/pinctrl/sh-pfc/pinctrl.c b/drivers/pinctrl/sh-pfc/pinctrl.c
index fdb445d68b9a08..d4e65bc7dacd67 100644
--- a/drivers/pinctrl/sh-pfc/pinctrl.c
+++ b/drivers/pinctrl/sh-pfc/pinctrl.c
@@ -632,19 +632,21 @@ static int sh_pfc_pinconf_get(struct pinctrl_dev 
*pctldev, unsigned _pin,
}
 
case PIN_CONFIG_POWER_SOURCE: {
-   int ret;
+   u32 pocctrl, val;
+   int bit;
 
-   if (!pfc->info->ops || !pfc->info->ops->get_io_voltage)
+   if (!pfc->info->ops || !pfc->info->ops->pin_to_pocctrl)
return -ENOTSUPP;
 
+   bit = pfc->info->ops->pin_to_pocctrl(pfc, _pin, );
+   if (WARN(bit < 0, "invalid pin %#x", _pin))
+   return bit;
+
spin_lock_irqsave(>lock, flags);
-   ret = pfc->info->ops->get_io_voltage(pfc, _pin);
+   val = sh_pfc_read_reg(pfc, pocctrl, 32);
spin_unlock_irqrestore(>lock, flags);
 
-   if (ret < 0)
-   return ret;
-
-   *config = ret;
+   *config = (val & BIT(bit)) ? 3300 : 1800;
break;
}
 
@@ -696,20 +698,29 @@ static int sh_pfc_pinconf_set(struct pinctrl_dev 
*pctldev, unsigned _pin,
}
 
case PIN_CONFIG_POWER_SOURCE: {
-   unsigned int arg =
-   pinconf_to_config_argument(configs[i]);
-   int ret;
+   unsigned int mV = 
pinconf_to_config_argument(configs[i]);
+   u32 pocctrl, val;
+   int bit;
 
-   if (!pfc->info->ops