Re: [PATCH 4/4] PM / Runtime: Defer resuming of the device in pm_runtime_force_resume()

2016-06-28 Thread Rafael J. Wysocki 
On Tuesday, June 28, 2016 06:26:36 PM Geert Uytterhoeven wrote:
> Hi Ulf, Rafael,
> 
> On Tue, May 17, 2016 at 1:41 PM, Ulf Hansson  wrote:
> > When the pm_runtime_force_suspend|resume() helpers were invented, we still
> > had CONFIG_PM_RUNTIME and CONFIG_PM_SLEEP as separate Kconfig options.
> >
> > To make sure these helpers worked for all combinations and without
> > introducing too much of complexity, the device was always resumed in
> > pm_runtime_force_resume().
> >
> > More precisely, when CONFIG_PM_SLEEP was set and CONFIG_PM_RUNTIME was
> > unset, we needed to resume the device as the subsystem/driver couldn't
> > rely on using runtime PM to do it.
> >
> > As the CONFIG_PM_RUNTIME option was merged into CONFIG_PM a while ago, it
> > removed this combination, of using CONFIG_PM_SLEEP without the earlier
> > CONFIG_PM_RUNTIME.
> >
> > For this reason we can now rely on the subsystem/driver to use runtime PM
> > to resume the device, instead of forcing that to be done in all cases. In
> > other words, let's defer this to a later point when it's actually needed.
> >
> > Signed-off-by: Ulf Hansson 
> > ---
> >  drivers/base/power/runtime.c | 11 +++
> >  1 file changed, 11 insertions(+)
> >
> > diff --git a/drivers/base/power/runtime.c b/drivers/base/power/runtime.c
> > index 09e4eb1..1db7b46 100644
> > --- a/drivers/base/power/runtime.c
> > +++ b/drivers/base/power/runtime.c
> > @@ -1509,6 +1509,17 @@ int pm_runtime_force_resume(struct device *dev)
> > if (!pm_runtime_status_suspended(dev))
> > goto out;
> >
> > +   /*
> > +* The PM core increases the runtime PM usage count in the system PM
> > +* prepare phase. If the count is greather than 1 at this point, 
> > someone
> > +* else has also increased it. In that case, invoke the runtime 
> > resume
> > +* callback for the device as that is likely what is expected. In 
> > other
> > +* case we trust the subsystem/driver to runtime resume the device 
> > when
> > +* it's actually needed.
> > +*/
> > +   if (atomic_read(>power.usage_count) < 2)
> > +   goto out;
> > +
> > ret = pm_runtime_set_active(dev);
> > if (ret)
> > goto out;
> 
> This patch (commit eb13a0a1b6d5d5c2 in pm/linux-next) breaks resume on
> sh73a0/kzm9g and r8a73a4/ape6evm. On these boards, the Ethernet controller is 
> a
> child of a local bus (bsc), whose clock (zb) is controlled through pm_clk and
> simple-pm-bus, cfr.
> 
> arch/arm/boot/dts/r8a73a4-ape6evm.dts
> arch/arm/boot/dts/r8a73a4.dtsi
> arch/arm/boot/dts/sh73a0-kzm9g.dts
> arch/arm/boot/dts/sh73a0.dtsi
> 
> During resume, the bus clock is not enabled, causing an imprecise abort
> when accessing the Ethernet controller's registers. With some debug code
> added:
> 
> PM: Syncing filesystems ... done.
> PM: Preparing system for sleep (mem)
> Freezing user space processes ... (elapsed 0.001 seconds) done.
> Double checking all user space processes after OOM killer
> disable... (elapsed 0.000 seconds)
> Freezing remaining freezable tasks ... (elapsed 0.001 seconds) done.
> PM: Suspending system (mem)
> smsc911x: smsc911x_suspend
> simple-pm-bus fec1.bus: simple_pm_bus_suspend
> PM: suspend of devices complete after 21.484 msecs
> PM: suspend devices took 0.030 seconds
> PM: late suspend of devices complete after 0.488 msecs
> cpg_div6_clock_disable: zb
> rmobile_pd_power_down: a3sp
> PM: noirq suspend of devices complete after 8.300 msecs
> Disabling non-boot CPUs ...
> CPU1: shutdown
> 
> PM: early resume of devices complete after 0.488 msecs
> simple-pm-bus fec1.bus: simple_pm_bus_resume
> smsc911x: smsc911x_resume
> Unhandled fault: imprecise external abort (0x1406) at 0xb6f40068
> pgd = deedc000
> [b6f40068] *pgd=5f774831, *pte=4087659f, *ppte=40876e7e
> Internal error: : 1406 [#1] SMP ARM
> Modules linked in:
> CPU: 0 PID: 1062 Comm: s2ram Not tainted
> 4.7.0-rc5-kzm9g-00391-g8f5105e9303a-dirty #765
> Hardware name: Generic SH73A0 (Flattened Device Tree)
> task: dedc0840 ti: deee6000 task.ti: deee6000
> PC is at __smsc911x_reg_read+0x1c/0x60
> LR is at smsc911x_resume+0x78/0xd0
> 
> After reverting this patch, resume succeeds again, as the zb clock is enabled
> first:
> 
> PM: Syncing filesystems ... done.
> PM: Preparing system for sleep (mem)
> Freezing user space processes ... (elapsed 0.001 seconds) done.
> Double checking all user space processes after OOM killer
> disable... (elapsed 0.000 seconds)
> Freezing remaining freezable tasks ... (elapsed 0.001 seconds) done.
> PM: Suspending system (mem)
> smsc911x: smsc911x_suspend
> simple-pm-bus fec1.bus: simple_pm_bus_suspend
> PM: suspend of devices complete after 22.460 msecs
> PM: suspend devices

Re: [git pull] clk: renesas: Updates for v4.8 (take two)

2016-06-28 Thread Stephen Boyd 
On 06/23, Geert Uytterhoeven wrote:
>   Hi Mike, Stephen,
> 
> The following changes since commit e4e2d7c388350eba8b1dbc2569441ac9b545a8c4:
> 
>   clk: renesas: cpg-mssr: Add support for R-Car M3-W (2016-06-06 11:58:35 
> +0200)
> 
> are available in the git repository at:
> 
>   git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers.git 
> tags/clk-renesas-for-v4.8-tag2
> 
> for you to fetch changes up to e4c82863fd17bacb60080481c11eb0303d3f83d0:
> 
>   clk: renesas: r8a7795: Add THS/TSC clock (2016-06-21 09:21:06 +0200)
> 
> 
> clk: renesas: Updates for v4.8 (take two)
> 
>   - Add support for R-Car V2H,
>   - Add FDP1, DRIF, and thermal clocks on R-Car H3,
>   - Correct a wrong parent clock.
> 
> This pull request is based on my previous request "[git pull] clk:
> renesas: Add support for R-Car M3-W".
> For proper merge history (auto-grabbing the commit message from the
> signed tag), you should pull tags/clk-renesas-for-v4.8-tag1 first.
> As  is a hard dependency for the
> initial r8a7796.dtsi file, I would appreciate if you could do that
> sooner rather than later, so Simon can pull it as well, and start
> queueing up the DT files for R-Car M3-W, which need to go through
> arm-soc.

Thanks. Pulled into clk-next. BTW, please don't use clk_readl()
unless you really need it. Just use readl/writel directly. I
should put a big fat warning over those functions that they
shouldn't be used.

-- 
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project

Re: [git pull] clk: renesas: Add support for R-Car M3-W

2016-06-28 Thread Stephen Boyd 
On 06/28, Geert Uytterhoeven wrote:
> It is not; there's just a second pull request with more commits on top.
> 
> I think you best pull this one first, as git will use the summary from the
> signed tag. The signed tag of the second pull request only summarizes
> the additions, compared to the first tag.
> 

Ok. Pulled into clk-next. Thanks.

-- 
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project

Re: [git pull] clk: renesas: Add support for R-Car M3-W

2016-06-28 Thread Stephen Boyd 
On 06/21, Geert Uytterhoeven wrote:
> Hi Stephen,
> 
> On Tue, Jun 21, 2016 at 2:51 AM, Stephen Boyd  wrote:
> > On 06/06, Geert Uytterhoeven wrote:
> >>   Hi Mike, Stephen,
> >>
> >> The following changes since commit 
> >> 1a695a905c18548062509178b98bc91e67510864:
> >>
> >>   Linux 4.7-rc1 (2016-05-29 09:29:24 -0700)
> >>
> >> are available in the git repository at:
> >>
> >>   git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers.git 
> >> tags/clk-renesas-for-v4.8-tag1
> >>
> >> for you to fetch changes up to e4e2d7c388350eba8b1dbc2569441ac9b545a8c4:
> >>
> >>   clk: renesas: cpg-mssr: Add support for R-Car M3-W (2016-06-06 11:58:35 
> >> +0200)
> >>
> >
> > Checkpatch complains...
> >
> > ERROR: Use of const init definition must use __initconst
> > #712: FILE: drivers/clk/renesas/rcar-gen3-cpg.c:248:
> > +static const struct rcar_gen3_cpg_pll_config *cpg_pll_config __initdata;
> >
> > Seems like a valid problem. Any chance it can be fixed?
> 
> It is a false positive: the data pointed to is const, the pointer
> variable isn't.
> 

Argh thanks. It would be nice if sparse complained about that
instead of checkpatch so that we got a better parse on the actual
type that is marked initdata. Anyway, I see this pull is
superseded now.

-- 
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project

Re: [PATCH 4/4] PM / Runtime: Defer resuming of the device in pm_runtime_force_resume()

2016-06-28 Thread Geert Uytterhoeven 
Hi Ulf, Rafael,

On Tue, May 17, 2016 at 1:41 PM, Ulf Hansson  wrote:
> When the pm_runtime_force_suspend|resume() helpers were invented, we still
> had CONFIG_PM_RUNTIME and CONFIG_PM_SLEEP as separate Kconfig options.
>
> To make sure these helpers worked for all combinations and without
> introducing too much of complexity, the device was always resumed in
> pm_runtime_force_resume().
>
> More precisely, when CONFIG_PM_SLEEP was set and CONFIG_PM_RUNTIME was
> unset, we needed to resume the device as the subsystem/driver couldn't
> rely on using runtime PM to do it.
>
> As the CONFIG_PM_RUNTIME option was merged into CONFIG_PM a while ago, it
> removed this combination, of using CONFIG_PM_SLEEP without the earlier
> CONFIG_PM_RUNTIME.
>
> For this reason we can now rely on the subsystem/driver to use runtime PM
> to resume the device, instead of forcing that to be done in all cases. In
> other words, let's defer this to a later point when it's actually needed.
>
> Signed-off-by: Ulf Hansson 
> ---
>  drivers/base/power/runtime.c | 11 +++
>  1 file changed, 11 insertions(+)
>
> diff --git a/drivers/base/power/runtime.c b/drivers/base/power/runtime.c
> index 09e4eb1..1db7b46 100644
> --- a/drivers/base/power/runtime.c
> +++ b/drivers/base/power/runtime.c
> @@ -1509,6 +1509,17 @@ int pm_runtime_force_resume(struct device *dev)
> if (!pm_runtime_status_suspended(dev))
> goto out;
>
> +   /*
> +* The PM core increases the runtime PM usage count in the system PM
> +* prepare phase. If the count is greather than 1 at this point, 
> someone
> +* else has also increased it. In that case, invoke the runtime resume
> +* callback for the device as that is likely what is expected. In 
> other
> +* case we trust the subsystem/driver to runtime resume the device 
> when
> +* it's actually needed.
> +*/
> +   if (atomic_read(>power.usage_count) < 2)
> +   goto out;
> +
> ret = pm_runtime_set_active(dev);
> if (ret)
> goto out;

This patch (commit eb13a0a1b6d5d5c2 in pm/linux-next) breaks resume on
sh73a0/kzm9g and r8a73a4/ape6evm. On these boards, the Ethernet controller is a
child of a local bus (bsc), whose clock (zb) is controlled through pm_clk and
simple-pm-bus, cfr.

arch/arm/boot/dts/r8a73a4-ape6evm.dts
arch/arm/boot/dts/r8a73a4.dtsi
arch/arm/boot/dts/sh73a0-kzm9g.dts
arch/arm/boot/dts/sh73a0.dtsi

During resume, the bus clock is not enabled, causing an imprecise abort
when accessing the Ethernet controller's registers. With some debug code
added:

PM: Syncing filesystems ... done.
PM: Preparing system for sleep (mem)
Freezing user space processes ... (elapsed 0.001 seconds) done.
Double checking all user space processes after OOM killer
disable... (elapsed 0.000 seconds)
Freezing remaining freezable tasks ... (elapsed 0.001 seconds) done.
PM: Suspending system (mem)
smsc911x: smsc911x_suspend
simple-pm-bus fec1.bus: simple_pm_bus_suspend
PM: suspend of devices complete after 21.484 msecs
PM: suspend devices took 0.030 seconds
PM: late suspend of devices complete after 0.488 msecs
cpg_div6_clock_disable: zb
rmobile_pd_power_down: a3sp
PM: noirq suspend of devices complete after 8.300 msecs
Disabling non-boot CPUs ...
CPU1: shutdown

PM: early resume of devices complete after 0.488 msecs
simple-pm-bus fec1.bus: simple_pm_bus_resume
smsc911x: smsc911x_resume
Unhandled fault: imprecise external abort (0x1406) at 0xb6f40068
pgd = deedc000
[b6f40068] *pgd=5f774831, *pte=4087659f, *ppte=40876e7e
Internal error: : 1406 [#1] SMP ARM
Modules linked in:
CPU: 0 PID: 1062 Comm: s2ram Not tainted
4.7.0-rc5-kzm9g-00391-g8f5105e9303a-dirty #765
Hardware name: Generic SH73A0 (Flattened Device Tree)
task: dedc0840 ti: deee6000 task.ti: deee6000
PC is at __smsc911x_reg_read+0x1c/0x60
LR is at smsc911x_resume+0x78/0xd0

After reverting this patch, resume succeeds again, as the zb clock is enabled
first:

PM: Syncing filesystems ... done.
PM: Preparing system for sleep (mem)
Freezing user space processes ... (elapsed 0.001 seconds) done.
Double checking all user space processes after OOM killer
disable... (elapsed 0.000 seconds)
Freezing remaining freezable tasks ... (elapsed 0.001 seconds) done.
PM: Suspending system (mem)
smsc911x: smsc911x_suspend
simple-pm-bus fec1.bus: simple_pm_bus_suspend
PM: suspend of devices complete after 22.460 msecs
PM: suspend devices took 0.030 seconds
PM: late suspend of devices complete after 0.488 msecs
cpg_div6_clock_disable: zb
rmobile_pd_power_down: a3sp
PM: noirq suspend of devices complete after 8.300 msecs
Disabling non-boot CPUs ...
CPU1: shutdown

Enabling non-boot CPUs ...
CPU1 is up

Re: [PATCH 0/4] Residue patches for rcar-dmac from renesas-drivers

2016-06-28 Thread Vinod Koul 
On Wed, Jun 15, 2016 at 01:13:04PM +0200, Niklas Söderlund wrote:
> Hi all,
> 
> Laurent Pinchart (1):
>   dmaengine: rcar-dmac: Fix residue reporting for pending descriptors
> 
> Muhammad Hamza Farooq (2):
>   dma: rcar-dma: use result of updated get_residue in tx_status
>   dma: rcar-dma: Fixed active descriptor initializing
> 
> Niklas Söderlund (1):
>   dmaengine: rcar-dmac: warn if transfer cannot start as TE = 1

At least maintain consistency in patch title, 2 are dma and two dmaengine.
Correct one is latter..

> 
>  drivers/dma/sh/rcar-dmac.c | 40 +---
>  1 file changed, 37 insertions(+), 3 deletions(-)
> 
> -- 
> 2.8.3
> 

-- 
~Vinod

[PATCH v5 10/13] ARM: shmobile: r8a7791: Prioritize DT APMU support

2016-06-28 Thread Geert Uytterhoeven 
From: Magnus Damm 

Adjust the r8a7791 SoC support code to not configure any non-DT SMP code
in case the DT-based enable-method has been installed already.

Signed-off-by: Magnus Damm 
Signed-off-by: Geert Uytterhoeven 
---
v5:
  - No changes,

v4:
  - No changes,

v3:
  - No changes,

v2:
  - New.
---
 arch/arm/mach-shmobile/setup-r8a7791.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/arm/mach-shmobile/setup-r8a7791.c 
b/arch/arm/mach-shmobile/setup-r8a7791.c
index 3b8dbaf0145e..110e8b588e563fca 100644
--- a/arch/arm/mach-shmobile/setup-r8a7791.c
+++ b/arch/arm/mach-shmobile/setup-r8a7791.c
@@ -29,6 +29,7 @@ static const char *const r8a7791_boards_compat_dt[] 
__initconst = {
 };
 
 DT_MACHINE_START(R8A7791_DT, "Generic R8A7791 (Flattened Device Tree)")
+   .smp_init   = shmobile_smp_init_fallback_ops,
.smp= smp_ops(r8a7791_smp_ops),
.init_early = shmobile_init_delay,
.init_time  = rcar_gen2_timer_init,
-- 
1.9.1

[PATCH v5 13/13] ARM: dts: r8a7793: Add APMU node and second CPU core

2016-06-28 Thread Geert Uytterhoeven 
From: Magnus Damm 

Add DT nodes for the Advanced Power Management Unit (APMU) and the
second CPU core.  Use the enable-method to point out that the APMU
should be used for SMP support.

Signed-off-by: Magnus Damm 
Signed-off-by: Geert Uytterhoeven 
---
v5:
  - Add missing power-domains property to cpu1 node,

v4:
  - Improve patch description,
  - Use "renesas,-apmu" instead of "renesas,apmu-",

v3:
  - New.
---
 arch/arm/boot/dts/r8a7793.dtsi | 15 +++
 1 file changed, 15 insertions(+)

diff --git a/arch/arm/boot/dts/r8a7793.dtsi b/arch/arm/boot/dts/r8a7793.dtsi
index 9b55c1c6ee31a49d..8d02aacf28926271 100644
--- a/arch/arm/boot/dts/r8a7793.dtsi
+++ b/arch/arm/boot/dts/r8a7793.dtsi
@@ -35,6 +35,7 @@
cpus {
#address-cells = <1>;
#size-cells = <0>;
+   enable-method = "renesas,apmu";
 
cpu0: cpu@0 {
device_type = "cpu";
@@ -56,6 +57,14 @@
next-level-cache = <_CA15>;
};
 
+   cpu1: cpu@1 {
+   device_type = "cpu";
+   compatible = "arm,cortex-a15";
+   reg = <1>;
+   clock-frequency = <15>;
+   power-domains = < R8A7793_PD_CA15_CPU1>;
+   };
+
L2_CA15: cache-controller@0 {
compatible = "cache";
reg = <0>;
@@ -65,6 +74,12 @@
};
};
 
+   apmu@e6152000 {
+   compatible = "renesas,r8a7793-apmu", "renesas,apmu";
+   reg = <0 0xe6152000 0 0x188>;
+   cpus = < >;
+   };
+
thermal-zones {
cpu_thermal: cpu-thermal {
polling-delay-passive   = <0>;
-- 
1.9.1

[PATCH v5 06/13] ARM: shmobile: apmu: Move #ifdef CONFIG_SMP to cover more functions

2016-06-28 Thread Geert Uytterhoeven 
shmobile_smp_apmu_prepare_cpus() is used only if CONFIG_SMP=y.

Hence move the #ifdef to cover shmobile_smp_apmu_prepare_cpus() and all
functions only called by it (apmu_init_cpu() and apmu_parse_cfg()).

Signed-off-by: Geert Uytterhoeven 
Reviewed-by: Ulrich Hecht 
---
v5:
  - Add Reviewed-by,

v4:
  - New.
---
 arch/arm/mach-shmobile/platsmp-apmu.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/mach-shmobile/platsmp-apmu.c 
b/arch/arm/mach-shmobile/platsmp-apmu.c
index aba75c89f9c1c5eb..c1558ef0c590dd3e 100644
--- a/arch/arm/mach-shmobile/platsmp-apmu.c
+++ b/arch/arm/mach-shmobile/platsmp-apmu.c
@@ -74,6 +74,7 @@ static int __maybe_unused apmu_wrap(int cpu, int (*fn)(void 
__iomem *p, int cpu)
return p ? fn(p, apmu_cpus[cpu].bit) : -EINVAL;
 }
 
+#ifdef CONFIG_SMP
 static void apmu_init_cpu(struct resource *res, int cpu, int bit)
 {
if ((cpu >= ARRAY_SIZE(apmu_cpus)) || apmu_cpus[cpu].iomem)
@@ -128,7 +129,6 @@ void __init shmobile_smp_apmu_prepare_cpus(unsigned int 
max_cpus,
apmu_parse_cfg(apmu_init_cpu, apmu_config, num);
 }
 
-#ifdef CONFIG_SMP
 int shmobile_smp_apmu_boot_secondary(unsigned int cpu, struct task_struct 
*idle)
 {
/* For this particular CPU register boot vector */
-- 
1.9.1

[PATCH v5 08/13] ARM: shmobile: smp: Add function to prioritize DT SMP

2016-06-28 Thread Geert Uytterhoeven 
From: Magnus Damm 

Add a function to check if other DT based method is available, and
if so return false to not hook up smp_ops from the machine vector.

This results in that DT-based SMP support has priority over older
C-based smp_ops code, and in case DT-based SMP support code does not
exist in the DTB then the old smp_ops code will still work as-is.

Signed-off-by: Magnus Damm 
Signed-off-by: Geert Uytterhoeven 
---
v5:
  - No changes,

v4:
  - Remove empty line at end of file,

v3:
  - No changes,

v2:
  - Rework r8a7791-specific version to become reusable function.
---
 arch/arm/mach-shmobile/common.h  | 1 +
 arch/arm/mach-shmobile/platsmp.c | 6 ++
 2 files changed, 7 insertions(+)

diff --git a/arch/arm/mach-shmobile/common.h b/arch/arm/mach-shmobile/common.h
index 3b562d87826d7410..1a8f7b3ab449db56 100644
--- a/arch/arm/mach-shmobile/common.h
+++ b/arch/arm/mach-shmobile/common.h
@@ -10,6 +10,7 @@ extern void shmobile_smp_sleep(void);
 extern void shmobile_smp_hook(unsigned int cpu, unsigned long fn,
  unsigned long arg);
 extern bool shmobile_smp_cpu_can_disable(unsigned int cpu);
+extern bool shmobile_smp_init_fallback_ops(void);
 extern void shmobile_boot_scu(void);
 extern void shmobile_smp_scu_prepare_cpus(phys_addr_t scu_base_phys,
  unsigned int max_cpus);
diff --git a/arch/arm/mach-shmobile/platsmp.c b/arch/arm/mach-shmobile/platsmp.c
index b23378f3d7e1726b..f3dba6f356e29446 100644
--- a/arch/arm/mach-shmobile/platsmp.c
+++ b/arch/arm/mach-shmobile/platsmp.c
@@ -36,3 +36,9 @@ bool shmobile_smp_cpu_can_disable(unsigned int cpu)
return true; /* Hotplug of any CPU is supported */
 }
 #endif
+
+bool __init shmobile_smp_init_fallback_ops(void)
+{
+   /* fallback on PSCI/smp_ops if no other DT based method is detected */
+   return platform_can_secondary_boot() ? true : false;
+}
-- 
1.9.1

[PATCH v5 07/13] ARM: shmobile: apmu: Add APMU DT support via Enable method

2016-06-28 Thread Geert Uytterhoeven 
From: Magnus Damm 

Allow DT configuration of the APMU hardware in the case when the APMU is
pointed out in the DTB via the enable-method. The ability to configure
the APMU via C code is still kept intact to prevent DTB breakage for older
SoCs that do not rely on the enable-method for SMP support.

Signed-off-by: Magnus Damm 
[geert: Fix CONFIG_SMP=n build]
Signed-off-by: Geert Uytterhoeven 
---
v5:
  - No changes,

v4:
  - Remove bogus of_node_put(),
  - Fix CONFIG_SMP=n build,
  - Correct whitespace,

v3:
  - Move is_allowed declaration, break when allowed,

v2:
  - Adjust to use .cpu_can_disable instead of .cpu_disable.
---
 arch/arm/mach-shmobile/platsmp-apmu.c | 92 +--
 1 file changed, 88 insertions(+), 4 deletions(-)

diff --git a/arch/arm/mach-shmobile/platsmp-apmu.c 
b/arch/arm/mach-shmobile/platsmp-apmu.c
index c1558ef0c590dd3e..0c6bb458b7a45128 100644
--- a/arch/arm/mach-shmobile/platsmp-apmu.c
+++ b/arch/arm/mach-shmobile/platsmp-apmu.c
@@ -24,6 +24,7 @@
 #include 
 #include "common.h"
 #include "platsmp-apmu.h"
+#include "rcar-gen2.h"
 
 static struct {
void __iomem *iomem;
@@ -118,14 +119,66 @@ static void apmu_parse_cfg(void (*fn)(struct resource 
*res, int cpu, int bit),
}
 }
 
-void __init shmobile_smp_apmu_prepare_cpus(unsigned int max_cpus,
-  struct rcar_apmu_config *apmu_config,
-  int num)
+static const struct of_device_id apmu_ids[] = {
+   { .compatible = "renesas,apmu" },
+   { /*sentinel*/ }
+};
+
+static void apmu_parse_dt(void (*fn)(struct resource *res, int cpu, int bit))
+{
+   struct device_node *np_apmu, *np_cpu;
+   struct resource res;
+   int bit, index;
+   u32 id;
+
+   for_each_matching_node(np_apmu, apmu_ids) {
+   /* only enable the cluster that includes the boot CPU */
+   bool is_allowed = false;
+
+   for (bit = 0; bit < CONFIG_NR_CPUS; bit++) {
+   np_cpu = of_parse_phandle(np_apmu, "cpus", bit);
+   if (np_cpu) {
+   if (!of_property_read_u32(np_cpu, "reg", )) {
+   if (id == cpu_logical_map(0)) {
+   is_allowed = true;
+   of_node_put(np_cpu);
+   break;
+   }
+
+   }
+   of_node_put(np_cpu);
+   }
+   }
+   if (!is_allowed)
+   continue;
+
+   for (bit = 0; bit < CONFIG_NR_CPUS; bit++) {
+   np_cpu = of_parse_phandle(np_apmu, "cpus", bit);
+   if (np_cpu) {
+   if (!of_property_read_u32(np_cpu, "reg", )) {
+   index = get_logical_index(id);
+   if ((index >= 0) &&
+   !of_address_to_resource(np_apmu,
+   0, ))
+   fn(, index, bit);
+   }
+   of_node_put(np_cpu);
+   }
+   }
+   }
+}
+
+static void __init shmobile_smp_apmu_setup_boot(void)
 {
/* install boot code shared by all CPUs */
shmobile_boot_fn = virt_to_phys(shmobile_smp_boot);
+}
 
-   /* perform per-cpu setup */
+void __init shmobile_smp_apmu_prepare_cpus(unsigned int max_cpus,
+  struct rcar_apmu_config *apmu_config,
+  int num)
+{
+   shmobile_smp_apmu_setup_boot();
apmu_parse_cfg(apmu_init_cpu, apmu_config, num);
 }
 
@@ -136,7 +189,38 @@ int shmobile_smp_apmu_boot_secondary(unsigned int cpu, 
struct task_struct *idle)
 
return apmu_wrap(cpu, apmu_power_on);
 }
+
+static void __init shmobile_smp_apmu_prepare_cpus_dt(unsigned int max_cpus)
+{
+   shmobile_smp_apmu_setup_boot();
+   apmu_parse_dt(apmu_init_cpu);
+   rcar_gen2_pm_init();
+}
+
+static int shmobile_smp_apmu_boot_secondary_md21(unsigned int cpu,
+struct task_struct *idle)
+{
+   /* Error out when hardware debug mode is enabled */
+   if (rcar_gen2_read_mode_pins() & BIT(21)) {
+   pr_warn("Unable to boot CPU%u when MD21 is set\n", cpu);
+   return -ENOTSUPP;
+   }
+
+   return shmobile_smp_apmu_boot_secondary(cpu, idle);
+}
+
+static struct smp_operations apmu_smp_ops __initdata = {
+   .smp_prepare_cpus   = shmobile_smp_apmu_prepare_cpus_dt,
+   .smp_boot_secondary =

[PATCH v5 03/13] soc: renesas: rcar-sysc: Make rcar_sysc_init() init the PM domains

2016-06-28 Thread Geert Uytterhoeven 
Let rcar_sysc_init() trigger initialization of the SYSC PM domains from
DT if called before the early_initcall.
On failure, it falls back to mapping the passed register block, as
before.

Signed-off-by: Geert Uytterhoeven 
---
v5:
  - No changes,

v4:
  - New.
---
 drivers/soc/renesas/rcar-sysc.c | 20 +++-
 1 file changed, 11 insertions(+), 9 deletions(-)

diff --git a/drivers/soc/renesas/rcar-sysc.c b/drivers/soc/renesas/rcar-sysc.c
index 59a8152681a59a5c..68d6856c9d3cd192 100644
--- a/drivers/soc/renesas/rcar-sysc.c
+++ b/drivers/soc/renesas/rcar-sysc.c
@@ -164,15 +164,6 @@ static bool rcar_sysc_power_is_off(const struct 
rcar_sysc_ch *sysc_ch)
return false;
 }
 
-void __iomem *rcar_sysc_init(phys_addr_t base)
-{
-   rcar_sysc_base = ioremap_nocache(base, PAGE_SIZE);
-   if (!rcar_sysc_base)
-   panic("unable to ioremap R-Car SYSC hardware block\n");
-
-   return rcar_sysc_base;
-}
-
 struct rcar_sysc_pd {
struct generic_pm_domain genpd;
struct rcar_sysc_ch ch;
@@ -328,6 +319,9 @@ static int __init rcar_sysc_pd_init(void)
unsigned int i;
int error;
 
+   if (rcar_sysc_base)
+   return 0;
+
np = of_find_matching_node_and_match(NULL, rcar_sysc_matches, );
if (!np)
return -ENODEV;
@@ -405,3 +399,11 @@ out_put:
return error;
 }
 early_initcall(rcar_sysc_pd_init);
+
+void __iomem * __init rcar_sysc_init(phys_addr_t base)
+{
+   if (rcar_sysc_pd_init())
+   rcar_sysc_base = ioremap_nocache(base, PAGE_SIZE);
+
+   return rcar_sysc_base;
+}
-- 
1.9.1

[PATCH v5 01/13] devicetree: bindings: Renesas APMU and SMP Enable method

2016-06-28 Thread Geert Uytterhoeven 
From: Magnus Damm 

Add DT binding documentation for the APMU hardware and add "renesas,apmu"
to the list of enable methods for the ARM cpus.

Signed-off-by: Magnus Damm 
Signed-off-by: Geert Uytterhoeven 
Acked-by: Rob Herring 
Cc: devicet...@vger.kernel.org
---
v5:
  - Add Acked-by,

v4:
  - s/reigsters/registers/,
  - Use "renesas,-apmu" instead of "renesas,apmu-",

v3:
  - s/Until/Unit/g,

v2:
  - No changes.
---
 Documentation/devicetree/bindings/arm/cpus.txt |  1 +
 .../devicetree/bindings/power/renesas,apmu.txt | 31 ++
 2 files changed, 32 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/power/renesas,apmu.txt

diff --git a/Documentation/devicetree/bindings/arm/cpus.txt 
b/Documentation/devicetree/bindings/arm/cpus.txt
index 3f0cbbb8395f84ef..fa7520eb6387edbe 100644
--- a/Documentation/devicetree/bindings/arm/cpus.txt
+++ b/Documentation/devicetree/bindings/arm/cpus.txt
@@ -204,6 +204,7 @@ nodes to be present and contain the properties described 
below.
"qcom,gcc-msm8660"
"qcom,kpss-acc-v1"
"qcom,kpss-acc-v2"
+   "renesas,apmu"
"rockchip,rk3036-smp"
"rockchip,rk3066-smp"
"ste,dbx500-smp"
diff --git a/Documentation/devicetree/bindings/power/renesas,apmu.txt 
b/Documentation/devicetree/bindings/power/renesas,apmu.txt
new file mode 100644
index ..84404c9edff73d97
--- /dev/null
+++ b/Documentation/devicetree/bindings/power/renesas,apmu.txt
@@ -0,0 +1,31 @@
+DT bindings for the Renesas Advanced Power Management Unit
+
+Renesas R-Car line of SoCs utilize one or more APMU hardware units
+for CPU core power domain control including SMP boot and CPU Hotplug.
+
+Required properties:
+
+- compatible: Should be "renesas,-apmu", "renesas,apmu" as fallback.
+ Examples with soctypes are:
+   - "renesas,r8a7790-apmu" (R-Car H2)
+   - "renesas,r8a7791-apmu" (R-Car M2-W)
+   - "renesas,r8a7792-apmu" (R-Car V2H)
+   - "renesas,r8a7793-apmu" (R-Car M2-N)
+   - "renesas,r8a7794-apmu" (R-Car E2)
+
+- reg: Base address and length of the I/O registers used by the APMU.
+
+- cpus: This node contains a list of CPU cores, which should match the order
+  of CPU cores used by the WUPCR and PSTR registers in the Advanced Power
+  Management Unit section of the device's datasheet.
+
+
+Example:
+
+This shows the r8a7791 APMU that can control CPU0 and CPU1.
+
+   apmu@e6152000 {
+   compatible = "renesas,r8a7791-apmu", "renesas,apmu";
+   reg = <0 0xe6152000 0 0x188>;
+   cpus = < >;
+   };
-- 
1.9.1

[PATCH v5 09/13] ARM: shmobile: r8a7790: Prioritize DT APMU support

2016-06-28 Thread Geert Uytterhoeven 
From: Magnus Damm 

Adjust the r8a7790 SoC support code to not configure any non-DT SMP code
in case the DT-based enable-method has been installed already.

Signed-off-by: Magnus Damm 
Signed-off-by: Geert Uytterhoeven 
---
v5:
  - No changes,

v4:
  - No changes,

v3:
  - No changes,

v2:
  - New.
---
 arch/arm/mach-shmobile/setup-r8a7790.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/arm/mach-shmobile/setup-r8a7790.c 
b/arch/arm/mach-shmobile/setup-r8a7790.c
index 3a18af4922b42577..3506327e0bed2422 100644
--- a/arch/arm/mach-shmobile/setup-r8a7790.c
+++ b/arch/arm/mach-shmobile/setup-r8a7790.c
@@ -28,6 +28,7 @@ static const char * const r8a7790_boards_compat_dt[] 
__initconst = {
 };
 
 DT_MACHINE_START(R8A7790_DT, "Generic R8A7790 (Flattened Device Tree)")
+   .smp_init   = shmobile_smp_init_fallback_ops,
.smp= smp_ops(r8a7790_smp_ops),
.init_early = shmobile_init_delay,
.init_time  = rcar_gen2_timer_init,
-- 
1.9.1

[PATCH v5 05/13] soc: renesas: rcar-sysc: Improve SYSC interrupt config in legacy wrapper

2016-06-28 Thread Geert Uytterhoeven 
Align SYSC interrupt configuration in the legacy wrapper with the DT
version:
  - Mask SYSC interrupt sources before enabling them (doesn't matter
much as they're disabled at the GIC level anyway),
  - Make sure not to clear reserved SYSCIMR bits that were set before.

Signed-off-by: Geert Uytterhoeven 
Reviewed-by: Ulrich Hecht 
---
v5:
  - Add Reviewed-by,

v4:
  - New.
---
 drivers/soc/renesas/rcar-sysc.c | 17 +++--
 1 file changed, 15 insertions(+), 2 deletions(-)

diff --git a/drivers/soc/renesas/rcar-sysc.c b/drivers/soc/renesas/rcar-sysc.c
index 22f0d646225c444e..65c8e1eb90c09bb3 100644
--- a/drivers/soc/renesas/rcar-sysc.c
+++ b/drivers/soc/renesas/rcar-sysc.c
@@ -402,12 +402,25 @@ early_initcall(rcar_sysc_pd_init);
 
 void __init rcar_sysc_init(phys_addr_t base, u32 syscier)
 {
+   u32 syscimr;
+
if (!rcar_sysc_pd_init())
return;
 
rcar_sysc_base = ioremap_nocache(base, PAGE_SIZE);
 
-   /* enable all interrupt sources, but do not use interrupt handler */
+   /*
+* Mask all interrupt sources to prevent the CPU from receiving them.
+* Make sure not to clear reserved bits that were set before.
+*/
+   syscimr = ioread32(rcar_sysc_base + SYSCIMR);
+   syscimr |= syscier;
+   pr_debug("%s: syscimr = 0x%08x\n", __func__, syscimr);
+   iowrite32(syscimr, rcar_sysc_base + SYSCIMR);
+
+   /*
+* SYSC needs all interrupt sources enabled to control power.
+*/
+   pr_debug("%s: syscier = 0x%08x\n", __func__, syscier);
iowrite32(syscier, rcar_sysc_base + SYSCIER);
-   iowrite32(0, rcar_sysc_base + SYSCIMR);
 }
-- 
1.9.1

[PATCH v5 00/13] ARM: shmobile: APMU DT support via SMP Enable method

2016-06-28 Thread Geert Uytterhoeven 
Hi Simon, Magnus,

This patch series, which I took over from Magnus and extended, adds DT
support for the APMU hardware commonly found in Renesas R-Car Gen2 SoCs.
Without these patches the APMU gets configured through data expressed in
C, and with this series applied it is possible to describe the APMU
configuration in DT and let the enable method point out that the APMU
should be used.

  - Patch 1 documents DT support to describe that the APMU hardware is
needed for SMP operation,
  - Patch 2 fixes a bug in the rcar-sysc driver that was harmless
before,
  - Patches 3-5 prepare for handling SYSC interrupt configuration purely
from DT in the rcar-sysc driver for new SoCs, while preserving
backward compatibility with old DTBs for R-Car H1, H2, and M2-W,
  - Patch 6 is a small cleanup for CONFIG_SMP=n builds,
  - Patch 7 adds DT support to the APMU driver together with enabling
use of the enable-method way to describe that the APMU hardware is
needed for SMP operation,
  - Patches 8-10 make sure that during run-time, if the APMU is
installed via the DT enable-method then it will not be overriden by
older non-DT configuration.  To avoid breaking support for older
DTBs out in the wild these patches keep the older existing C code
APMU configuration as-is.
  - Patches 11 and 12 update the r8a7790 and r8a7791 DTSes to describe
the APMU hardware,
  - Patch 13 adds r8a7793 SMP support using the new APMU DT interface.

Magnus suggested making APMU DT configuration mandatory for SMP
operation on newer SoCs and that we keep the old APMU support code in
place for a good number of kernel releases or until we can identify a
couple of major reasons good enough to force a DTB update on the end
users.

This is a prerequisite for adding SMP support for r8a7792 and r8a7794.
Patches updating the DTSes similar to patch 13 - without any C-based SMP
code and fallback - are already floating around.

Note that booting secondary CPUs using renesas,apmu is disabled on all
R-Car Gen2 SoCs if hardware debug mode is enabled through setting
MD21=1, like was done on R-Car M2-W before. While this may not be
necessary on all boards, SoCs, and firmware versions, dropping this
check requires adding some extra handling first.

Changes compared to v4 (more details in the individual patches):
  - Add Acked-by, Reviewed-by,
  - Add missing power-domains property to r8a7793 cpu1 node.

Changes compared to v3 (more details in the individual patches):
  - Use "renesas,-apmu" instead of "renesas,apmu-",
  - Handle SYSC interrupt configuration purely from DT in the rcar-sysc
driver for new SoCs,
  - Dropped patch [PATCH v3 04/09] "ARM: shmobile: r8a7793 boot address
update":
  - Hardcoded SYSCIER value is no longer needed due to the above,
  - ICRAM1 is already used since "ARM: shmobile: rcar-gen2: Use
ICRAM1 for jump stub on all SoCs",
  - Fix CONFIG_SMP=n build.

This series is against renesas-devel-20160627-v4.7-rc5.
For testing, it's also available in the topic/apmu-dt-v5 branch
of https://git.kernel.org/cgit/linux/kernel/git/geert/renesas-drivers.git.

This has been tested on r8a7779/marzen, r8a7790/lager, r8a7791/koelsch,
and r8a7793/gose.

Please apply, thanks!

Geert Uytterhoeven (5):
  soc: renesas: rcar-sysc: Fix uninitialized error code in
rcar_sysc_pd_init()
  soc: renesas: rcar-sysc: Make rcar_sysc_init() init the PM domains
  soc: renesas: rcar-sysc: Move SYSC interrupt config to rcar-sysc
driver
  soc: renesas: rcar-sysc: Improve SYSC interrupt config in legacy
wrapper
  ARM: shmobile: apmu: Move #ifdef CONFIG_SMP to cover more functions

Magnus Damm (8):
  devicetree: bindings: Renesas APMU and SMP Enable method
  ARM: shmobile: apmu: Add APMU DT support via Enable method
  ARM: shmobile: smp: Add function to prioritize DT SMP
  ARM: shmobile: r8a7790: Prioritize DT APMU support
  ARM: shmobile: r8a7791: Prioritize DT APMU support
  ARM: dts: r8a7790: Add APMU nodes
  ARM: dts: r8a7791: Add APMU node
  ARM: dts: r8a7793: Add APMU node and second CPU core

 Documentation/devicetree/bindings/arm/cpus.txt |  1 +
 .../devicetree/bindings/power/renesas,apmu.txt | 31 +++
 arch/arm/boot/dts/r8a7790.dtsi | 13 +++
 arch/arm/boot/dts/r8a7791.dtsi |  7 ++
 arch/arm/boot/dts/r8a7793.dtsi | 15 
 arch/arm/mach-shmobile/common.h|  1 +
 arch/arm/mach-shmobile/platsmp-apmu.c  | 94 --
 arch/arm/mach-shmobile/platsmp.c   |  6 ++
 arch/arm/mach-shmobile/pm-r8a7779.c|  6 +-
 arch/arm/mach-shmobile/pm-rcar-gen2.c  |  6 +-
 arch/arm/mach-shmobile/setup-r8a7790.c |  1 +
 arch/arm/mach-shmobile/setup-r8a7791.c |  1 +
 drivers/soc/renesas/rcar-sysc.c| 39 ++---
 include/linux/soc/renesas/rcar-sysc.h  |  2 +-
 14 files changed, 197 insertions(+),

[PATCH v5 02/13] soc: renesas: rcar-sysc: Fix uninitialized error code in rcar_sysc_pd_init()

2016-06-28 Thread Geert Uytterhoeven 
On success, rcar_sysc_pd_init() returns an uninitialized error code.
Use the return value of of_genpd_add_provider_onecell() to fix this.

This went unnoticed, as early_initcall() doesn't care about the return
value.

Signed-off-by: Geert Uytterhoeven 
---
v5:
  - No changes,

v4:
  - New.
---
 drivers/soc/renesas/rcar-sysc.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/soc/renesas/rcar-sysc.c b/drivers/soc/renesas/rcar-sysc.c
index a43ca24699bed1ec..59a8152681a59a5c 100644
--- a/drivers/soc/renesas/rcar-sysc.c
+++ b/drivers/soc/renesas/rcar-sysc.c
@@ -398,7 +398,7 @@ static int __init rcar_sysc_pd_init(void)
domains->domains[area->isr_bit] = >genpd;
}
 
-   of_genpd_add_provider_onecell(np, >onecell_data);
+   error = of_genpd_add_provider_onecell(np, >onecell_data);
 
 out_put:
of_node_put(np);
-- 
1.9.1

[PATCH v5 12/13] ARM: dts: r8a7791: Add APMU node

2016-06-28 Thread Geert Uytterhoeven 
From: Magnus Damm 

Add a DT node for the Advanced Power Management Units (APMU), and use
the enable-method to point out that the APMU should be used for SMP
support.

Signed-off-by: Magnus Damm 
Signed-off-by: Geert Uytterhoeven 

v5:
  - No changes,

v4:
  - Improve patch description,
  - Use "renesas,-apmu" instead of "renesas,apmu-",

v3:
  - No changes,

v2:
  - No changes.
---
 arch/arm/boot/dts/r8a7791.dtsi | 7 +++
 1 file changed, 7 insertions(+)

diff --git a/arch/arm/boot/dts/r8a7791.dtsi b/arch/arm/boot/dts/r8a7791.dtsi
index 1985bd0dc32ce738..8f0086bbd96bb27a 100644
--- a/arch/arm/boot/dts/r8a7791.dtsi
+++ b/arch/arm/boot/dts/r8a7791.dtsi
@@ -43,6 +43,7 @@
cpus {
#address-cells = <1>;
#size-cells = <0>;
+   enable-method = "renesas,apmu";
 
cpu0: cpu@0 {
device_type = "cpu";
@@ -101,6 +102,12 @@
};
};
 
+   apmu@e6152000 {
+   compatible = "renesas,r8a7791-apmu", "renesas,apmu";
+   reg = <0 0xe6152000 0 0x188>;
+   cpus = < >;
+   };
+
gic: interrupt-controller@f1001000 {
compatible = "arm,gic-400";
#interrupt-cells = <3>;
-- 
1.9.1

[PATCH v5 04/13] soc: renesas: rcar-sysc: Move SYSC interrupt config to rcar-sysc driver

2016-06-28 Thread Geert Uytterhoeven 
On R-Car H1 and Gen2, the SYSC interrupt registers are always configured
using hardcoded values in platform code. For R-Car Gen2, values are
provided for H2 and M2-W only, other SoCs are not yet supported, and
never will be.

Move this configuration from SoC-specific platform code to the
rcar_sysc_init() wrapper, so it can be skipped if the SYSC is configured
from DT. This would be the case not only for H1, H2, and M2-W using a
modern DTS, but also for other R-Car Gen2 SoCs not supported by the
platform code, relying purely on DT.

There is no longer a need to return the mapped register block, hence
make the function return void.

Signed-off-by: Geert Uytterhoeven 
Reviewed-by: Ulrich Hecht 
---
v5:
  - Add Reviewed-by,

v4:
  - New.
---
 arch/arm/mach-shmobile/pm-r8a7779.c   |  6 +-
 arch/arm/mach-shmobile/pm-rcar-gen2.c |  6 +-
 drivers/soc/renesas/rcar-sysc.c   | 12 
 include/linux/soc/renesas/rcar-sysc.h |  2 +-
 4 files changed, 11 insertions(+), 15 deletions(-)

diff --git a/arch/arm/mach-shmobile/pm-r8a7779.c 
b/arch/arm/mach-shmobile/pm-r8a7779.c
index 4174cbcbc467d047..5c9a93f5e650181a 100644
--- a/arch/arm/mach-shmobile/pm-r8a7779.c
+++ b/arch/arm/mach-shmobile/pm-r8a7779.c
@@ -23,11 +23,7 @@
 
 static void __init r8a7779_sysc_init(void)
 {
-   void __iomem *base = rcar_sysc_init(0xffd85000);
-
-   /* enable all interrupt sources, but do not use interrupt handler */
-   iowrite32(0x0131000e, base + SYSCIER);
-   iowrite32(0, base + SYSCIMR);
+   rcar_sysc_init(0xffd85000, 0x0131000e);
 }
 
 #else /* CONFIG_PM || CONFIG_SMP */
diff --git a/arch/arm/mach-shmobile/pm-rcar-gen2.c 
b/arch/arm/mach-shmobile/pm-rcar-gen2.c
index 61361dac6068210a..dd9ac366868f4336 100644
--- a/arch/arm/mach-shmobile/pm-rcar-gen2.c
+++ b/arch/arm/mach-shmobile/pm-rcar-gen2.c
@@ -36,11 +36,7 @@
 
 static void __init rcar_gen2_sysc_init(u32 syscier)
 {
-   void __iomem *base = rcar_sysc_init(0xe618);
-
-   /* enable all interrupt sources, but do not use interrupt handler */
-   iowrite32(syscier, base + SYSCIER);
-   iowrite32(0, base + SYSCIMR);
+   rcar_sysc_init(0xe618, syscier);
 }
 
 #else /* CONFIG_SMP */
diff --git a/drivers/soc/renesas/rcar-sysc.c b/drivers/soc/renesas/rcar-sysc.c
index 68d6856c9d3cd192..22f0d646225c444e 100644
--- a/drivers/soc/renesas/rcar-sysc.c
+++ b/drivers/soc/renesas/rcar-sysc.c
@@ -400,10 +400,14 @@ out_put:
 }
 early_initcall(rcar_sysc_pd_init);
 
-void __iomem * __init rcar_sysc_init(phys_addr_t base)
+void __init rcar_sysc_init(phys_addr_t base, u32 syscier)
 {
-   if (rcar_sysc_pd_init())
-   rcar_sysc_base = ioremap_nocache(base, PAGE_SIZE);
+   if (!rcar_sysc_pd_init())
+   return;
 
-   return rcar_sysc_base;
+   rcar_sysc_base = ioremap_nocache(base, PAGE_SIZE);
+
+   /* enable all interrupt sources, but do not use interrupt handler */
+   iowrite32(syscier, rcar_sysc_base + SYSCIER);
+   iowrite32(0, rcar_sysc_base + SYSCIMR);
 }
diff --git a/include/linux/soc/renesas/rcar-sysc.h 
b/include/linux/soc/renesas/rcar-sysc.h
index 92fc613ab23db091..7b8b280c181b8389 100644
--- a/include/linux/soc/renesas/rcar-sysc.h
+++ b/include/linux/soc/renesas/rcar-sysc.h
@@ -11,6 +11,6 @@ struct rcar_sysc_ch {
 
 int rcar_sysc_power_down(const struct rcar_sysc_ch *sysc_ch);
 int rcar_sysc_power_up(const struct rcar_sysc_ch *sysc_ch);
-void __iomem *rcar_sysc_init(phys_addr_t base);
+void rcar_sysc_init(phys_addr_t base, u32 syscier);
 
 #endif /* __LINUX_SOC_RENESAS_RCAR_SYSC_H__ */
-- 
1.9.1

[PATCH v5 11/13] ARM: dts: r8a7790: Add APMU nodes

2016-06-28 Thread Geert Uytterhoeven 
From: Magnus Damm 

Add DT nodes for the Advanced Power Management Units (APMU), and use the
enable-method to point out that the APMU should be used for SMP
support.

Signed-off-by: Magnus Damm 
Signed-off-by: Geert Uytterhoeven 
---
v5:
  - No changes,

v4:
  - Improve patch description,
  - Use "renesas,-apmu" instead of "renesas,apmu-",

v3:
  - No changes,

v2:
  - New.
---
 arch/arm/boot/dts/r8a7790.dtsi | 13 +
 1 file changed, 13 insertions(+)

diff --git a/arch/arm/boot/dts/r8a7790.dtsi b/arch/arm/boot/dts/r8a7790.dtsi
index 9997e7dfabe2250c..d18558f211022826 100644
--- a/arch/arm/boot/dts/r8a7790.dtsi
+++ b/arch/arm/boot/dts/r8a7790.dtsi
@@ -44,6 +44,7 @@
cpus {
#address-cells = <1>;
#size-cells = <0>;
+   enable-method = "renesas,apmu";
 
cpu0: cpu@0 {
device_type = "cpu";
@@ -164,6 +165,18 @@
};
};
 
+   apmu@e6151000 {
+   compatible = "renesas,r8a7790-apmu", "renesas,apmu";
+   reg = <0 0xe6151000 0 0x188>;
+   cpus = <   >;
+   };
+
+   apmu@e6152000 {
+   compatible = "renesas,r8a7790-apmu", "renesas,apmu";
+   reg = <0 0xe6152000 0 0x188>;
+   cpus = <   >;
+   };
+
gic: interrupt-controller@f1001000 {
compatible = "arm,gic-400";
#interrupt-cells = <3>;
-- 
1.9.1

Re: [PATCH 0/4] Initial r8a7796 PFC support

2016-06-28 Thread Geert Uytterhoeven 
Hi Uli,

On Tue, Jun 28, 2016 at 11:34 AM, Ulrich Hecht
 wrote:
> This implements a minimal set of PFC functionality for the M3 and sits on
> top of renesas-drivers-2016-06-21-v4.7-rc4.  It includes the SCIF pin groups
> and enables pin control for the serial console (SCIF2) on the Salvator-X
> board.

Thanks, I've imported this into the topic/r8a7796-pfc-v1 branch of my
renesas-drivers repository.

Gr{oetje,eeting}s,

Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- ge...@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds

renesas-drivers-2016-06-28-v4.7-rc5

2016-06-28 Thread Geert Uytterhoeven 
I have pushed renesas-drivers-2016-06-28-v4.7-rc5 to
https://git.kernel.org/cgit/linux/kernel/git/geert/renesas-drivers.git

This tree is meant to ease development of platform support and drivers
for Renesas ARM SoCs. It is created by merging (a) the for-next branches
of various subsystem trees and (b) branches with driver code submitted
or planned for submission to maintainers into the development branch of
Simon Horman's renesas.git tree.

Today's version is based on renesas-devel-20160627-v4.7-rc5.

Included branches with driver code:
  - clk-renesas-for-v4.8
  - sh-pfc-for-v4.8
  - topic/r8a7796-clk-wdt-v1
  - topic/r8a7796-rwdt-v1
  - topic/rcar-dmac-niklas
  - topic/ipmmu-multi-arch-v4
  - topic/r8a7795-ipmmu-v2-rebased1
  - topic/r8a7796-ipmmu-v1-rebased1
  - topic/salvator-x-ipmmu-rfc-v3-rebased4
  - topic/spi-slave-v1
  - topic/apmu-dt-v5
  - 
git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas.git#topic/sdr104-v3
  - 
git://git.kernel.org/pub/scm/linux/kernel/git/wsa/linux.git#renesas/topic/pretimeout
  - topic/h3-pfc-set-voltage-v1-rebased2~1
  - https://git.ragnatech.se/linux#for-renesas-drivers
  - git://linuxtv.org/pinchartl/media.git#for/renesas-drivers
  - topic/fcpf-v1-rebased4
  - topic/r8a7796-pfc-v1

Included subsystem trees:
  - git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm.git#linux-next
  - git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux.git#clk-next
  - 
git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl.git#for-next
  - git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio.git#for-next
  - git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi.git#for-next
  - git://git.infradead.org/users/dedekind/l2-mtd-2.6.git#master
  - git://git.kernel.org/pub/scm/linux/kernel/git/davem/net-next.git#master
  - git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/tty.git#tty-next
  - git://git.kernel.org/pub/scm/linux/kernel/git/wsa/linux.git#i2c/for-next
  - git://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git#for-next
  - git://git.kernel.org/pub/scm/linux/kernel/git/mkl/linux-can-next.git#master
  - git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb.git#usb-next
  - git://people.freedesktop.org/~airlied/linux#drm-next
  - git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu.git#next
  - git://linuxtv.org/mchehab/media-next.git#master
  - git://git.kernel.org/pub/scm/linux/kernel/git/cjb/mmc.git#mmc-next
  - git://git.linaro.org/people/ulf.hansson/mmc.git#next
  - 
git://git.kernel.org/pub/scm/linux/kernel/git/thierry.reding/linux-pwm.git#for-next
  - git://git.linaro.org/people/daniel.lezcano/linux.git#clockevents/next
  - git://git.kernel.org/pub/scm/linux/kernel/git/balbi/usb.git#testing/next
  - git://git.kernel.org/pub/scm/linux/kernel/git/djbw/dmaengine.git#next
  - git://git.infradead.org/users/vkoul/slave-dma.git#next
  - 
git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/staging.git#staging-next
  - git://git.armlinux.org.uk/~rmk/linux-arm.git#for-next
  - git://git.kernel.org/pub/scm/linux/kernel/git/rzhang/linux.git#next
  - git://git.kernel.org/pub/scm/linux/kernel/git/broonie/regmap.git#for-next
  - git://git.infradead.org/users/jcooper/linux.git#irqchip/for-next
  - git://git.kernel.org/pub/scm/linux/kernel/git/tomba/linux.git#for-next
  - git://git.kernel.org/pub/scm/linux/kernel/git/tj/libata.git#for-next
  - git://git.infradead.org/battery-2.6.git#master
  - git://www.linux-watchdog.org/linux-watchdog-next.git#master
  - git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc.git#for-next
  - git://git.kernel.org/pub/scm/linux/kernel/git/broonie/regulator.git#for-next
  - git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux.git#for-next/core
  - git://anongit.freedesktop.org/drm-intel#topic/drm-misc
  - git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci.git#next
  - git://git.kernel.org/pub/scm/linux/kernel/git/kishon/linux-phy.git#next
  - 
git://git.kernel.org/pub/scm/linux/kernel/git/evalenti/linux-soc-thermal.git#next

Gr{oetje,eeting}s,

Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- ge...@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds

Re: [PATCH] [media] rcar-csi2: add Renesas R-Car MIPI CSI-2 driver

2016-06-28 Thread Geert Uytterhoeven 
Hi Niklas,

On Mon, Jun 27, 2016 at 7:45 PM, Niklas Söderlund
 wrote:
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/media/rcar-csi2.txt
> @@ -0,0 +1,79 @@
> +Renesas R-Car MIPI CSI-2 driver (rcar-csi2)
> +---
> +
> +The rcar-csi2 device provides MIPI CSI-2 capabilities for the Renesas R-Car
> +family of devices. It is to be used in conjunction with the rcar-vin driver 
> which
> +provides the video input capabilities.
> +
> + - compatible: Must be one or more of the following
> +   - "renesas,csi2-r8a7795" for the R8A7795 device

Please use "renesas,-" for new bindings, i.e.
"renesas,r8a7795-csi2".

> +   - "renesas,rcar-gen3-csi2" for a generic R-Car Gen3 compatible device.

Gr{oetje,eeting}s,

Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- ge...@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds

Re: [PATCH v4 3/8] media: rcar_vin: Use correct pad number in try_fmt

2016-06-28 Thread Geert Uytterhoeven 
Hi Mauro,

On Tue, Jun 28, 2016 at 1:32 PM, Mauro Carvalho Chehab
 wrote:
> Em Wed, 11 May 2016 16:02:51 +0200
> Ulrich Hecht  escreveu:
>
>> Fix rcar_vin_try_fmt's use of an inappropriate pad number when calling
>> the subdev set_fmt function - for the ADV7612, IDs should be non-zero.
>>
>> Signed-off-by: William Towle 
>> Reviewed-by: Rob Taylor 
>> Acked-by: Hans Verkuil 
>> [uli: adapted to rcar-vin rewrite]
>
> Please use [email@domain: some revierwer note], as stated at 
> Documentation/SubmittingPatches.

"While there is nothing mandatory about this, it
 seems like prepending the description with your mail and/or name, all
 enclosed in square brackets, is noticeable enough to make it obvious that
 you are responsible for last-minute changes."

Hence a name should be sufficient.

Gr{oetje,eeting}s,

Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- ge...@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds

Re: [PATCH v4 3/8] media: rcar_vin: Use correct pad number in try_fmt

2016-06-28 Thread Mauro Carvalho Chehab 
Em Wed, 11 May 2016 16:02:51 +0200
Ulrich Hecht  escreveu:

> Fix rcar_vin_try_fmt's use of an inappropriate pad number when calling
> the subdev set_fmt function - for the ADV7612, IDs should be non-zero.
> 
> Signed-off-by: William Towle 
> Reviewed-by: Rob Taylor 
> Acked-by: Hans Verkuil 
> [uli: adapted to rcar-vin rewrite]

Please use [email@domain: some revierwer note], as stated at 
Documentation/SubmittingPatches.

> Signed-off-by: Ulrich Hecht 

This patch breaks compilation:

drivers/media/platform/rcar-vin/rcar-v4l2.c: In function 
'__rvin_try_format_source':
drivers/media/platform/rcar-vin/rcar-v4l2.c:115:18: error: 'struct rvin_dev' 
has no member named 'src_pad_idx'
  format.pad = vin->src_pad_idx;
  ^~



> ---
>  drivers/media/platform/rcar-vin/rcar-v4l2.c | 14 +++---
>  1 file changed, 11 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/media/platform/rcar-vin/rcar-v4l2.c 
> b/drivers/media/platform/rcar-vin/rcar-v4l2.c
> index 0bc4487..42dbd35 100644
> --- a/drivers/media/platform/rcar-vin/rcar-v4l2.c
> +++ b/drivers/media/platform/rcar-vin/rcar-v4l2.c
> @@ -98,7 +98,7 @@ static int __rvin_try_format_source(struct rvin_dev *vin,
>   struct rvin_source_fmt *source)
>  {
>   struct v4l2_subdev *sd;
> - struct v4l2_subdev_pad_config pad_cfg;
> + struct v4l2_subdev_pad_config *pad_cfg;
>   struct v4l2_subdev_format format = {
>   .which = which,
>   };
> @@ -108,10 +108,16 @@ static int __rvin_try_format_source(struct rvin_dev 
> *vin,
>  
>   v4l2_fill_mbus_format(, pix, vin->source.code);
>  
> + pad_cfg = v4l2_subdev_alloc_pad_config(sd);
> + if (pad_cfg == NULL)
> + return -ENOMEM;
> +
> + format.pad = vin->src_pad_idx;
> +
>   ret = v4l2_device_call_until_err(sd->v4l2_dev, 0, pad, set_fmt,
> -  _cfg, );
> +  pad_cfg, );
>   if (ret < 0)
> - return ret;
> + goto cleanup;
>  
>   v4l2_fill_pix_format(pix, );
>  
> @@ -121,6 +127,8 @@ static int __rvin_try_format_source(struct rvin_dev *vin,
>   vin_dbg(vin, "Source resolution: %ux%u\n", source->width,
>   source->height);
>  
> +cleanup:
> + v4l2_subdev_free_pad_config(pad_cfg);
>   return 0;
>  }
>  



Thanks,
Mauro

Re: [PATCH 4/4] arm64: dts: r8a7795: salvator: add serial console pins

2016-06-28 Thread Ulrich Hecht 
That should have said r8a7796, of course... :(

CU
Uli

On Tue, Jun 28, 2016 at 11:34 AM, Ulrich Hecht
 wrote:
> Adds pin control for SCIF2.
>
> Signed-off-by: Ulrich Hecht 
> ---
>  arch/arm64/boot/dts/renesas/r8a7796-salvator-x.dts | 9 +
>  1 file changed, 9 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/renesas/r8a7796-salvator-x.dts 
> b/arch/arm64/boot/dts/renesas/r8a7796-salvator-x.dts
> index 9c52613..10fceaf 100644
> --- a/arch/arm64/boot/dts/renesas/r8a7796-salvator-x.dts
> +++ b/arch/arm64/boot/dts/renesas/r8a7796-salvator-x.dts
> @@ -31,11 +31,20 @@
> };
>  };
>
> + {
> +   scif2_pins: scif2 {
> +   groups = "scif2_data_a";
> +   function = "scif2";
> +   };
> +};
> +
>  _clk {
> clock-frequency = <1666>;
>  };
>
>   {
> +   pinctrl-0 = <_pins>;
> +   pinctrl-names = "default";
> status = "okay";
>  };
>
> --
> 2.7.4
>

[PATCH 4/4] arm64: dts: r8a7795: salvator: add serial console pins

2016-06-28 Thread Ulrich Hecht 
Adds pin control for SCIF2.

Signed-off-by: Ulrich Hecht 
---
 arch/arm64/boot/dts/renesas/r8a7796-salvator-x.dts | 9 +
 1 file changed, 9 insertions(+)

diff --git a/arch/arm64/boot/dts/renesas/r8a7796-salvator-x.dts 
b/arch/arm64/boot/dts/renesas/r8a7796-salvator-x.dts
index 9c52613..10fceaf 100644
--- a/arch/arm64/boot/dts/renesas/r8a7796-salvator-x.dts
+++ b/arch/arm64/boot/dts/renesas/r8a7796-salvator-x.dts
@@ -31,11 +31,20 @@
};
 };
 
+ {
+   scif2_pins: scif2 {
+   groups = "scif2_data_a";
+   function = "scif2";
+   };
+};
+
 _clk {
clock-frequency = <1666>;
 };
 
  {
+   pinctrl-0 = <_pins>;
+   pinctrl-names = "default";
status = "okay";
 };
 
-- 
2.7.4

[PATCH 0/4] Initial r8a7796 PFC support

2016-06-28 Thread Ulrich Hecht 
Hi!

This implements a minimal set of PFC functionality for the M3 and sits on
top of renesas-drivers-2016-06-21-v4.7-rc4.  It includes the SCIF pin groups
and enables pin control for the serial console (SCIF2) on the Salvator-X
board.

CU
Uli


Takeshi Kihara (3):
  pinctrl: sh-pfc: Initial R8A7796 PFC support
  pinctrl: sh-pfc: r8a7796: Add SCIF pins, groups and functions
  arm64: dts: r8a7796: Add pinctrl device node

Ulrich Hecht (1):
  arm64: dts: r8a7795: salvator: add serial console pins

 .../bindings/pinctrl/renesas,pfc-pinctrl.txt   |1 +
 arch/arm64/boot/dts/renesas/r8a7796-salvator-x.dts |9 +
 arch/arm64/boot/dts/renesas/r8a7796.dtsi   |5 +
 drivers/pinctrl/sh-pfc/Kconfig |5 +
 drivers/pinctrl/sh-pfc/Makefile|1 +
 drivers/pinctrl/sh-pfc/core.c  |6 +
 drivers/pinctrl/sh-pfc/pfc-r8a7796.c   | 2348 
 drivers/pinctrl/sh-pfc/sh_pfc.h|   10 +-
 8 files changed, 2383 insertions(+), 2 deletions(-)
 create mode 100644 drivers/pinctrl/sh-pfc/pfc-r8a7796.c

-- 
2.7.4

[PATCH 2/4] pinctrl: sh-pfc: r8a7796: Add SCIF pins, groups and functions

2016-06-28 Thread Ulrich Hecht 
From: Takeshi Kihara 

This patch adds SCIF{0,1,2,3,4,5} pins, groups and functions to R8A7796
SoC.

Signed-off-by: Takeshi Kihara 
---
 drivers/pinctrl/sh-pfc/pfc-r8a7796.c | 276 +++
 1 file changed, 276 insertions(+)

diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7796.c 
b/drivers/pinctrl/sh-pfc/pfc-r8a7796.c
index b510937..939e3fc 100644
--- a/drivers/pinctrl/sh-pfc/pfc-r8a7796.c
+++ b/drivers/pinctrl/sh-pfc/pfc-r8a7796.c
@@ -1486,10 +1486,286 @@ static const struct sh_pfc_pin pinmux_pins[] = {
PINMUX_GPIO_GP_ALL(),
 };
 
+/* - SCIF0 -- 
*/
+static const unsigned int scif0_data_pins[] = {
+   /* RX, TX */
+   RCAR_GP_PIN(5, 1), RCAR_GP_PIN(5, 2),
+};
+static const unsigned int scif0_data_mux[] = {
+   RX0_MARK, TX0_MARK,
+};
+static const unsigned int scif0_clk_pins[] = {
+   /* SCK */
+   RCAR_GP_PIN(5, 0),
+};
+static const unsigned int scif0_clk_mux[] = {
+   SCK0_MARK,
+};
+static const unsigned int scif0_ctrl_pins[] = {
+   /* RTS, CTS */
+   RCAR_GP_PIN(5, 4), RCAR_GP_PIN(5, 3),
+};
+static const unsigned int scif0_ctrl_mux[] = {
+   RTS0_N_TANS_MARK, CTS0_N_MARK,
+};
+/* - SCIF1 -- 
*/
+static const unsigned int scif1_data_a_pins[] = {
+   /* RX, TX */
+   RCAR_GP_PIN(5, 5), RCAR_GP_PIN(5, 6),
+};
+static const unsigned int scif1_data_a_mux[] = {
+   RX1_A_MARK, TX1_A_MARK,
+};
+static const unsigned int scif1_clk_pins[] = {
+   /* SCK */
+   RCAR_GP_PIN(6, 21),
+};
+static const unsigned int scif1_clk_mux[] = {
+   SCK1_MARK,
+};
+static const unsigned int scif1_ctrl_pins[] = {
+   /* RTS, CTS */
+   RCAR_GP_PIN(5, 8), RCAR_GP_PIN(5, 7),
+};
+static const unsigned int scif1_ctrl_mux[] = {
+   RTS1_N_TANS_MARK, CTS1_N_MARK,
+};
+
+static const unsigned int scif1_data_b_pins[] = {
+   /* RX, TX */
+   RCAR_GP_PIN(5, 24), RCAR_GP_PIN(5, 25),
+};
+static const unsigned int scif1_data_b_mux[] = {
+   RX1_B_MARK, TX1_B_MARK,
+};
+/* - SCIF2 -- 
*/
+static const unsigned int scif2_data_a_pins[] = {
+   /* RX, TX */
+   RCAR_GP_PIN(5, 11), RCAR_GP_PIN(5, 10),
+};
+static const unsigned int scif2_data_a_mux[] = {
+   RX2_A_MARK, TX2_A_MARK,
+};
+static const unsigned int scif2_clk_pins[] = {
+   /* SCK */
+   RCAR_GP_PIN(5, 9),
+};
+static const unsigned int scif2_clk_mux[] = {
+   SCK2_MARK,
+};
+static const unsigned int scif2_data_b_pins[] = {
+   /* RX, TX */
+   RCAR_GP_PIN(5, 15), RCAR_GP_PIN(5, 16),
+};
+static const unsigned int scif2_data_b_mux[] = {
+   RX2_B_MARK, TX2_B_MARK,
+};
+/* - SCIF3 -- 
*/
+static const unsigned int scif3_data_a_pins[] = {
+   /* RX, TX */
+   RCAR_GP_PIN(1, 23), RCAR_GP_PIN(1, 24),
+};
+static const unsigned int scif3_data_a_mux[] = {
+   RX3_A_MARK, TX3_A_MARK,
+};
+static const unsigned int scif3_clk_pins[] = {
+   /* SCK */
+   RCAR_GP_PIN(1, 22),
+};
+static const unsigned int scif3_clk_mux[] = {
+   SCK3_MARK,
+};
+static const unsigned int scif3_ctrl_pins[] = {
+   /* RTS, CTS */
+   RCAR_GP_PIN(1, 26), RCAR_GP_PIN(1, 25),
+};
+static const unsigned int scif3_ctrl_mux[] = {
+   RTS3_N_TANS_MARK, CTS3_N_MARK,
+};
+static const unsigned int scif3_data_b_pins[] = {
+   /* RX, TX */
+   RCAR_GP_PIN(1, 8), RCAR_GP_PIN(1, 11),
+};
+static const unsigned int scif3_data_b_mux[] = {
+   RX3_B_MARK, TX3_B_MARK,
+};
+/* - SCIF4 -- 
*/
+static const unsigned int scif4_data_a_pins[] = {
+   /* RX, TX */
+   RCAR_GP_PIN(2, 11), RCAR_GP_PIN(2, 12),
+};
+static const unsigned int scif4_data_a_mux[] = {
+   RX4_A_MARK, TX4_A_MARK,
+};
+static const unsigned int scif4_clk_a_pins[] = {
+   /* SCK */
+   RCAR_GP_PIN(2, 10),
+};
+static const unsigned int scif4_clk_a_mux[] = {
+   SCK4_A_MARK,
+};
+static const unsigned int scif4_ctrl_a_pins[] = {
+   /* RTS, CTS */
+   RCAR_GP_PIN(2, 14), RCAR_GP_PIN(2, 13),
+};
+static const unsigned int scif4_ctrl_a_mux[] = {
+   RTS4_N_TANS_A_MARK, CTS4_N_A_MARK,
+};
+static const unsigned int scif4_data_b_pins[] = {
+   /* RX, TX */
+   RCAR_GP_PIN(1, 6), RCAR_GP_PIN(1, 7),
+};
+static const unsigned int scif4_data_b_mux[] = {
+   RX4_B_MARK, TX4_B_MARK,
+};
+static const unsigned int scif4_clk_b_pins[] = {
+   /* SCK */
+   RCAR_GP_PIN(1, 5),
+};
+static const unsigned int scif4_clk_b_mux[] = {
+   SCK4_B_MARK,
+};
+static const unsigned int scif4_ctrl_b_pins[] = {
+   /* RTS, CTS */
+   RCAR_GP_PIN(1, 10), RCAR_GP_PIN(1, 9),
+};
+static const unsigned int scif4_ctrl_b_mux[] = {
+

[PATCH 3/4] arm64: dts: r8a7796: Add pinctrl device node

2016-06-28 Thread Ulrich Hecht 
From: Takeshi Kihara 

This patch adds pinctrl device node for R8A7796 SoC.

Signed-off-by: Takeshi Kihara 
---
 arch/arm64/boot/dts/renesas/r8a7796.dtsi | 5 +
 1 file changed, 5 insertions(+)

diff --git a/arch/arm64/boot/dts/renesas/r8a7796.dtsi 
b/arch/arm64/boot/dts/renesas/r8a7796.dtsi
index fab61ed..31b370c 100644
--- a/arch/arm64/boot/dts/renesas/r8a7796.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a7796.dtsi
@@ -98,6 +98,11 @@
(GIC_CPU_MASK_SIMPLE(1) | 
IRQ_TYPE_LEVEL_LOW)>;
};
 
+   pfc: pfc@e606 {
+   compatible = "renesas,pfc-r8a7796";
+   reg = <0 0xe606 0 0x50c>;
+   };
+
cpg: clock-controller@e615 {
compatible = "renesas,r8a7796-cpg-mssr";
reg = <0 0xe615 0 0x1000>;
-- 
2.7.4

Re: Boot failure on emev2/kzm9d (was: Re: [PATCH v2 11/11] mm/slab: lockless decision to grow cache)

2016-06-28 Thread Joonsoo Kim 
On Mon, Jun 27, 2016 at 05:12:43PM -0700, Paul E. McKenney wrote:
> On Wed, Jun 22, 2016 at 07:53:29PM -0700, Paul E. McKenney wrote:
> > On Wed, Jun 22, 2016 at 07:47:42PM -0700, Paul E. McKenney wrote:
> > > On Thu, Jun 23, 2016 at 11:37:56AM +0900, Joonsoo Kim wrote:
> > > > On Wed, Jun 22, 2016 at 05:49:35PM -0700, Paul E. McKenney wrote:
> > > > > On Wed, Jun 22, 2016 at 12:08:59PM -0700, Paul E. McKenney wrote:
> > > > > > On Wed, Jun 22, 2016 at 05:01:35PM +0200, Geert Uytterhoeven wrote:
> > > > > > > On Wed, Jun 22, 2016 at 2:52 AM, Joonsoo Kim 
> > > > > > >  wrote:
> > > > > > > > Could you try below patch to check who causes the hang?
> > > > > > > >
> > > > > > > > And, if sysalt-t works when hang, could you get sysalt-t 
> > > > > > > > output? I haven't
> > > > > > > > used it before but Paul could find some culprit on it. :)
> > > > > > > >
> > > > > > > > Thanks.
> > > > > > > >
> > > > > > > >
> > > > > > > > ->8-
> > > > > > > > diff --git a/mm/slab.c b/mm/slab.c
> > > > > > > > index 763096a..9652d38 100644
> > > > > > > > --- a/mm/slab.c
> > > > > > > > +++ b/mm/slab.c
> > > > > > > > @@ -964,8 +964,13 @@ static int setup_kmem_cache_node(struct 
> > > > > > > > kmem_cache *cachep,
> > > > > > > >  * guaranteed to be valid until irq is re-enabled, 
> > > > > > > > because it will be
> > > > > > > >  * freed after synchronize_sched().
> > > > > > > >  */
> > > > > > > > -   if (force_change)
> > > > > > > > +   if (force_change) {
> > > > > > > > +   if (num_online_cpus() > 1)
> > > > > > > > +   dump_stack();
> > > > > > > > synchronize_sched();
> > > > > > > > +   if (num_online_cpus() > 1)
> > > > > > > > +   dump_stack();
> > > > > > > > +   }
> > > > > > > 
> > > > > > > I've only added the first one, as I would never see the second 
> > > > > > > one. All of
> > > > > > > this happens before the serial console is activated, earlycon is 
> > > > > > > not supported,
> > > > > > > and I only have remote access.
> > > > > > > 
> > > > > > > Brought up 2 CPUs
> > > > > > > SMP: Total of 2 processors activated (2132.00 BogoMIPS).
> > > > > > > CPU: All CPU(s) started in SVC mode.
> > > > > > > CPU: 0 PID: 1 Comm: swapper/0 Not tainted
> > > > > > > 4.7.0-rc4-kzm9d-00404-g4a235e6dde4404dd-dirty #89
> > > > > > > Hardware name: Generic Emma Mobile EV2 (Flattened Device Tree)
> > > > > > > [] (unwind_backtrace) from [] 
> > > > > > > (show_stack+0x10/0x14)
> > > > > > > [] (show_stack) from [] (dump_stack+0x7c/0x9c)
> > > > > > > [] (dump_stack) from [] 
> > > > > > > (setup_kmem_cache_node+0x140/0x170)
> > > > > > > [] (setup_kmem_cache_node) from []
> > > > > > > (__do_tune_cpucache+0xf4/0x114)
> > > > > > > [] (__do_tune_cpucache) from [] 
> > > > > > > (enable_cpucache+0xf8/0x148)
> > > > > > > [] (enable_cpucache) from []
> > > > > > > (__kmem_cache_create+0x1a8/0x1d0)
> > > > > > > [] (__kmem_cache_create) from []
> > > > > > > (kmem_cache_create+0xbc/0x190)
> > > > > > > [] (kmem_cache_create) from [] 
> > > > > > > (shmem_init+0x34/0xb0)
> > > > > > > [] (shmem_init) from [] 
> > > > > > > (kernel_init_freeable+0x98/0x1ec)
> > > > > > > [] (kernel_init_freeable) from [] 
> > > > > > > (kernel_init+0x8/0x110)
> > > > > > > [] (kernel_init) from [] 
> > > > > > > (ret_from_fork+0x14/0x3c)
> > > > > > > devtmpfs: initialized
> > > > > > 
> > > > > > I don't see anything here that would prevent grace periods from 
> > > > > > completing.
> > > > > > 
> > > > > > The CPUs are using the normal hotplug sequence to come online, 
> > > > > > correct?
> > > > > 
> > > > > And either way, could you please apply the patch below and then
> > > > > invoke rcu_dump_rcu_sched_tree() just before the offending call to
> > > > > synchronize_sched()?  That will tell me what CPUs RCU believes exist,
> > > > > and perhaps also which CPU is holding it up.
> > > > 
> > > > I can't find rcu_dump_rcu_sched_tree(). Do you mean
> > > > rcu_dump_rcu_node_tree()? Anyway, there is no patch below so I attach
> > > > one which does what Paul want, maybe.
> > > 
> > > One of those days, I guess!  :-/
> > > 
> > > Your patch is exactly what I intended to send, thank you!
> > 
> > Ah, but your telepathy was not sufficient to intuit the additional
> > information I need.  Please see the patch at the end.  Your hunk
> > in mm/slab.c is needed on top of my patch.
> > 
> > So I am clearly having difficulties reading as well as including patches
> > today...
> 
> Just following up, any news using my diagnostic patch?

Hello, Paul.

Unfortunately, I have no hardware to re-generate it, so we need to wait Geert's
feedback.

Thanks.

[PATCH] sh-sci: Separate sci_port on earlycon

2016-06-28 Thread Yoshinori Sato 
sci0 and earlycon use same sci_port.
So earlycon dead after sci0 initialize.

This fix assign separate sci_port for earlycon.

Signed-off-by: Yoshinori Sato 
---
 drivers/tty/serial/sh-sci.c | 24 +++-
 1 file changed, 15 insertions(+), 9 deletions(-)

diff --git a/drivers/tty/serial/sh-sci.c b/drivers/tty/serial/sh-sci.c
index 5a73620..210c95e 100644
--- a/drivers/tty/serial/sh-sci.c
+++ b/drivers/tty/serial/sh-sci.c
@@ -146,6 +146,8 @@ struct sci_port {
 #define SCI_NPORTS CONFIG_SERIAL_SH_SCI_NR_UARTS
 
 static struct sci_port sci_ports[SCI_NPORTS];
+#define EARLY_INDEX 256
+static struct sci_port earlycon_port;
 static struct uart_driver sci_uart_driver;
 
 static inline struct sci_port *
@@ -2510,7 +2512,6 @@ static int sci_init_single(struct platform_device *dev,
int ret;
 
sci_port->cfg   = p;
-
port->ops   = _uart_ops;
port->iotype= UPIO_MEM;
port->line  = index;
@@ -2668,12 +2669,16 @@ static void serial_console_putchar(struct uart_port 
*port, int ch)
 static void serial_console_write(struct console *co, const char *s,
 unsigned count)
 {
-   struct sci_port *sci_port = _ports[co->index];
-   struct uart_port *port = _port->port;
+   struct sci_port *sci_port;
+   struct uart_port *port;
unsigned short bits, ctrl, ctrl_temp;
unsigned long flags;
int locked = 1;
 
+   sci_port = (co->index != EARLY_INDEX) ? 
+   _ports[co->index] :  _port;
+   port = _port->port;
+
local_irq_save(flags);
 #if defined(SUPPORT_SYSRQ)
if (port->sysrq)
@@ -3036,13 +3041,14 @@ static int __init early_console_setup(struct 
earlycon_device *device,
device->port.serial_in = sci_serial_in;
device->port.serial_out = sci_serial_out;
device->port.type = type;
-   memcpy(_ports[0].port, >port, sizeof(struct uart_port));
-   sci_ports[0].cfg = _cfg;
-   sci_ports[0].cfg->type = type;
-   sci_probe_regmap(sci_ports[0].cfg);
-   port_cfg.scscr = sci_serial_in(_ports[0].port, SCSCR) |
+   device->con->index = EARLY_INDEX;
+   memcpy(_port.port, >port, sizeof(struct uart_port));
+   earlycon_port.cfg = _cfg;
+   earlycon_port.cfg->type = type;
+   sci_probe_regmap(earlycon_port.cfg);
+   port_cfg.scscr = sci_serial_in(_port.port, SCSCR) |
 SCSCR_RE | SCSCR_TE;
-   sci_serial_out(_ports[0].port, SCSCR, port_cfg.scscr);
+   sci_serial_out(_port.port, SCSCR, port_cfg.scscr);
 
device->con->write = serial_console_write;
return 0;
-- 
2.7.0