> > > This SWAP register exists on R-Car as well. Out of curiosity, what
> > > is the register value of 0xE804E0E4?
> >
> > 0xE804E0E4 = 0x0001
> >
> > So...something is there!
>
> I am quite convinced there is this BUSWIDTH register. If you are
> interested, try setting this to 0 and see if it
From: Kieran Bingham
The FDP1 is a de-interlacing module which converts interlaced video to
progressive video. It is also capable of performing pixel format conversion
between YCbCr/YUV formats and RGB formats.
Signed-off-by: Kieran Bingham
Hi Laurent,
Thanks for your reworking and improvements here.
The documentation additions look good.
Only one grammar fixup found inline in the struct fdp1_ctx which isn't
critical (and could have been from my original submission), so don't
worry about it unless there ends up being another
Hi Wolfram,
On Fri, Oct 21, 2016 at 11:56 PM, Wolfram Sang wrote:
>> For the VERSION register, the low byte is the version of the IP, but
>> the upper byte is a number that the design group that made the part
>
> I know. It is just that I haven't seen this one "in the wild"
Hi Laurent,
Thank you for the review comments.
> On Wednesday 12 Oct 2016 15:10:29 Ramesh Shanmugasundaram wrote:
> > This patch adds documentation for the three new SDR formats
> >
> > V4L2_SDR_FMT_SCU16BE
> > V4L2_SDR_FMT_SCU18BE
> > V4L2_SDR_FMT_SCU20BE
> >
> > Signed-off-by: Ramesh
Hi Laurent,
On Mon, Oct 24, 2016 at 11:46 AM, Laurent Pinchart
wrote:
> On Monday 24 Oct 2016 11:14:11 Geert Uytterhoeven wrote:
>> On Mon, Oct 24, 2016 at 11:03 AM, Laurent Pinchart wrote:
>> > --- /dev/null
>> > +++
On Mon, Oct 24, 2016 at 11:13 AM, Xuan Truong Nguyen
wrote:
>> This is with shmobile_defconfig?
>
> yes. we also attach the configs file we used
> (lager-scif-pio-v4.9-rc2.config)
>
>> Does it work better if you enable CONFIG_SERIAL_SH_SCI_DMA?
>
> yes, it's better a little
Hi Hans,
On Friday 21 Oct 2016 16:34:50 Hans Verkuil wrote:
> On 09/08/16 00:25, Laurent Pinchart wrote:
> > The menu control selects the operation mode of a video deinterlacer. The
> > menu entries are driver specific.
> >
> > Signed-off-by: Laurent Pinchart
> >
Hello,
Here's the fourth version of the Renesas R-Car FDP1 driver.
The FDP1 (Fine Display Processor) is a hardware memory-to-memory de-interlacer
device, with capability to convert from various YCbCr/YUV formats to both
YCbCr/YUV and RGB formats at the same time as converting interlaced content
The menu control selects the operation mode of a video deinterlacer. The
menu entries are driver specific.
Signed-off-by: Laurent Pinchart
Reviewed-by: Kieran Bingham
Acked-by: Hans Verkuil
---
Changes since
The r8a7796 has a single FDP1 instance.
Signed-off-by: Laurent Pinchart
---
arch/arm64/boot/dts/renesas/r8a7796.dtsi | 9 +
1 file changed, 9 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/r8a7796.dtsi
From: Kieran Bingham
The FDP1 is a de-interlacing module which converts interlaced video to
progressive video. It is also capable of performing pixel format conversion
between YCbCr/YUV formats and RGB formats.
Reviewed-by: Laurent Pinchart
Hi Sudeep,
On Mon, Oct 24, 2016 at 10:57 AM, Sudeep Holla wrote:
> On 24/10/16 09:09, Geert Uytterhoeven wrote:
>> On Thu, Oct 20, 2016 at 4:21 PM, Sudeep Holla
>> wrote:
>>> On 20/10/16 14:38, Kevin Brodsky wrote:
>>>
>>> [...]
>>>
Thanks
On 24/10/16 09:09, Geert Uytterhoeven wrote:
On Thu, Oct 20, 2016 at 4:21 PM, Sudeep Holla wrote:
On 20/10/16 14:38, Kevin Brodsky wrote:
[...]
Thanks for the heads-up! I'll rebase on 4.9-rc1 and see what needs to be
done.
Just be aware that v4.9-rc1 doesn't have
Fix off-by-one (row and/or register) errors in links to Peripheral
Function Select Register bitfields from GPIO/Peripheral Function Select
Register 4 macros for SDHI2 and SDHI3 pins.
Based on rev. 0.52E of the R-Car Gen3 User's Manual.
Signed-off-by: Geert Uytterhoeven
On Thu, Oct 20, 2016 at 4:21 PM, Sudeep Holla wrote:
> On 20/10/16 14:38, Kevin Brodsky wrote:
>
> [...]
>
>>
>> Thanks for the heads-up! I'll rebase on 4.9-rc1 and see what needs to be
>> done.
>>
>
> Just be aware that v4.9-rc1 doesn't have commit 9cfb38a7ba5a
>
On Fri, Oct 21, 2016 at 10:53:19AM +0100, Mark Rutland wrote:
> On Fri, Oct 21, 2016 at 11:16:05AM +0200, Geert Uytterhoeven wrote:
> > Hi Simon, Magnus,
> >
> > As of commit 9c0da3cc61f1233c ("ARM: dts: explicitly mark skeleton.dtsi
> > as deprecated"), including skeleton.dtsi is deprecated.
On Fri, Oct 21, 2016 at 03:27:43PM +0300, Laurent Pinchart wrote:
> DU0 uses an externally provided clock, but the corresponding pin isn't
> correctly muxed. Fix it.
>
> Signed-off-by: Laurent Pinchart
Thanks, I have queued this up.
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