Re: [PATCH 3/3] tests: add none adjoined hue areas test for HGT

On Tuesday 04 Oct 2016 15:09:15 Niklas Söderlund wrote: > From: Niklas Söderlund > > The HGT can be configured in such a way that the 6 user configurable hue > areas are not joined next to each other. In such cases a hue value > outside of a hue area should

Re: [PATCH 2/3] tests: add hue area wraparound test for HGT

Hi Niklas, Thank you for the patch. On Tuesday 04 Oct 2016 15:09:14 Niklas Söderlund wrote: > From: Niklas Söderlund > > One configuration for HGT histograms are where hue area 0 is wrapped s/is/ > around the hue input value space (0-255), for example

Re: [PATCH v6 05/07] iommu/ipmmu-vmsa: Add new IOMMU_DOMAIN_DMA ops

Hi Robin, On Friday 11 Nov 2016 14:44:29 Robin Murphy wrote: > On 11/11/16 01:50, Laurent Pinchart wrote: > > On Friday 21 Oct 2016 18:52:53 Robin Murphy wrote: > >> On 20/10/16 00:36, Magnus Damm wrote: > >>> From: Magnus Damm > >>> > >>> Introduce an alternative

Re: [PATCH] pinctrl: sh-pfc: r8a7796: Add DU support

Hi Niklas, Thank you for the patch. On Friday 11 Nov 2016 21:40:03 Niklas Söderlund wrote: > From: Niklas Söderlund > > Only the DU parallel RGB output signals are included, HDMI and TCON pins > will be added in separate groups. Based on a similar patch

Re: [PATCHv2 4/6] pinctrl: sh-pfc: r8a7795: Use lookup function for bias data

Hi Niklas, Thank you for the patch. On Friday 11 Nov 2016 21:30:19 Niklas Söderlund wrote: > From: Niklas Söderlund > > There is a bug in the r8a7795 bias code where a WARN() is trigged > anytime a pin from PUEN0/PUD0is accessed. > > # cat

Re: [PATCHv2 2/6] pinctrl: sh-pfc: Add helper to handle bias lookup table

Hi Niklas, Thank you for the patch. On Friday 11 Nov 2016 21:30:17 Niklas Söderlund wrote: > From: Niklas Söderlund > > On some SoC there are no simple mapping of pins to bias register bits > and a lookup table is needed. This logic is already implemented

Re: [PATCHv2 3/6] pinctrl: sh-pfc: r8a7795: Simplify get bias logic

Hi Niklas, Thank you for the patch. On Friday 11 Nov 2016 21:30:18 Niklas Söderlund wrote: > From: Niklas Söderlund > > The last else statement is missing braces and there indentation level > can be reduced. > > Suggested-by: Laurent Pinchart

[PATCH 2/2] pinctrl: sh-pfc: r8a7796: Add bias pinconf support

From: Niklas Söderlund Implements pull-up and pull-down. On this SoC there is no simple mapping of GP pins to bias register bits, so we need a table. Signed-off-by: Niklas Söderlund ---

[PATCH 0/2] pinctrl: sh-pfc: r8a7796: Add drive strength and bias support

From: Niklas Söderlund Hi, These patches add drive strength and bias support for both GPIO and none GPIO pins to r8a7796. Similar to the none GPIO pins for r8a7795 the system to derive unique pin numbers are the R-Car M3SiP pin layout. Tested on M3-W

[PATCH 1/2] pinctrl: sh-pfc: r8a7796: Add drive strength support

From: Niklas Söderlund Define the drive strength registers for the R8A7796. Add pins which are not part of a GPIO bank nor can be muxed between different functions but which still allow for there drive-strength to be configured. Signed-off-by: Niklas

[PATCH] pinctrl: sh-pfc: r8a7796: Add DU support

From: Niklas Söderlund Only the DU parallel RGB output signals are included, HDMI and TCON pins will be added in separate groups. Based on a similar patch from Laurent Pinchart for the r8a7795 PFC driver. Signed-off-by: Niklas Söderlund

[PATCHv3 2/3] pinctrl: sh-pfc: r8a7795: Add group for AVB MDIO and MII pins

From: Niklas Söderlund Group the AVB pins into similar groups found in other sh-pfc drivers. The pins can not be muxed between functions other then AVB but their drive strength can be controlled. The group avb_mdc containing ADV_MDC and ADV_MDIO are on

[PATCHv3 3/3] pinctrl: sh-pfc: r8a7795: Add group for QSPI0 and QSPI1 pins

From: Niklas Söderlund Group the QSPI0 and QSPI1 pins into similar groups found in other sh-pfc drivers. The pins can not be muxed between functions other then QSPI but there drive strength can be controlled. Signed-off-by: Niklas Söderlund

[PATCHv3 1/3] pinctrl: sh-pfc: r8a7795: Support none GPIO pins with configurable drive-strength

From: Niklas Söderlund There are pins on the r8a7795 which are not part of a GPIO bank nor can be muxed between different functions. They do however allow for the drive-strength to be configured. Add those pins to the list of pins and to the drive-strength

[PATCHv3 0/3] pinctrl: sh-pfc: r8a7795: Support none GPIO pins with configurable drive-strength

From: Niklas Söderlund Hi, This series adds support to control the drive strength for none GPIO pins. All pins which can have its drive strength controlled is now supported. I have also added the new pins to the correct groups, or added groups to mimic

[PATCHv2 5/6] pinctrl: sh-pfc: r8a7778: Use lookup function for bias data

From: Niklas Söderlund Change the data structure and use the generic sh_pfc_pin_to_bias_info() function to get the register offset and bit information. Suggested-by: Laurent Pinchart Signed-off-by: Niklas Söderlund

[PATCHv2 6/6] pinctrl: sh-pfc: Support named pins with custom configuration

From: Niklas Söderlund Pins not associated with a GPIO port can still have other configuration parameters. Add a new macro SH_PFC_PIN_NAMED_CFG which allows for named pins to be declared with a set of configurations. The new macro is an modification of

[PATCHv2 4/6] pinctrl: sh-pfc: r8a7795: Use lookup function for bias data

From: Niklas Söderlund There is a bug in the r8a7795 bias code where a WARN() is trigged anytime a pin from PUEN0/PUD0is accessed. # cat /sys/kernel/debug/pinctrl/e606.pfc/pinconf-pins WARNING: CPU: 2 PID: 2391 at

[PATCHv2 0/6] pinctrl: sh-pfc: Fixups for bias handling and preparation for none GPIO pins

From: Niklas Söderlund Hi, This series fixes two issues I encounter for bias handling in the PFC while preparing my drive strength patch set. I also attached a new patch 6/6 that adds the macro SH_PFC_PIN_NAMED_CFG() and was previously part of the series

[PATCHv2 2/6] pinctrl: sh-pfc: Add helper to handle bias lookup table

From: Niklas Söderlund On some SoC there are no simple mapping of pins to bias register bits and a lookup table is needed. This logic is already implemented in some SoC specific drivers that could benefit from a generic implementation. Add helpers to deal

[PATCHv2 1/6] pinctrl: sh-pfc: Do not unconditionally support PIN_CONFIG_BIAS_DISABLE

From: Niklas Söderlund Always stating PIN_CONFIG_BIAS_DISABLE is supported gives untrue output when examining /sys/kernel/debug/pinctrl/e606.pfc/pinconf-pins if the operation get_bias() is implemented but the pin is not handled by the get_bias()

[PATCHv2 3/6] pinctrl: sh-pfc: r8a7795: Simplify get bias logic

From: Niklas Söderlund The last else statement is missing braces and there indentation level can be reduced. Suggested-by: Laurent Pinchart Signed-off-by: Niklas Söderlund ---

Re: [PATCH 01/10] drm: bridge/dw_hdmi: add dw hdmi i2c bus adapter support

Hi Ulrich, On 11/11/2016 07:07 PM, Ulrich Hecht wrote: From: Vladimir Zapolskiy The change adds support of internal HDMI I2C master controller, this subdevice is used by default, if "ddc-i2c-bus" DT property is omitted. The main purpose of this functionality is

[PATCH 09/10] arm64: dts: r8a7795: add HDMI support to DU

Signed-off-by: Ulrich Hecht --- arch/arm64/boot/dts/renesas/r8a7795.dtsi | 34 ++-- 1 file changed, 32 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/renesas/r8a7795.dtsi b/arch/arm64/boot/dts/renesas/r8a7795.dtsi

[PATCH 08/10] arm64: dts: salvator-x: Add DU pins, HDMI connectors and encoder

From: Koji Matsuoka Based on work by Koji Matsuoka. [geert: Re-add removed extal_clk] [geert: Modify existing du node instead of moving it around] [geert: Use generic pinctrl properties] Signed-off-by: Ulrich Hecht ---

[PATCH 06/10] drm: rcar-du: Fix display registers for R-Car Gen3

From: Koji Matsuoka Signed-off-by: Koji Matsuoka --- drivers/gpu/drm/rcar-du/rcar_du_drv.c | 3 ++- drivers/gpu/drm/rcar-du/rcar_du_group.c | 5 + drivers/gpu/drm/rcar-du/rcar_du_plane.c | 4 +++- 3 files changed, 10

[PATCH 07/10] arm64: dts: r8a7795: Add HDMI encoder support

Based on work by Koji Matsuoka. Signed-off-by: Ulrich Hecht --- arch/arm64/boot/dts/renesas/r8a7795.dtsi | 22 ++ 1 file changed, 22 insertions(+) diff --git a/arch/arm64/boot/dts/renesas/r8a7795.dtsi

[PATCH 10/10] dt-bindings: drm/bridge: Add renesas,rcar-dw-hdmi

Signed-off-by: Ulrich Hecht --- Documentation/devicetree/bindings/display/bridge/dw_hdmi.txt | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/display/bridge/dw_hdmi.txt

[PATCH 01/10] drm: bridge/dw_hdmi: add dw hdmi i2c bus adapter support

From: Vladimir Zapolskiy The change adds support of internal HDMI I2C master controller, this subdevice is used by default, if "ddc-i2c-bus" DT property is omitted. The main purpose of this functionality is to support reading EDID from an HDMI monitor on boards,

[PATCH 00/10] Renesas R8A7795/Salvator-X HDMI output

Hi! This implements HDMI output support for the Renesas R8A7795 (H3) SoC and Salvator-X board. It is based on mainline v4.9-rc4 and depends on Geert's "[PATCH v2 0/7] soc: renesas: Identify SoC and register with the SoC bus" series. It fixes two major issues in the previous RFC series: 1. It

[PATCH 03/10] drm: rcar-du: Add R8A7795 device support

From: Koji Matsuoka Signed-off-by: Koji Matsuoka --- drivers/gpu/drm/rcar-du/rcar_du_crtc.h | 4 +++- drivers/gpu/drm/rcar-du/rcar_du_drv.c | 14 -- drivers/gpu/drm/rcar-du/rcar_du_drv.h | 2 ++ 3 files changed, 17

[PATCH 05/10] drm: rcar-du: Add DPLL support

From: Koji Matsuoka The workaround of DPLLCR2 register is required at the time of H3(WS1.0) and H3(WS1.1). This patch adds procedure to apply the workaround by revision. Signed-off-by: Koji Matsuoka [uli: replace PRR hack with

Re: [PATCH 1/3] gen-image: support overlapping hue areas for HGT frames

Hi Niklas, Thank you for the patch. On Tuesday 04 Oct 2016 15:09:13 Niklas Söderlund wrote: > From: Niklas Söderlund > > The HGT can operate with hue areas which are not directly adjoined. In > this mode of operation hue values which are between two areas

Re: [PATCH v6 05/07] iommu/ipmmu-vmsa: Add new IOMMU_DOMAIN_DMA ops

Hi Laurent, On 11/11/16 01:50, Laurent Pinchart wrote: > Hi Robin, > > On Friday 21 Oct 2016 18:52:53 Robin Murphy wrote: >> On 20/10/16 00:36, Magnus Damm wrote: >>> From: Magnus Damm >>> >>> Introduce an alternative set of iommu_ops suitable for 64-bit ARM >>> as

Re: [RFC 5/5] doc_rst: media: New SDR formats SC16, SC18 & SC20

On 11/11/2016 02:57 PM, Laurent Pinchart wrote: > Hi Hans, > > On Friday 11 Nov 2016 14:53:58 Hans Verkuil wrote: >> On 11/10/2016 09:08 AM, Laurent Pinchart wrote: >>> Antti, Hans, ping ? Please see below. >>> >>> On Friday 04 Nov 2016 09:23:29 Ramesh Shanmugasundaram wrote: > On 11/02/2016

Re: [PATCH 2/5] media: i2c: max2175: Add MAX2175 support

On 11/11/2016 02:48 PM, Laurent Pinchart wrote: > Hi Hans, > > On Friday 11 Nov 2016 14:21:22 Hans Verkuil wrote: >> On 11/09/2016 04:44 PM, Ramesh Shanmugasundaram wrote: >>> This patch adds driver support for MAX2175 chip. This is Maxim >>> Integrated's RF to Bits tuner front end chip designed

Re: [RFC 5/5] doc_rst: media: New SDR formats SC16, SC18 & SC20

Hi Hans, On Friday 11 Nov 2016 14:53:58 Hans Verkuil wrote: > On 11/10/2016 09:08 AM, Laurent Pinchart wrote: > > Antti, Hans, ping ? Please see below. > > > > On Friday 04 Nov 2016 09:23:29 Ramesh Shanmugasundaram wrote: > >>> On 11/02/2016 10:58 PM, Laurent Pinchart wrote: > On Wednesday

Re: [RFC 5/5] doc_rst: media: New SDR formats SC16, SC18 & SC20

On 11/10/2016 09:08 AM, Laurent Pinchart wrote: > Antti, Hans, ping ? Please see below. > > On Friday 04 Nov 2016 09:23:29 Ramesh Shanmugasundaram wrote: >>> On 11/02/2016 10:58 PM, Laurent Pinchart wrote: On Wednesday 02 Nov 2016 09:00:00 Ramesh Shanmugasundaram wrote: >>> On Wednesday

Re: [PATCH 3/5] media: Add new SDR formats SC16, SC18 & SC20

Hi Hans, On Friday 11 Nov 2016 14:24:41 Hans Verkuil wrote: > On 11/09/2016 04:44 PM, Ramesh Shanmugasundaram wrote: > > This patch adds support for the three new SDR formats. These formats > > were prefixed with "sliced" indicating I data constitutes the top half and > > Q data constitutes the

Re: [PATCH 3/5] media: Add new SDR formats SC16, SC18 & SC20

Hi Hans, On Friday 11 Nov 2016 14:24:41 Hans Verkuil wrote: > On 11/09/2016 04:44 PM, Ramesh Shanmugasundaram wrote: > > This patch adds support for the three new SDR formats. These formats > > were prefixed with "sliced" indicating I data constitutes the top half and > > Q data constitutes the

Re: [PATCH 5/5] media: platform: rcar_drif: Add DRIF support

On 11/09/2016 04:44 PM, Ramesh Shanmugasundaram wrote: > This patch adds Digital Radio Interface (DRIF) support to R-Car Gen3 SoCs. > The driver exposes each instance of DRIF as a V4L2 SDR device. A DRIF > device represents a channel and each channel can have one or two > sub-channels respectively

Re: [PATCH 3/5] media: Add new SDR formats SC16, SC18 & SC20

On 11/09/2016 04:44 PM, Ramesh Shanmugasundaram wrote: > This patch adds support for the three new SDR formats. These formats > were prefixed with "sliced" indicating I data constitutes the top half and > Q data constitutes the bottom half of the received buffer. The standard terminology for

Re: [PATCH 2/5] media: i2c: max2175: Add MAX2175 support

Hi Ramesh, A quick review: On 11/09/2016 04:44 PM, Ramesh Shanmugasundaram wrote: > This patch adds driver support for MAX2175 chip. This is Maxim > Integrated's RF to Bits tuner front end chip designed for software-defined > radio solutions. This driver exposes the tuner as a sub-device

Re: [PATCH 2/5] media: i2c: max2175: Add MAX2175 support

Hi Antti, On Friday 11 Nov 2016 09:16:04 Antti Palosaari wrote: > Hello > > On 11/09/2016 05:44 PM, Ramesh Shanmugasundaram wrote: > > +static int max2175_set_lo_freq(struct max2175 *ctx, u64 lo_freq) > > +{ > > + u64 scaled_lo_freq, scaled_npf, scaled_integer, scaled_fraction; > > + u32

Re: [PATCH v6 05/07] iommu/ipmmu-vmsa: Add new IOMMU_DOMAIN_DMA ops

On Fri, Nov 11, 2016 at 03:13:32AM +0200, Laurent Pinchart wrote: > Joerg, as I've sent a few comments about the other patches (sorry for the > late > review, I got delayed by KS and LPC), the follow-up patch should probably be > squashed into this one when Magnus addresses my comments. Could

[PATCH] v4l: vsp1: Prevent commencing pipelines before they are setup

With multiple inputs through the BRU it is feasible for the streams to race each other at stream-on. In the case of the video pipelines, this can present two serious issues. 1) A null-dereference if the pipe->dl is committed at the same time as the vsp1_video_setup_pipeline() is processing

Re: [PATCH v8 0/3] ARM, arm64: renesas: Enable UHS-I SDR-104

On Thu, Nov 10, 2016 at 12:47:00PM +0100, Wolfram Sang wrote: > On Thu, Nov 03, 2016 at 04:07:22PM +0100, Simon Horman wrote: > > Hi, > > > > this series enables SDHI UHS-I SDR-104 on: > > * r8a7790/lager > > * r8a7791/koelsch > > * r8a7794/alt > > > > It is based on

Re: [PATCH v4 00/14] ARM: dts: r8a779x: use demuxer for I2C

On Wed, Nov 09, 2016 at 08:00:01PM +0100, Geert Uytterhoeven wrote: > On Wed, Nov 9, 2016 at 3:35 PM, Simon Horman wrote: > >> Will you get access to these boards in the foreseeable future? > > > > As mentioned by Geert, there is a porter in Magnus's board farm. > >