Hi Mark,
On Thu, Sep 28, 2017 at 2:01 AM, Mark Brown wrote:
> On Wed, Sep 27, 2017 at 02:36:01PM +0900, Magnus Damm wrote:
>> On Wed, Sep 27, 2017 at 2:30 AM, Mark Brown wrote:
>> > On Mon, Sep 25, 2017 at 09:15:53PM +0200, Geert Uytterhoeven wrote:
>
>>
Hi Laurent,
Thanks for the patch,
On 16/08/17 00:03, Laurent Pinchart wrote:
> Unlike the KMS API, the hardware doesn't support planes exceeding the
> screen boundaries. Clip plane coordinates to support the use case.
>
> Signed-off-by: Laurent Pinchart
Hi Laurent,
Thankyou for the patch,
This looks good, and passes the tests.
On 16/08/17 00:03, Laurent Pinchart wrote:
> There is no point in accepting fully off-screen planes as they won't be
> displayed. Reject them in the atomic check.
>
> Signed-off-by: Laurent Pinchart
On Wed, Sep 27, 2017 at 11:57 AM, Fabrizio Castro
wrote:
> Add the DT nodes needed by MSIOF[012] interfaces to the SoC dtsi.
> Also, define aliases for spi[123].
>
> Signed-off-by: Fabrizio Castro
> Signed-off-by: Chris Paterson
On Wed, Sep 27, 2017 at 11:57 AM, Fabrizio Castro
wrote:
> Add the DT nodes needed by MSIOF[012] interfaces to the SoC dtsi.
> Also, define aliases for spi[123].
>
> Signed-off-by: Fabrizio Castro
> Signed-off-by: Chris Paterson
Add the DT nodes needed by MSIOF[012] interfaces to the SoC dtsi.
Also, define aliases for spi[123].
Signed-off-by: Fabrizio Castro
Signed-off-by: Chris Paterson
---
This patch depends on the corresponding dt-bindings patch:
* spi:
Add the DT nodes needed by MSIOF[012] interfaces to the SoC dtsi.
Also, define aliases for spi[123].
Signed-off-by: Fabrizio Castro
Signed-off-by: Chris Paterson
---
This patch depends on the corresponding dt-bindings patch:
* spi:
This patch fixes an issue that the driver sets the BCLR bit of
{C,Dn}FIFOCTR register to 1 even when it's non-DCP pipe and
the FRDY bit of {C,Dn}FIFOCTR register is set to 1.
Fixes: e8d548d54968 ("usb: renesas_usbhs: fifo became independent from pipe.")
Cc: # v3.1+
This patch fixes an issue that the usbhsf_fifo_clear() is possible
to cause 10 msec delay if the pipe is RX direction and empty because
the FRDY bit will never be set to 1 in such case.
Fixes: e8d548d54968 ("usb: renesas_usbhs: fifo became independent from pipe.")
Cc: #
This patch set is based on the Felipe's usb.git / testing/fixes branch
(The commit is 7661ca09b2ff98f48693f431bb01fed62830e433).
Changes from v1:
- Devides two fix things in a patch to two patches.
Yoshihiro Shimoda (2):
usb: renesas_usbhs: fix the BCLR setting condition for non-DCP pipe
Hi Greg,
> -Original Message-
> From: Greg KH
> Sent: Wednesday, September 27, 2017 5:37 PM
>
> On Wed, Sep 27, 2017 at 05:04:05PM +0900, Yoshihiro Shimoda wrote:
> > This patch fixes two issues:
> > - the usbhsf_fifo_clear() is possible to cause 10 msec delay if
> >the pipe is RX
On Wed, Sep 27, 2017 at 05:04:05PM +0900, Yoshihiro Shimoda wrote:
> This patch fixes two issues:
> - the usbhsf_fifo_clear() is possible to cause 10 msec delay if
>the pipe is RX direction and empty because the FRDY bit will never
>be set to 1 in such case.
> - sets the BCLR of
This patch fixes two issues:
- the usbhsf_fifo_clear() is possible to cause 10 msec delay if
the pipe is RX direction and empty because the FRDY bit will never
be set to 1 in such case.
- sets the BCLR of {C,Dn}FIFOCTR to 1 even when it's non-DCP pipe and
the FRDY bit sets to 0.
Fixes:
On Wed, Sep 27, 2017 at 02:03:14AM +, Yoshihiro Shimoda wrote:
> Hi Simon-san,
> > From: Simon Horman
> > Sent: Monday, September 25, 2017 4:08 PM
> > On Thu, Sep 21, 2017 at 10:37:15AM +, Yoshihiro Shimoda wrote:
> > > Hi Simon-san,
> > > > From: Simon Horman
> > > > Sent: Friday,
Hi Daniel,
On Tue, Sep 26, 2017 at 8:38 PM, Daniel Lezcano
wrote:
> On 26/09/2017 10:26, Laurent Pinchart wrote:
>> Reviewed-by: Laurent Pinchart
>
> Thanks. I applied the whole series.
Thank you! So we can update DTS in v4.16.
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