Re: [PATCH v5] v4l2-async: Match parent devices

[Sakari Ailus]

On Wed, Dec 06, 2017 at 02:58:39PM +, Kieran Bingham wrote:
> From: Kieran Bingham 
> 
> Devices supporting multiple endpoints on a single device node must set
> their subdevice fwnode to the endpoint to allow distinct comparisons.
> 
> Adapt the match_fwnode call to compare against the provided fwnodes
> first, but to also perform a cross reference comparison against the
> parent fwnodes of each other.
> 
> This allows notifiers to pass the endpoint for comparison and still
> support existing subdevices which store their default parent device
> node.
> 
> Signed-off-by: Kieran Bingham 
> Signed-off-by: Sakari Ailus 
> 
> ---
> 
> Hi Sakari,
> 
> Since you signed-off on this patch - it has had to be reworked due to the
> changes on the of_node_full_name() functionality.
> 
> I believe it is correct now to *just* do the pointer matching, as that matches
> the current implementation, and converting to device_nodes will be just as
> equal as the fwnodes, as they are simply containers.
> 
> Let me know if you are happy to maintain your SOB on this patch - and if we 
> need
> to work towards getting this integrated upstream, especially in light of your 
> new
> endpoint matching work.

I'd really want to avoid resorting to matching opportunistically --- please
see my reply to Niklas on "[RFC 1/1] v4l: async: Use endpoint node, not
device node, for fwnode match".

-- 
Regards,

Sakari Ailus
sakari.ai...@linux.intel.com

Re: [PATCH] gpio: gpio-rcar: Support S2RAM

[Geert Uytterhoeven]

Hi Kaneko-san,

On Wed, Dec 6, 2017 at 7:48 PM, Yoshihiro Kaneko  wrote:
> From: Hien Dang 
>
> This patch adds an implementation that saves and restores the state of
> GPIO configuration on suspend and resume.
>
> Signed-off-by: Hien Dang 
> Signed-off-by: Takeshi Kihara 
> Signed-off-by: Yoshihiro Kaneko 

Thanks for your patch!

> --- a/drivers/gpio/gpio-rcar.c
> +++ b/drivers/gpio/gpio-rcar.c
> @@ -31,6 +31,16 @@
>  #include 
>  #include 
>
> +struct gpio_rcar_bank_info {
> +   bool iointsel;
> +   bool inoutsel;
> +   bool outdt;
> +   bool active_high_rising_edge;
> +   bool level_trigger;
> +   bool both;
> +   bool intmsk;
> +};

So for each GPIO, you save 7 bools = 7 bytes.

>  struct gpio_rcar_priv {
> void __iomem *base;
> spinlock_t lock;
> @@ -41,6 +51,7 @@ struct gpio_rcar_priv {
> unsigned int irq_parent;
> bool has_both_edge_trigger;
> bool needs_clk;
> +   struct gpio_rcar_bank_info bank_info[32];

That's 32 x 7 = 224 bytes in total.

What about just using 7 u32s instead, one for each register to save?
That way you only need 7 x 4 = 28 bytes, and you can probably optimize
the code to just save/restore the whole register at once.

Gr{oetje,eeting}s,

Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- ge...@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds

Re: [PATCH] sata: rcar_sata: Reset SATA PHY when Salvator-X board resumes

[Geert Uytterhoeven]

Hi Kaneko-san,

On Wed, Dec 6, 2017 at 7:45 PM, Yoshihiro Kaneko  wrote:
> From: Khiem Nguyen 
>
> Because power of Salvator-X board is cut off in suspend,
> it needs to reset SATA PHY state in resume.
> Otherwise, SATA partition could not be accessed anymore.

Thanks for your patch!

So this is needed on R-Car Gen3 only.

> --- a/drivers/ata/sata_rcar.c
> +++ b/drivers/ata/sata_rcar.c
> @@ -977,11 +977,43 @@ static int sata_rcar_resume(struct device *dev)
> struct sata_rcar_priv *priv = host->private_data;
> void __iomem *base = priv->base;
> int ret;
> +   u32 val;
>
> ret = clk_prepare_enable(priv->clk);
> if (ret)
> return ret;
>
> +   /* Re-use from sata_rcar_init_controller() */
> +   /* reset and setup phy */
> +   switch (priv->type) {
> +   case RCAR_GEN1_SATA:
> +   sata_rcar_gen1_phy_init(priv);

Hence why do this (and the below) on R-Car Gen1, too?

> +   break;
> +   case RCAR_GEN2_SATA:
> +   sata_rcar_gen2_phy_init(priv);

And on both R-Car Gen2 and Gen3 (currently Gen3 is treated like Gen2
everywhere in the driver)?
What about introducing RCAR_GEN3_SATA, and doing the reinit on R-Car Gen3
only?

> +   break;
> +   default:
> +   dev_warn(host->dev, "SATA phy is not initialized\n");
> +   break;
> +   }

[...]

Gr{oetje,eeting}s,

Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- ge...@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds

[PATCH] gpio: gpio-rcar: Support S2RAM

[Yoshihiro Kaneko]

From: Hien Dang 

This patch adds an implementation that saves and restores the state of
GPIO configuration on suspend and resume.

Signed-off-by: Hien Dang 
Signed-off-by: Takeshi Kihara 
Signed-off-by: Yoshihiro Kaneko 
---

This patch is based on the for-next branch of linux-gpio tree.

 drivers/gpio/gpio-rcar.c | 89 
 1 file changed, 89 insertions(+)

diff --git a/drivers/gpio/gpio-rcar.c b/drivers/gpio/gpio-rcar.c
index e76de57..c99a2c5 100644
--- a/drivers/gpio/gpio-rcar.c
+++ b/drivers/gpio/gpio-rcar.c
@@ -31,6 +31,16 @@
 #include 
 #include 
 
+struct gpio_rcar_bank_info {
+   bool iointsel;
+   bool inoutsel;
+   bool outdt;
+   bool active_high_rising_edge;
+   bool level_trigger;
+   bool both;
+   bool intmsk;
+};
+
 struct gpio_rcar_priv {
void __iomem *base;
spinlock_t lock;
@@ -41,6 +51,7 @@ struct gpio_rcar_priv {
unsigned int irq_parent;
bool has_both_edge_trigger;
bool needs_clk;
+   struct gpio_rcar_bank_info bank_info[32];
 };
 
 #define IOINTSEL 0x00  /* General IO/Interrupt Switching Register */
@@ -415,6 +426,83 @@ static int gpio_rcar_parse_dt(struct gpio_rcar_priv *p, 
unsigned int *npins)
return 0;
 }
 
+#ifdef CONFIG_PM_SLEEP
+static int gpio_rcar_suspend(struct device *dev)
+{
+   struct gpio_rcar_priv *p = dev_get_drvdata(dev);
+   int offset;
+   u32 bit_mask;
+   struct gpio_rcar_bank_info *bank_info;
+
+   for (offset = 0; offset < p->gpio_chip.ngpio; offset++) {
+   bank_info = >bank_info[offset];
+   bit_mask = BIT(offset);
+   bank_info->iointsel = !!(gpio_rcar_read(p, IOINTSEL) &
+bit_mask);
+
+   /* I/O pin  */
+   if (!bank_info->iointsel) {
+   bank_info->inoutsel = !!(gpio_rcar_read(p, INOUTSEL) &
+bit_mask);
+   bank_info->outdt = !!(gpio_rcar_read(p, OUTDT) &
+ bit_mask);
+   /* Interrupt pin  */
+   } else {
+   bank_info->intmsk = !!(gpio_rcar_read(p, INTMSK) &
+  bit_mask);
+   bank_info->active_high_rising_edge =
+   !(!!(gpio_rcar_read(p, POSNEG) & bit_mask));
+   bank_info->level_trigger =
+   !(!!(gpio_rcar_read(p, EDGLEVEL) & bit_mask));
+   bank_info->both = !!(gpio_rcar_read(p, BOTHEDGE) &
+bit_mask);
+   }
+   }
+
+   return 0;
+}
+
+static int gpio_rcar_resume(struct device *dev)
+{
+   struct gpio_rcar_priv *p = dev_get_drvdata(dev);
+   int offset;
+   struct gpio_rcar_bank_info *bank_info;
+
+   for (offset = 0; offset < p->gpio_chip.ngpio; offset++) {
+   bank_info = >bank_info[offset];
+   /* I/O pin  */
+   if (!bank_info->iointsel) {
+   if (bank_info->inoutsel)
+   gpio_rcar_direction_output(>gpio_chip,
+  offset,
+  bank_info->outdt);
+   else
+   gpio_rcar_direction_input(>gpio_chip,
+ offset);
+   /* Interrupt pin  */
+   } else {
+   gpio_rcar_config_interrupt_input_mode(
+   p,
+   offset,
+   bank_info->active_high_rising_edge,
+   bank_info->level_trigger,
+   bank_info->both);
+
+   if (bank_info->intmsk)
+   gpio_rcar_write(p, MSKCLR, BIT(offset));
+   }
+   }
+
+   return 0;
+}
+
+static SIMPLE_DEV_PM_OPS(gpio_rcar_pm_ops,
+   gpio_rcar_suspend, gpio_rcar_resume);
+#define DEV_PM_OPS (_rcar_pm_ops)
+#else
+#define DEV_PM_OPS NULL
+#endif /* CONFIG_PM_SLEEP*/
+
 static int gpio_rcar_probe(struct platform_device *pdev)
 {
struct gpio_rcar_priv *p;
@@ -536,6 +624,7 @@ static int gpio_rcar_remove(struct platform_device *pdev)
.remove = gpio_rcar_remove,
.driver = {
.name   = "gpio_rcar",
+   .pm = DEV_PM_OPS,
.of_match_table = of_match_ptr(gpio_rcar_of_table),
}
 };
-- 
1.9.1

[PATCH] sata: rcar_sata: Reset SATA PHY when Salvator-X board resumes

[Yoshihiro Kaneko]

From: Khiem Nguyen 

Because power of Salvator-X board is cut off in suspend,
it needs to reset SATA PHY state in resume.
Otherwise, SATA partition could not be accessed anymore.

Signed-off-by: Khiem Nguyen 
Signed-off-by: Hien Dang 
Signed-off-by: Yoshihiro Kaneko 
---

This patch is based on the for-next branch of libata tree.

 drivers/ata/sata_rcar.c | 32 
 1 file changed, 32 insertions(+)

diff --git a/drivers/ata/sata_rcar.c b/drivers/ata/sata_rcar.c
index 80ee2f2..aba6121 100644
--- a/drivers/ata/sata_rcar.c
+++ b/drivers/ata/sata_rcar.c
@@ -977,11 +977,43 @@ static int sata_rcar_resume(struct device *dev)
struct sata_rcar_priv *priv = host->private_data;
void __iomem *base = priv->base;
int ret;
+   u32 val;
 
ret = clk_prepare_enable(priv->clk);
if (ret)
return ret;
 
+   /* Re-use from sata_rcar_init_controller() */
+   /* reset and setup phy */
+   switch (priv->type) {
+   case RCAR_GEN1_SATA:
+   sata_rcar_gen1_phy_init(priv);
+   break;
+   case RCAR_GEN2_SATA:
+   sata_rcar_gen2_phy_init(priv);
+   break;
+   default:
+   dev_warn(host->dev, "SATA phy is not initialized\n");
+   break;
+   }
+
+   /* SATA-IP reset state */
+   val = ioread32(base + ATAPI_CONTROL1_REG);
+   val |= ATAPI_CONTROL1_RESET;
+   iowrite32(val, base + ATAPI_CONTROL1_REG);
+
+   /* ISM mode, PRD mode, DTEND flag at bit 0 */
+   val = ioread32(base + ATAPI_CONTROL1_REG);
+   val |= ATAPI_CONTROL1_ISM;
+   val |= ATAPI_CONTROL1_DESE;
+   val |= ATAPI_CONTROL1_DTA32M;
+   iowrite32(val, base + ATAPI_CONTROL1_REG);
+
+   /* Release the SATA-IP from the reset state */
+   val = ioread32(base + ATAPI_CONTROL1_REG);
+   val &= ~ATAPI_CONTROL1_RESET;
+   iowrite32(val, base + ATAPI_CONTROL1_REG);
+
/* ack and mask */
iowrite32(0, base + SATAINTSTAT_REG);
iowrite32(0x7ff, base + SATAINTMASK_REG);
-- 
1.9.1

Re: NFS crash, hashed pointers in backtrace

[Geert Uytterhoeven]

Hi Trond,

On Wed, Dec 6, 2017 at 5:10 PM, Trond Myklebust  wrote:
> On Wed, 2017-12-06 at 15:31 +0100, Geert Uytterhoeven wrote:
>> On Tue, Dec 5, 2017 at 5:02 PM, Geert Uytterhoeven > org> wrote:
>> Got another nfsroot crash:
>>
>> Unable to handle kernel NULL pointer dereference at virtual address
>> 0030
>> pgd = 329e8f6e
>> [0030] *pgd=8040004003, *pmd=
>> Internal error: Oops: 206 [#1] SMP ARM
>> Modules linked in:
>> CPU: 0 PID: 101 Comm: kworker/u4:1 Not tainted
>> 4.15.0-rc2-koelsch-01166-g047d7d3248e08fc7-dirty #3762
>> Hardware name: Generic R-Car Gen2 (Flattened Device Tree)
>> Workqueue: writeback wb_workfn (flush-0:15)
>> task: 8a5bf858 task.stack: e93c92bc
>> PC is at nfs_page_async_flush+0x110/0x244

>> static int nfs_page_async_flush(struct nfs_pageio_descriptor *pgio,
>> struct page *page)
>> {
>> struct nfs_page *req;
>> int ret = 0;
>>
>> ...
>>
>> /* If there is a fatal error that covers this write, just
>> exit */
>> if (nfs_error_is_fatal_on_server(req->wb_context->error))
>> goto out_launder;
>>
>> c03bc644:   e595300cldr r3, [r5, #12]
>> c03bc648:   e5930030ldr r0, [r3, #48]   ; 0x30
>> c03bc64c:   ebfffd1bbl  c03bbac0
>> 
>>
>> req->wb_context must be NULL.
>>
>
> I'm confused. If your test involves only writing to a sysfs file, then
> why is the NFS code involved at all?

I don't think the second was related to sysfs.

> Could this be a use-after-free?

Possibly. I'm seeing other crashes, too. Looking into them...

Gr{oetje,eeting}s,

Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- ge...@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds

Re: NFS crash, hashed pointers in backtrace

[Trond Myklebust]

Hi Geert,

On Wed, 2017-12-06 at 15:31 +0100, Geert Uytterhoeven wrote:
> Hi Trond. Anna,
> 
> On Tue, Dec 5, 2017 at 5:02 PM, Geert Uytterhoeven  org> wrote:
> > During a failed write to a virtual sysfs file (root fs is NFS), I
> > got:
> > 
> > Unable to handle kernel NULL pointer dereference at virtual address
> > 0020
> > pgd = c448bb15
> > [0020] *pgd=69c9c003, *pmd=69d55003, *pte=
> > Internal error: Oops: 207 [#1] SMP ARM
> > Modules linked in:
> > CPU: 0 PID: 1230 Comm: rs:main Q:Reg Not tainted
> > 4.15.0-rc2-koelsch-01160-gd389a154c640caab-dirty #3752
> > Hardware name: Generic R-Car Gen2 (Flattened Device Tree)
> > task: 4a3bb6d2 task.stack: fd0c00bd
> > PC is at nfs_flush_incompatible+0x54/0xf8
> 
> Got another nfsroot crash:
> 
> Unable to handle kernel NULL pointer dereference at virtual address
> 0030
> pgd = 329e8f6e
> [0030] *pgd=8040004003, *pmd=
> Internal error: Oops: 206 [#1] SMP ARM
> Modules linked in:
> CPU: 0 PID: 101 Comm: kworker/u4:1 Not tainted
> 4.15.0-rc2-koelsch-01166-g047d7d3248e08fc7-dirty #3762
> Hardware name: Generic R-Car Gen2 (Flattened Device Tree)
> Workqueue: writeback wb_workfn (flush-0:15)
> task: 8a5bf858 task.stack: e93c92bc
> PC is at nfs_page_async_flush+0x110/0x244
> LR is at 0x10
> pc : []lr : [<0010>]psr: 400f0013
> sp : eaff9c98  ip : c0c5092b  fp : 0005
> r10: 00018e84  r9 : ebef92c0  r8 : eaff9d64
> r7 : ea421a00  r6 : ebef92c0  r5 : ea999040  r4 : ea9b1a00
> r3 :   r2 : 0006  r1 :   r0 : 
> Flags: nZcv  IRQs on  FIQs on  Mode SVC_32  ISA ARM  Segment user
> Control: 30c5387d  Table: 69d65680  DAC: fffd
> Process kworker/u4:1 (pid: 101, stack limit = 0xeaff8210)
> Stack: (0xeaff9c98 to 0xeaffa000)
> 9c80:   ebef92c0
> eaff9d64
> 9ca0: eaff9e20 ea421afc  c03bc858 eaff9e20  
> c02b11e8
> 9cc0:  ea8f4500 eb427328 00018e89  0009 eaff9d0c
> 
> 9ce0: c03bc830 eaff9d64   0009  ebef8440
> ebef45c0
> 9d00: ebf1abc0 ebef8860 ebef8420 ebef92c0 ebef5ce0 ebef7e80 ebef3cc0
> eaff9d1c
> 9d20: eaff9d1c eb1d2d98 eb1d2d28 ea421a00 eb400700 ea421a00 eab89bc0
> ea421afc
> 9d40: eaff9e20 ea421afc 0002 ea421a50 eaff8000 c03bc94c c081590c
> c02483d8
> 9d60: eaa62140 0001 ea421a00 c08157cc c08158e0  
> c08157bc
> 9d80: c081590c  eab89bc0  1000 0001 eaff9d9c
> ea999fc0
> 9da0: ea999fc0 4000 1000 1000  c0745704 
> 
> 9dc0: ec09e250 eaff9e20 ea421afc eaff9e20 ea9c4c38 c02b2d48 0086
> ea421a00
> 9de0: ea421a00 c0310434 ea421a00 eaff9e20  ea421ab4 ea421a00
> 1400
> 9e00: ea9c4c38 eaff9efc 0002 c03109b8 ea9c4c64 3fd0 ea98b800
> 
> 9e20: 13fb     7fff 
> 0011
> 9e40:  ea9c4c38  c0e04900 3fda eaff9efc ea9c4c4c
> ea98b800
> 9e60: eb1f7584 c0310be0 ea9c4c4c ea9c4c38 eaff9efc c0e04900 ea9c4c64
> 175c
> 9e80: ea9c4d90 c0e13020 000a c0310d2c 3fd0 3fd0 eb465198
> 3418
> 9ea0: eaff9ea0 eaff9ea0 eaff9ea8 eaff9ea8 eaff9eb0 eaff9eb0 001a
> ea9c4d98
> 9ec0: ea9c4c38 175c ea9c4d90 ea9c4c3c ea9c4d80  0088
> c03110a0
> 9ee0:  c023b924 eb9a0d80 eafd7100 eb465100 eabe8000 
> 175c
> 9f00:  eaff9e9c  0006 0003  
> 
> 9f20: eb7f6200 ea9c4d98 eb406600  eb407f00  ea9c4d9c
> c0235bdc
> 9f40: eb7f6200 ea9c4d98 eb7f6200 eb406600 eb406600 eaff8000 eb406624
> c0e04900
> 9f60: eb7f6218 c023634c eafd7100 eb7f6380 eb7a7fc0  eb443ee4
> eb7f63a8
> 9f80: eb7f6200 c0236080  c023a528 eb7a7fc0 c023a40c 
> 
> 9fa0:    c0206f38   
> 
> 9fc0:       
> 
> 9fe0:     0013  
> 
> [] (nfs_page_async_flush) from []
> (nfs_writepages_callback+0x28/0x54)
> [] (nfs_writepages_callback) from []
> (write_cache_pages+0x278/0x364)
> [] (write_cache_pages) from []
> (nfs_writepages+0xa8/0xe8)
> [] (nfs_writepages) from []
> (do_writepages+0x34/0x80)
> [] (do_writepages) from []
> (__writeback_single_inode+0x34/0x194)
> [] (__writeback_single_inode) from []
> (writeback_sb_inodes+0x1cc/0x390)
> [] (writeback_sb_inodes) from []
> (__writeback_inodes_wb+0x64/0xa0)
> [] (__writeback_inodes_wb) from []
> (wb_writeback+0x110/0x18c)
> [] (wb_writeback) from [] (wb_workfn+0x1b8/0x304)
> [] (wb_workfn) from []
> (process_one_work+0x1cc/0x31c)
> [] (process_one_work) from []
> (worker_thread+0x2cc/0x408)
> [] (worker_thread) from [] (kthread+0x11c/0x13c)
> [] (kthread) from [] (ret_from_fork+0x14/0x3c)
> Code: e3a02001 e5c32004 ebf98e95 e595300c (e5930030)
> ---[ end trace 2771b70506a823a3 ]---
> 
> 

Re: [PATCH v5] v4l2-async: Match parent devices

[Kieran Bingham]

Hi Jacopo,

On 06/12/17 15:33, jacopo mondi wrote:
> Hi Kieran,
> 
> On Wed, Dec 06, 2017 at 02:58:39PM +, Kieran Bingham wrote:
>> From: Kieran Bingham 
>>
>> Devices supporting multiple endpoints on a single device node must set
>> their subdevice fwnode to the endpoint to allow distinct comparisons.
>>
>> Adapt the match_fwnode call to compare against the provided fwnodes
>> first, but to also perform a cross reference comparison against the
>> parent fwnodes of each other.
>>
>> This allows notifiers to pass the endpoint for comparison and still
>> support existing subdevices which store their default parent device
>> node.
>>
>> Signed-off-by: Kieran Bingham 
>> Signed-off-by: Sakari Ailus 
> 
> please append:
> 
> Reported-by: Jacopo Mondi 

Ahh yes of course!



> Thanks
>j
> 
>>
>> ---
>>
>> Hi Sakari,
>>
>> Since you signed-off on this patch - it has had to be reworked due to the
>> changes on the of_node_full_name() functionality.
>>
>> I believe it is correct now to *just* do the pointer matching, as that 
>> matches
>> the current implementation, and converting to device_nodes will be just as
>> equal as the fwnodes, as they are simply containers.
>>
>> Let me know if you are happy to maintain your SOB on this patch - and if we 
>> need
>> to work towards getting this integrated upstream, especially in light of 
>> your new
>> endpoint matching work.
>>
>> --
>> Regards
>>
>> Kieran
>>
>>
>> v2:
>>  - Added documentation comments
>>  - simplified the OF match by adding match_fwnode_of()
>>
>> v3:
>>  - Fix comments
>>  - Fix sd_parent, and asd_parent usage
>>
>> v4:
>>  - Clean up and simplify match_fwnode and comparisons
>>
>> v5:
>>  - Updated for v4.15-rc1:
>>of_node no longer specifies a full path, and only returns the
>>basename with of_node_full_name(), thus this ends up matching
>>"endpoint" for all endpoints. Fall back to pointer matching,
>>whilst maintaining the parent comparisons.
>> ---
>>  drivers/media/v4l2-core/v4l2-async.c | 17 -
>>  1 file changed, 16 insertions(+), 1 deletion(-)
>>
>> diff --git a/drivers/media/v4l2-core/v4l2-async.c 
>> b/drivers/media/v4l2-core/v4l2-async.c
>> index fcadad305336..780bda70d8b3 100644
>> --- a/drivers/media/v4l2-core/v4l2-async.c
>> +++ b/drivers/media/v4l2-core/v4l2-async.c
>> @@ -71,9 +71,24 @@ static bool match_devname(struct v4l2_subdev *sd,
>>  return !strcmp(asd->match.device_name.name, dev_name(sd->dev));
>>  }
>>
>> +/*
>> + * As a measure to support drivers which have not been converted to use
>> + * endpoint matching, we also find the parent devices for cross-matching.
>> + *
>> + * This also allows continued support for matching subdevices which will not
>> + * have an endpoint themselves.
>> + */
>>  static bool match_fwnode(struct v4l2_subdev *sd, struct v4l2_async_subdev 
>> *asd)
>>  {
>> -return sd->fwnode == asd->match.fwnode.fwnode;
>> +struct fwnode_handle *asd_fwnode = asd->match.fwnode.fwnode;
>> +struct fwnode_handle *sd_parent, *asd_parent;
>> +
>> +sd_parent = fwnode_graph_get_port_parent(sd->fwnode);
>> +asd_parent = fwnode_graph_get_port_parent(asd_fwnode);
>> +
>> +return sd->fwnode == asd_fwnode ||
>> +   sd->fwnode == asd_parent ||
>> +   sd_parent == asd_fwnode;
>>  }
>>
>>  static bool match_custom(struct v4l2_subdev *sd, struct v4l2_async_subdev 
>> *asd)
>> --
>> 2.7.4
>>

[PATCH v5] v4l2-async: Match parent devices

[Kieran Bingham]

From: Kieran Bingham 

Devices supporting multiple endpoints on a single device node must set
their subdevice fwnode to the endpoint to allow distinct comparisons.

Adapt the match_fwnode call to compare against the provided fwnodes
first, but to also perform a cross reference comparison against the
parent fwnodes of each other.

This allows notifiers to pass the endpoint for comparison and still
support existing subdevices which store their default parent device
node.

Signed-off-by: Kieran Bingham 
Signed-off-by: Sakari Ailus 

---

Hi Sakari,

Since you signed-off on this patch - it has had to be reworked due to the
changes on the of_node_full_name() functionality.

I believe it is correct now to *just* do the pointer matching, as that matches
the current implementation, and converting to device_nodes will be just as
equal as the fwnodes, as they are simply containers.

Let me know if you are happy to maintain your SOB on this patch - and if we need
to work towards getting this integrated upstream, especially in light of your 
new
endpoint matching work.

--
Regards

Kieran


v2:
 - Added documentation comments
 - simplified the OF match by adding match_fwnode_of()

v3:
 - Fix comments
 - Fix sd_parent, and asd_parent usage

v4:
 - Clean up and simplify match_fwnode and comparisons

v5:
 - Updated for v4.15-rc1:
   of_node no longer specifies a full path, and only returns the
   basename with of_node_full_name(), thus this ends up matching
   "endpoint" for all endpoints. Fall back to pointer matching,
   whilst maintaining the parent comparisons.
---
 drivers/media/v4l2-core/v4l2-async.c | 17 -
 1 file changed, 16 insertions(+), 1 deletion(-)

diff --git a/drivers/media/v4l2-core/v4l2-async.c 
b/drivers/media/v4l2-core/v4l2-async.c
index fcadad305336..780bda70d8b3 100644
--- a/drivers/media/v4l2-core/v4l2-async.c
+++ b/drivers/media/v4l2-core/v4l2-async.c
@@ -71,9 +71,24 @@ static bool match_devname(struct v4l2_subdev *sd,
return !strcmp(asd->match.device_name.name, dev_name(sd->dev));
 }
 
+/*
+ * As a measure to support drivers which have not been converted to use
+ * endpoint matching, we also find the parent devices for cross-matching.
+ *
+ * This also allows continued support for matching subdevices which will not
+ * have an endpoint themselves.
+ */
 static bool match_fwnode(struct v4l2_subdev *sd, struct v4l2_async_subdev *asd)
 {
-   return sd->fwnode == asd->match.fwnode.fwnode;
+   struct fwnode_handle *asd_fwnode = asd->match.fwnode.fwnode;
+   struct fwnode_handle *sd_parent, *asd_parent;
+
+   sd_parent = fwnode_graph_get_port_parent(sd->fwnode);
+   asd_parent = fwnode_graph_get_port_parent(asd_fwnode);
+
+   return sd->fwnode == asd_fwnode ||
+  sd->fwnode == asd_parent ||
+  sd_parent == asd_fwnode;
 }
 
 static bool match_custom(struct v4l2_subdev *sd, struct v4l2_async_subdev *asd)
-- 
2.7.4

Re: NFS crash, hashed pointers in backtrace

[Geert Uytterhoeven]

Hi Trond. Anna,

On Tue, Dec 5, 2017 at 5:02 PM, Geert Uytterhoeven  wrote:
> During a failed write to a virtual sysfs file (root fs is NFS), I got:
>
> Unable to handle kernel NULL pointer dereference at virtual address 0020
> pgd = c448bb15
> [0020] *pgd=69c9c003, *pmd=69d55003, *pte=
> Internal error: Oops: 207 [#1] SMP ARM
> Modules linked in:
> CPU: 0 PID: 1230 Comm: rs:main Q:Reg Not tainted
> 4.15.0-rc2-koelsch-01160-gd389a154c640caab-dirty #3752
> Hardware name: Generic R-Car Gen2 (Flattened Device Tree)
> task: 4a3bb6d2 task.stack: fd0c00bd
> PC is at nfs_flush_incompatible+0x54/0xf8

Got another nfsroot crash:

Unable to handle kernel NULL pointer dereference at virtual address 0030
pgd = 329e8f6e
[0030] *pgd=8040004003, *pmd=
Internal error: Oops: 206 [#1] SMP ARM
Modules linked in:
CPU: 0 PID: 101 Comm: kworker/u4:1 Not tainted
4.15.0-rc2-koelsch-01166-g047d7d3248e08fc7-dirty #3762
Hardware name: Generic R-Car Gen2 (Flattened Device Tree)
Workqueue: writeback wb_workfn (flush-0:15)
task: 8a5bf858 task.stack: e93c92bc
PC is at nfs_page_async_flush+0x110/0x244
LR is at 0x10
pc : []lr : [<0010>]psr: 400f0013
sp : eaff9c98  ip : c0c5092b  fp : 0005
r10: 00018e84  r9 : ebef92c0  r8 : eaff9d64
r7 : ea421a00  r6 : ebef92c0  r5 : ea999040  r4 : ea9b1a00
r3 :   r2 : 0006  r1 :   r0 : 
Flags: nZcv  IRQs on  FIQs on  Mode SVC_32  ISA ARM  Segment user
Control: 30c5387d  Table: 69d65680  DAC: fffd
Process kworker/u4:1 (pid: 101, stack limit = 0xeaff8210)
Stack: (0xeaff9c98 to 0xeaffa000)
9c80:   ebef92c0 eaff9d64
9ca0: eaff9e20 ea421afc  c03bc858 eaff9e20   c02b11e8
9cc0:  ea8f4500 eb427328 00018e89  0009 eaff9d0c 
9ce0: c03bc830 eaff9d64   0009  ebef8440 ebef45c0
9d00: ebf1abc0 ebef8860 ebef8420 ebef92c0 ebef5ce0 ebef7e80 ebef3cc0 eaff9d1c
9d20: eaff9d1c eb1d2d98 eb1d2d28 ea421a00 eb400700 ea421a00 eab89bc0 ea421afc
9d40: eaff9e20 ea421afc 0002 ea421a50 eaff8000 c03bc94c c081590c c02483d8
9d60: eaa62140 0001 ea421a00 c08157cc c08158e0   c08157bc
9d80: c081590c  eab89bc0  1000 0001 eaff9d9c ea999fc0
9da0: ea999fc0 4000 1000 1000  c0745704  
9dc0: ec09e250 eaff9e20 ea421afc eaff9e20 ea9c4c38 c02b2d48 0086 ea421a00
9de0: ea421a00 c0310434 ea421a00 eaff9e20  ea421ab4 ea421a00 1400
9e00: ea9c4c38 eaff9efc 0002 c03109b8 ea9c4c64 3fd0 ea98b800 
9e20: 13fb     7fff  0011
9e40:  ea9c4c38  c0e04900 3fda eaff9efc ea9c4c4c ea98b800
9e60: eb1f7584 c0310be0 ea9c4c4c ea9c4c38 eaff9efc c0e04900 ea9c4c64 175c
9e80: ea9c4d90 c0e13020 000a c0310d2c 3fd0 3fd0 eb465198 3418
9ea0: eaff9ea0 eaff9ea0 eaff9ea8 eaff9ea8 eaff9eb0 eaff9eb0 001a ea9c4d98
9ec0: ea9c4c38 175c ea9c4d90 ea9c4c3c ea9c4d80  0088 c03110a0
9ee0:  c023b924 eb9a0d80 eafd7100 eb465100 eabe8000  175c
9f00:  eaff9e9c  0006 0003   
9f20: eb7f6200 ea9c4d98 eb406600  eb407f00  ea9c4d9c c0235bdc
9f40: eb7f6200 ea9c4d98 eb7f6200 eb406600 eb406600 eaff8000 eb406624 c0e04900
9f60: eb7f6218 c023634c eafd7100 eb7f6380 eb7a7fc0  eb443ee4 eb7f63a8
9f80: eb7f6200 c0236080  c023a528 eb7a7fc0 c023a40c  
9fa0:    c0206f38    
9fc0:        
9fe0:     0013   
[] (nfs_page_async_flush) from []
(nfs_writepages_callback+0x28/0x54)
[] (nfs_writepages_callback) from []
(write_cache_pages+0x278/0x364)
[] (write_cache_pages) from [] (nfs_writepages+0xa8/0xe8)
[] (nfs_writepages) from [] (do_writepages+0x34/0x80)
[] (do_writepages) from []
(__writeback_single_inode+0x34/0x194)
[] (__writeback_single_inode) from []
(writeback_sb_inodes+0x1cc/0x390)
[] (writeback_sb_inodes) from []
(__writeback_inodes_wb+0x64/0xa0)
[] (__writeback_inodes_wb) from []
(wb_writeback+0x110/0x18c)
[] (wb_writeback) from [] (wb_workfn+0x1b8/0x304)
[] (wb_workfn) from [] (process_one_work+0x1cc/0x31c)
[] (process_one_work) from [] (worker_thread+0x2cc/0x408)
[] (worker_thread) from [] (kthread+0x11c/0x13c)
[] (kthread) from [] (ret_from_fork+0x14/0x3c)
Code: e3a02001 e5c32004 ebf98e95 e595300c (e5930030)
---[ end trace 2771b70506a823a3 ]---

static int nfs_page_async_flush(struct nfs_pageio_descriptor *pgio,
struct page *page)
{
struct nfs_page *req;
int ret = 0;

...

/* If there is a fatal error that covers this write, just exit */
if (nfs_error_is_fatal_on_server(req->wb_context->error))

[PATCH v2] ARM: dts: r8a7745: Add APMU node and second CPU core

[Fabrizio Castro]

Add DT node for the Advanced Power Management Unit (APMU), add the
second CPU core, and use "renesas,apmu" as "enable-method".

Signed-off-by: Fabrizio Castro 
Signed-off-by: Chris Paterson 
Reviewed-by: Biju Das 
---
Dear All,

I am reposting this patch now that its dependecy ("ARM: shmobile: rcar-gen2:
Make sure CNTVOFF is initialized on CA7/15") is part of v4.15-rc1, similarly
to patch "ARM: dts: r8a7794: Add SMP support".

v2:
- rebased against renesas-devel-20171205-v4.15-rc2

Thanks

 arch/arm/boot/dts/r8a7745.dtsi | 16 
 1 file changed, 16 insertions(+)

diff --git a/arch/arm/boot/dts/r8a7745.dtsi b/arch/arm/boot/dts/r8a7745.dtsi
index de13e15..0fa7861 100644
--- a/arch/arm/boot/dts/r8a7745.dtsi
+++ b/arch/arm/boot/dts/r8a7745.dtsi
@@ -38,6 +38,7 @@
cpus {
#address-cells = <1>;
#size-cells = <0>;
+   enable-method = "renesas,apmu";
 
cpu0: cpu@0 {
device_type = "cpu";
@@ -49,6 +50,15 @@
next-level-cache = <_CA7>;
};
 
+   cpu1: cpu@1 {
+   device_type = "cpu";
+   compatible = "arm,cortex-a7";
+   reg = <1>;
+   clock-frequency = <10>;
+   power-domains = < R8A7745_PD_CA7_CPU1>;
+   next-level-cache = <_CA7>;
+   };
+
L2_CA7: cache-controller-0 {
compatible = "cache";
cache-unified;
@@ -65,6 +75,12 @@
#size-cells = <2>;
ranges;
 
+   apmu@e6151000 {
+   compatible = "renesas,r8a7745-apmu", "renesas,apmu";
+   reg = <0 0xe6151000 0 0x188>;
+   cpus = < >;
+   };
+
gic: interrupt-controller@f1001000 {
compatible = "arm,gic-400";
#interrupt-cells = <3>;
-- 
2.7.4

RE: [PATCH 1/8] ARM: dts: r8a7745: Add APMU node and second CPU core

[Fabrizio Castro]

Hello Geert, Simon,

the problems I am seeing are not related to APMU/SMP, I'll send a v2 shortly.

Thanks,
Fab

>
> Hello Geert, Simon,
>
> >
> > As the dependency is in v4.15-rc1, it can be applied now.
> >
>
> we thought exactly the same thing, therefore we rebased and we re-ran our 
> tests, to discover that something broke in between
> versions.
> I'll be in touch once I have more information, but it's a no go for now.
>
> Thanks,
> Fab
>
>
> [https://www2.renesas.eu/media/email/unicef_2017.jpg]
>
> This Christmas, instead of sending out cards, Renesas Electronics Europe have 
> decided to support Unicef with a donation. For further
> details click here to find out about the valuable 
> work they do, helping children all over the world.
> We would like to take this opportunity to wish you a Merry Christmas and a 
> prosperous New Year.
>
>
>
> Renesas Electronics Europe Ltd, Dukes Meadow, Millboard Road, Bourne End, 
> Buckinghamshire, SL8 5FH, UK. Registered in England &
> Wales under Registered No. 04586709.


[https://www2.renesas.eu/media/email/unicef_2017.jpg]

This Christmas, instead of sending out cards, Renesas Electronics Europe have 
decided to support Unicef with a donation. For further details click 
here to find out about the valuable work they do, 
helping children all over the world.
We would like to take this opportunity to wish you a Merry Christmas and a 
prosperous New Year.



Renesas Electronics Europe Ltd, Dukes Meadow, Millboard Road, Bourne End, 
Buckinghamshire, SL8 5FH, UK. Registered in England & Wales under Registered 
No. 04586709.

RE: [PATCH 1/8] ARM: dts: r8a7745: Add APMU node and second CPU core

[Fabrizio Castro]

Hello Geert, Simon,

>
> As the dependency is in v4.15-rc1, it can be applied now.
>

we thought exactly the same thing, therefore we rebased and we re-ran our 
tests, to discover that something broke in between versions.
I'll be in touch once I have more information, but it's a no go for now.

Thanks,
Fab


[https://www2.renesas.eu/media/email/unicef_2017.jpg]

This Christmas, instead of sending out cards, Renesas Electronics Europe have 
decided to support Unicef with a donation. For further details click 
here to find out about the valuable work they do, 
helping children all over the world.
We would like to take this opportunity to wish you a Merry Christmas and a 
prosperous New Year.



Renesas Electronics Europe Ltd, Dukes Meadow, Millboard Road, Bourne End, 
Buckinghamshire, SL8 5FH, UK. Registered in England & Wales under Registered 
No. 04586709.

Re: [PATCH 1/8] ARM: dts: r8a7745: Add APMU node and second CPU core

[Geert Uytterhoeven]

Hi Simon,

On Fri, Sep 15, 2017 at 1:06 PM, Simon Horman  wrote:
> On Fri, Sep 15, 2017 at 08:57:53AM +, Fabrizio Castro wrote:
>> > -Original Message-
>> > From: linux-renesas-soc-ow...@vger.kernel.org 
>> > [mailto:linux-renesas-soc-ow...@vger.kernel.org] On Behalf Of Geert
>> > Uytterhoeven
>> > Sent: 15 September 2017 09:05
>> > To: Simon Horman ; Fabrizio Castro 
>> > 
>> > Cc: Chris Paterson ; Rob Herring 
>> > ; Mark Rutland ;
>> > Magnus Damm ; Russell King ; 
>> > devicet...@vger.kernel.org; Linux-Renesas
>> > ; linux-arm-ker...@lists.infradead.org; 
>> > Geert Uytterhoeven 
>> > Subject: Re: [PATCH 1/8] ARM: dts: r8a7745: Add APMU node and second CPU 
>> > core
>> >
>> > Hi Simon, Fabrizio,
>> >
>> > On Fri, Sep 15, 2017 at 9:45 AM, Simon Horman  wrote:
>> > > On Wed, Sep 13, 2017 at 06:05:34PM +0100, Chris Paterson wrote:
>> > >> From: Fabrizio Castro 
>> > >>
>> > >> Add DT node for the Advanced Power Management Unit (APMU), add the
>> > >> second CPU core, and use "renesas,apmu" as "enable-method".
>> > >>
>> > >> Signed-off-by: Fabrizio Castro 
>> > >> Signed-off-by: Chris Paterson 
>> > >> ---
>> > >> This patch is based on renesas-devel-20170913-v4.13.
>> > >
>> > > Hi,
>> > >
>> > > with reference to "[PATCH v3 0/3] ARM: renesas: Enable SMP on R-Car E2"
>> > > is the CNTVOFF initialised in the boot loader of boards (in upstream)
>> > > for this SoC? If not I expect you will have trouble with the arch timer
>> > > on secondary CPU cores.
>>
>> I can confirm that this patch relies on:
>> * "ARM: Add definition for monitor mode", and
>> * "ARM: shmobile: rcar-gen2: Make sure CNTVOFF is initialized on CA7/15 "
>> as the bootloader doesn't initialize CNTVOFF.
>>
>> >
>> > Exactly my question.
>> >
>> > Fabrizio: Given your feedback on "[PATCH v3 0/3] ARM: renesas: Enable SMP 
>> > on
>> > R-Car E2", I think SMP enablement on RZ/G1E has to be postponed until "ARM:
>> > shmobile: rcar-gen2: Make sure CNTVOFF is initialized on CA7/15" has been
>> > accepted upstream.
>>
>> You are right, somehow we missed the comment made by Simon on Monday:
>>
>> " I would like to deffer the third and last patch until v4.16 to avoid
>> an awkward branch dependency on the above - the branches are different
>> even though the tree is the same. Please resubmit this patch once the
>> above dependencies are present in an rc release, which at this stage
>> I expect to be v4.15-rc1."
>>
>> Apologies for this, we will send this patch later on, once both patches have 
>> been
>> accepted upstream.
>
> No problem, I will mark this one as deferred.

As the dependency is in v4.15-rc1, it can be applied now.

Gr{oetje,eeting}s,

Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- ge...@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds

[PATCH 33/61] ARM: dts: iwg22d-sodimm: Add can0 support to carrier board

[Simon Horman]

From: Fabrizio Castro 

This patch enables CAN0 interface exposed through connector J15 on the
carrier board.

Signed-off-by: Fabrizio Castro 
Reviewed-by: Biju Das 
Signed-off-by: Simon Horman 
---
 arch/arm/boot/dts/r8a7745-iwg22d-sodimm.dts | 12 
 1 file changed, 12 insertions(+)

diff --git a/arch/arm/boot/dts/r8a7745-iwg22d-sodimm.dts 
b/arch/arm/boot/dts/r8a7745-iwg22d-sodimm.dts
index 80c82aa94c06..39ce7e7101c7 100644
--- a/arch/arm/boot/dts/r8a7745-iwg22d-sodimm.dts
+++ b/arch/arm/boot/dts/r8a7745-iwg22d-sodimm.dts
@@ -59,6 +59,13 @@
};
 };
 
+ {
+   pinctrl-0 = <_pins>;
+   pinctrl-names = "default";
+
+   status = "okay";
+};
+
  {
pinctrl-0 = <_pins>;
pinctrl-names = "default";
@@ -85,6 +92,11 @@
function = "avb";
};
 
+   can0_pins: can0 {
+   groups = "can0_data";
+   function = "can0";
+   };
+
hscif1_pins: hscif1 {
groups = "hscif1_data", "hscif1_ctrl";
function = "hscif1";
-- 
2.11.0

[PATCH 59/61] ARM: dts: lager: Convert to named i2c-gpio bindings

[Simon Horman]

From: Geert Uytterhoeven 

Commits 7d29f509d2cfd807 ("dt-bindings: i2c: i2c-gpio: Add support for
named gpios") and 05c74778858d7d99 ("i2c: gpio: Add support for named
gpios in DT") introduced named i2c-gpio DT bindings, and deprecated the
more error-prone unnamed variant.

Switch to the new bindings, and add the missing GPIO_OPEN_DRAIN I/O
flags, which were implicitly assumed before.

Signed-off-by: Geert Uytterhoeven 
Reviewed-by: Wolfram Sang 
Signed-off-by: Simon Horman 
---
 arch/arm/boot/dts/r8a7790-lager.dts | 5 ++---
 1 file changed, 2 insertions(+), 3 deletions(-)

diff --git a/arch/arm/boot/dts/r8a7790-lager.dts 
b/arch/arm/boot/dts/r8a7790-lager.dts
index e3d27783b6b5..f2ea632381e7 100644
--- a/arch/arm/boot/dts/r8a7790-lager.dts
+++ b/arch/arm/boot/dts/r8a7790-lager.dts
@@ -272,9 +272,8 @@
#size-cells = <0>;
compatible = "i2c-gpio";
status = "disabled";
-   gpios = < 17 GPIO_ACTIVE_HIGH /* sda */
- 16 GPIO_ACTIVE_HIGH /* scl */
-   >;
+   sda-gpios = < 17 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
+   scl-gpios = < 16 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
i2c-gpio,delay-us = <5>;
};
 
-- 
2.11.0

[PATCH 43/61] ARM: dts: koelsch: Correct primary compatible value for eeprom

[Simon Horman]

From: Geert Uytterhoeven 

The Renesas part number of the two-wire serial interface EEPROM is not
24C02, but R1EX24002ATAS0G.

Hence change its primary compatible value to "renesas,r1ex24002", like
on Gose.

Signed-off-by: Geert Uytterhoeven 
Signed-off-by: Simon Horman 
---
 arch/arm/boot/dts/r8a7791-koelsch.dts | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/boot/dts/r8a7791-koelsch.dts 
b/arch/arm/boot/dts/r8a7791-koelsch.dts
index 4126de417922..fac9cdea4965 100644
--- a/arch/arm/boot/dts/r8a7791-koelsch.dts
+++ b/arch/arm/boot/dts/r8a7791-koelsch.dts
@@ -708,7 +708,7 @@
};
 
eeprom@50 {
-   compatible = "renesas,24c02", "atmel,24c02";
+   compatible = "renesas,r1ex24002", "atmel,24c02";
reg = <0x50>;
pagesize = <16>;
};
-- 
2.11.0

[PATCH 57/61] ARM: dts: sh73a0: Remove CMT renesas,channels-mask

[Simon Horman]

From: Magnus Damm 

Update the DTS to remove the now deprecated "renesas,channels-mask"
property.

The channel information is now kept in the device driver and can easily
be determined based on the compat string.

Signed-off-by: Magnus Damm 
Signed-off-by: Geert Uytterhoeven 
Signed-off-by: Simon Horman 
---
 arch/arm/boot/dts/sh73a0.dtsi | 3 ---
 1 file changed, 3 deletions(-)

diff --git a/arch/arm/boot/dts/sh73a0.dtsi b/arch/arm/boot/dts/sh73a0.dtsi
index 88d7e5631d34..914a7c2a584f 100644
--- a/arch/arm/boot/dts/sh73a0.dtsi
+++ b/arch/arm/boot/dts/sh73a0.dtsi
@@ -100,9 +100,6 @@
clocks = <_clks SH73A0_CLK_CMT1>;
clock-names = "fck";
power-domains = <_c5>;
-
-   renesas,channels-mask = <0x3f>;
-
status = "disabled";
};
 
-- 
2.11.0

[PATCH 41/61] ARM: dts: r8a7743: add VIN dt support

[Simon Horman]

From: Fabrizio Castro 

Add VIN[012] support to SoC dt. Also, add aliases.

Signed-off-by: Fabrizio Castro 
Reviewed-by: Biju Das 
Signed-off-by: Simon Horman 
---
 arch/arm/boot/dts/r8a7743.dtsi | 36 
 1 file changed, 36 insertions(+)

diff --git a/arch/arm/boot/dts/r8a7743.dtsi b/arch/arm/boot/dts/r8a7743.dtsi
index 9e26c40976ff..c09c6672ca37 100644
--- a/arch/arm/boot/dts/r8a7743.dtsi
+++ b/arch/arm/boot/dts/r8a7743.dtsi
@@ -32,6 +32,9 @@
spi1 = 
spi2 = 
spi3 = 
+   vin0 = 
+   vin1 = 
+   vin2 = 
};
 
cpus {
@@ -1037,6 +1040,39 @@
};
};
 
+   vin0: video@e6ef {
+   compatible = "renesas,vin-r8a7743",
+"renesas,rcar-gen2-vin";
+   reg = <0 0xe6ef 0 0x1000>;
+   interrupts = ;
+   clocks = < CPG_MOD 811>;
+   power-domains = < R8A7743_PD_ALWAYS_ON>;
+   resets = < 811>;
+   status = "disabled";
+   };
+
+   vin1: video@e6ef1000 {
+   compatible = "renesas,vin-r8a7743",
+"renesas,rcar-gen2-vin";
+   reg = <0 0xe6ef1000 0 0x1000>;
+   interrupts = ;
+   clocks = < CPG_MOD 810>;
+   power-domains = < R8A7743_PD_ALWAYS_ON>;
+   resets = < 810>;
+   status = "disabled";
+   };
+
+   vin2: video@e6ef2000 {
+   compatible = "renesas,vin-r8a7743",
+"renesas,rcar-gen2-vin";
+   reg = <0 0xe6ef2000 0 0x1000>;
+   interrupts = ;
+   clocks = < CPG_MOD 809>;
+   power-domains = < R8A7743_PD_ALWAYS_ON>;
+   resets = < 809>;
+   status = "disabled";
+   };
+
du: display@feb0 {
compatible = "renesas,du-r8a7743";
reg = <0 0xfeb0 0 0x4>,
-- 
2.11.0

[PATCH 55/61] ARM: dts: r8a7793: Remove CMT renesas,channels-mask

[Simon Horman]

From: Magnus Damm 

Update the DTS to remove the now deprecated "renesas,channels-mask"
property.

The channel information is now kept in the device driver and can easily
be determined based on the compat string.

Signed-off-by: Magnus Damm 
Signed-off-by: Geert Uytterhoeven 
Signed-off-by: Simon Horman 
---
 arch/arm/boot/dts/r8a7793.dtsi | 4 
 1 file changed, 4 deletions(-)

diff --git a/arch/arm/boot/dts/r8a7793.dtsi b/arch/arm/boot/dts/r8a7793.dtsi
index 4a79da3ddbef..a83c2e9c5723 100644
--- a/arch/arm/boot/dts/r8a7793.dtsi
+++ b/arch/arm/boot/dts/r8a7793.dtsi
@@ -257,8 +257,6 @@
power-domains = < R8A7793_PD_ALWAYS_ON>;
resets = < 124>;
 
-   renesas,channels-mask = <0x60>;
-
status = "disabled";
};
 
@@ -278,8 +276,6 @@
power-domains = < R8A7793_PD_ALWAYS_ON>;
resets = < 329>;
 
-   renesas,channels-mask = <0xff>;
-
status = "disabled";
};
 
-- 
2.11.0

[PATCH 40/61] ARM: dts: iwg20d-q7: Enable PCIe Controller

[Simon Horman]

From: Biju Das 

Enable PCIe Controller & set PCIe bus clock frequency.

Signed-off-by: Biju Das 
Reviewed-by: Fabrizio Castro 
Signed-off-by: Simon Horman 
---
 arch/arm/boot/dts/iwg20d-q7-common.dtsi | 8 
 1 file changed, 8 insertions(+)

diff --git a/arch/arm/boot/dts/iwg20d-q7-common.dtsi 
b/arch/arm/boot/dts/iwg20d-q7-common.dtsi
index 3e4bc4d6b9d3..54470c6de891 100644
--- a/arch/arm/boot/dts/iwg20d-q7-common.dtsi
+++ b/arch/arm/boot/dts/iwg20d-q7-common.dtsi
@@ -96,6 +96,14 @@
pinctrl-names = "default";
 };
 
+_bus_clk {
+   clock-frequency = <1>;
+};
+
+ {
+   status = "okay";
+};
+
  {
can0_pins: can0 {
groups = "can0_data_d";
-- 
2.11.0

[PATCH 24/61] ARM: dts: r8a7791: Use R-Car SDHI Gen2 fallback compat string

[Simon Horman]

Use newly added R-Car SDHI Gen2 fallback compat string
in the DT of the r8a7791 SoC.

This should have no run-time effect as the driver matches against
the per-SoC compat string before considering the fallback compat string.

Signed-off-by: Simon Horman 
---
 arch/arm/boot/dts/r8a7791.dtsi | 9 ++---
 1 file changed, 6 insertions(+), 3 deletions(-)

diff --git a/arch/arm/boot/dts/r8a7791.dtsi b/arch/arm/boot/dts/r8a7791.dtsi
index 9815a933e4cc..e888b5b0e135 100644
--- a/arch/arm/boot/dts/r8a7791.dtsi
+++ b/arch/arm/boot/dts/r8a7791.dtsi
@@ -612,7 +612,8 @@
};
 
sdhi0: sd@ee10 {
-   compatible = "renesas,sdhi-r8a7791";
+   compatible = "renesas,sdhi-r8a7791",
+"renesas,rcar-gen2-sdhi";
reg = <0 0xee10 0 0x328>;
interrupts = ;
clocks = < CPG_MOD 314>;
@@ -626,7 +627,8 @@
};
 
sdhi1: sd@ee14 {
-   compatible = "renesas,sdhi-r8a7791";
+   compatible = "renesas,sdhi-r8a7791",
+"renesas,rcar-gen2-sdhi";
reg = <0 0xee14 0 0x100>;
interrupts = ;
clocks = < CPG_MOD 312>;
@@ -640,7 +642,8 @@
};
 
sdhi2: sd@ee16 {
-   compatible = "renesas,sdhi-r8a7791";
+   compatible = "renesas,sdhi-r8a7791",
+"renesas,rcar-gen2-sdhi";
reg = <0 0xee16 0 0x100>;
interrupts = ;
clocks = < CPG_MOD 311>;
-- 
2.11.0

[PATCH 60/61] ARM: dts: koelsch: Convert to named i2c-gpio bindings

[Simon Horman]

From: Geert Uytterhoeven 

Commits 7d29f509d2cfd807 ("dt-bindings: i2c: i2c-gpio: Add support for
named gpios") and 05c74778858d7d99 ("i2c: gpio: Add support for named
gpios in DT") introduced named i2c-gpio DT bindings, and deprecated the
more error-prone unnamed variant.

Switch to the new bindings, and add the missing GPIO_OPEN_DRAIN I/O
flags, which were implicitly assumed before.

Signed-off-by: Geert Uytterhoeven 
Reviewed-by: Wolfram Sang 
Signed-off-by: Simon Horman 
---
 arch/arm/boot/dts/r8a7791-koelsch.dts | 5 ++---
 1 file changed, 2 insertions(+), 3 deletions(-)

diff --git a/arch/arm/boot/dts/r8a7791-koelsch.dts 
b/arch/arm/boot/dts/r8a7791-koelsch.dts
index fac9cdea4965..a50924d12b6f 100644
--- a/arch/arm/boot/dts/r8a7791-koelsch.dts
+++ b/arch/arm/boot/dts/r8a7791-koelsch.dts
@@ -312,9 +312,8 @@
#size-cells = <0>;
compatible = "i2c-gpio";
status = "disabled";
-   gpios = < 16 GPIO_ACTIVE_HIGH /* sda */
- 15 GPIO_ACTIVE_HIGH /* scl */
-   >;
+   sda-gpios = < 16 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
+   scl-gpios = < 15 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
i2c-gpio,delay-us = <5>;
};
 
-- 
2.11.0

[PATCH 58/61] ARM: dts: armadillo800eva: Convert to named i2c-gpio bindings

[Simon Horman]

From: Geert Uytterhoeven 

Commits 7d29f509d2cfd807 ("dt-bindings: i2c: i2c-gpio: Add support for
named gpios") and 05c74778858d7d99 ("i2c: gpio: Add support for named
gpios in DT") introduced named i2c-gpio DT bindings, and deprecated the
more error-prone unnamed variant.

Switch to the new bindings, and add the missing GPIO_OPEN_DRAIN I/O
flags, which were implicitly assumed before.

The latter gets rid of the message:

gpio-208 (?): enforced open drain please flag it properly in DT/ACPI 
DSDT/board file
gpio-91 (?): enforced open drain please flag it properly in DT/ACPI 
DSDT/board file

Signed-off-by: Geert Uytterhoeven 
Reviewed-by: Wolfram Sang 
Signed-off-by: Simon Horman 
---
 arch/arm/boot/dts/r8a7740-armadillo800eva.dts | 5 ++---
 1 file changed, 2 insertions(+), 3 deletions(-)

diff --git a/arch/arm/boot/dts/r8a7740-armadillo800eva.dts 
b/arch/arm/boot/dts/r8a7740-armadillo800eva.dts
index 1788e186a512..03b00d87b39b 100644
--- a/arch/arm/boot/dts/r8a7740-armadillo800eva.dts
+++ b/arch/arm/boot/dts/r8a7740-armadillo800eva.dts
@@ -131,9 +131,8 @@
#address-cells = <1>;
#size-cells = <0>;
compatible = "i2c-gpio";
-   gpios = < 208 GPIO_ACTIVE_HIGH /* sda */
- 91 GPIO_ACTIVE_HIGH /* scl */
-   >;
+   sda-gpios = < 208 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
+   scl-gpios = < 91 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
i2c-gpio,delay-us = <5>;
};
 
-- 
2.11.0

[PATCH 42/61] ARM: dts: r8a7745: add VIN dt support

[Simon Horman]

From: Fabrizio Castro 

Add VIN[01] support to SoC dt. Also, add aliases.

Signed-off-by: Fabrizio Castro 
Reviewed-by: Biju Das 
Signed-off-by: Simon Horman 
---
 arch/arm/boot/dts/r8a7745.dtsi | 24 
 1 file changed, 24 insertions(+)

diff --git a/arch/arm/boot/dts/r8a7745.dtsi b/arch/arm/boot/dts/r8a7745.dtsi
index 52f13246fc8a..de13e156f071 100644
--- a/arch/arm/boot/dts/r8a7745.dtsi
+++ b/arch/arm/boot/dts/r8a7745.dtsi
@@ -31,6 +31,8 @@
spi1 = 
spi2 = 
spi3 = 
+   vin0 = 
+   vin1 = 
};
 
cpus {
@@ -821,6 +823,28 @@
status = "disabled";
};
 
+   vin0: video@e6ef {
+   compatible = "renesas,vin-r8a7745",
+"renesas,rcar-gen2-vin";
+   reg = <0 0xe6ef 0 0x1000>;
+   interrupts = ;
+   clocks = < CPG_MOD 811>;
+   power-domains = < R8A7745_PD_ALWAYS_ON>;
+   resets = < 811>;
+   status = "disabled";
+   };
+
+   vin1: video@e6ef1000 {
+   compatible = "renesas,vin-r8a7745",
+"renesas,rcar-gen2-vin";
+   reg = <0 0xe6ef1000 0 0x1000>;
+   interrupts = ;
+   clocks = < CPG_MOD 810>;
+   power-domains = < R8A7745_PD_ALWAYS_ON>;
+   resets = < 810>;
+   status = "disabled";
+   };
+
du: display@feb0 {
compatible = "renesas,du-r8a7745";
reg = <0 0xfeb0 0 0x4>;
-- 
2.11.0

[PATCH 47/61] ARM: dts: r8a7790: Update CMT compat strings

[Simon Horman]

From: Magnus Damm 

Use recently updated R-Car Gen2 CMT0 and CMT1 compat strings.

With this change in place we can keep device-specific configuration in
the driver and the driver can be able to support CMT1 specific features.

Signed-off-by: Magnus Damm 
Acked-by: Laurent Pinchart 
Signed-off-by: Geert Uytterhoeven 
Signed-off-by: Simon Horman 
---
 arch/arm/boot/dts/r8a7790.dtsi | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/arm/boot/dts/r8a7790.dtsi b/arch/arm/boot/dts/r8a7790.dtsi
index 6ea06455c0d1..d3c6ab806616 100644
--- a/arch/arm/boot/dts/r8a7790.dtsi
+++ b/arch/arm/boot/dts/r8a7790.dtsi
@@ -311,7 +311,7 @@
};
 
cmt0: timer@ffca {
-   compatible = "renesas,cmt-48-r8a7790", "renesas,cmt-48-gen2";
+   compatible = "renesas,r8a7790-cmt0", "renesas,rcar-gen2-cmt0";
reg = <0 0xffca 0 0x1004>;
interrupts = ,
 ;
@@ -326,7 +326,7 @@
};
 
cmt1: timer@e613 {
-   compatible = "renesas,cmt-48-r8a7790", "renesas,cmt-48-gen2";
+   compatible = "renesas,r8a7790-cmt1", "renesas,rcar-gen2-cmt1";
reg = <0 0xe613 0 0x1004>;
interrupts = ,
 ,
-- 
2.11.0

[PATCH 51/61] ARM: dts: r8a73a4: Remove CMT renesas,channels-mask

[Simon Horman]

From: Magnus Damm 

Update the DTS to remove the now deprecated "renesas,channels-mask"
property.

The channel information is now kept in the device driver and can easily
be determined based on the compat string.

Signed-off-by: Magnus Damm 
Signed-off-by: Geert Uytterhoeven 
Signed-off-by: Simon Horman 
---
 arch/arm/boot/dts/r8a73a4.dtsi | 3 ---
 1 file changed, 3 deletions(-)

diff --git a/arch/arm/boot/dts/r8a73a4.dtsi b/arch/arm/boot/dts/r8a73a4.dtsi
index 805b0fd70f53..8e48090e4fdc 100644
--- a/arch/arm/boot/dts/r8a73a4.dtsi
+++ b/arch/arm/boot/dts/r8a73a4.dtsi
@@ -138,9 +138,6 @@
clocks = <_clks R8A73A4_CLK_CMT1>;
clock-names = "fck";
power-domains = <_c5>;
-
-   renesas,channels-mask = <0xff>;
-
status = "disabled";
};
 
-- 
2.11.0

[PATCH 15/61] ARM: dts: r8a7745: Add USB-DMAC device nodes

[Simon Horman]

From: Biju Das 

From: Biju Das 

Signed-off-by: Biju Das 
Reviewed-by: Fabrizio Castro 
Signed-off-by: Simon Horman 
---
 arch/arm/boot/dts/r8a7745.dtsi | 28 
 1 file changed, 28 insertions(+)

diff --git a/arch/arm/boot/dts/r8a7745.dtsi b/arch/arm/boot/dts/r8a7745.dtsi
index 432aa48ea395..6e0c69bb375d 100644
--- a/arch/arm/boot/dts/r8a7745.dtsi
+++ b/arch/arm/boot/dts/r8a7745.dtsi
@@ -312,6 +312,34 @@
dma-channels = <15>;
};
 
+   usb_dmac0: dma-controller@e65a {
+   compatible = "renesas,r8a7745-usb-dmac",
+"renesas,usb-dmac";
+   reg = <0 0xe65a 0 0x100>;
+   interrupts = ;
+   interrupt-names = "ch0", "ch1";
+   clocks = < CPG_MOD 330>;
+   power-domains = < R8A7745_PD_ALWAYS_ON>;
+   resets = < 330>;
+   #dma-cells = <1>;
+   dma-channels = <2>;
+   };
+
+   usb_dmac1: dma-controller@e65b {
+   compatible = "renesas,r8a7745-usb-dmac",
+"renesas,usb-dmac";
+   reg = <0 0xe65b 0 0x100>;
+   interrupts = ;
+   interrupt-names = "ch0", "ch1";
+   clocks = < CPG_MOD 331>;
+   power-domains = < R8A7745_PD_ALWAYS_ON>;
+   resets = < 331>;
+   #dma-cells = <1>;
+   dma-channels = <2>;
+   };
+
scifa0: serial@e6c4 {
compatible = "renesas,scifa-r8a7745",
 "renesas,rcar-gen2-scifa", "renesas,scifa";
-- 
2.11.0

[PATCH 52/61] ARM: dts: r8a7740: Remove CMT renesas,channels-mask

[Simon Horman]

From: Magnus Damm 

Update the DTS to remove the now deprecated "renesas,channels-mask"
property.

The channel information is now kept in the device driver and can easily
be determined based on the compat string.

Signed-off-by: Magnus Damm 
Signed-off-by: Geert Uytterhoeven 
Signed-off-by: Simon Horman 
---
 arch/arm/boot/dts/r8a7740.dtsi | 3 ---
 1 file changed, 3 deletions(-)

diff --git a/arch/arm/boot/dts/r8a7740.dtsi b/arch/arm/boot/dts/r8a7740.dtsi
index d37d22682a63..95c408b11991 100644
--- a/arch/arm/boot/dts/r8a7740.dtsi
+++ b/arch/arm/boot/dts/r8a7740.dtsi
@@ -74,9 +74,6 @@
clocks = <_clks R8A7740_CLK_CMT1>;
clock-names = "fck";
power-domains = <_c5>;
-
-   renesas,channels-mask = <0x3f>;
-
status = "disabled";
};
 
-- 
2.11.0

[PATCH 53/61] ARM: dts: r8a7790: Remove CMT renesas,channels-mask

[Simon Horman]

From: Magnus Damm 

Update the DTS to remove the now deprecated "renesas,channels-mask"
property.

The channel information is now kept in the device driver and can easily
be determined based on the compat string.

Signed-off-by: Magnus Damm 
Signed-off-by: Geert Uytterhoeven 
Signed-off-by: Simon Horman 
---
 arch/arm/boot/dts/r8a7790.dtsi | 4 
 1 file changed, 4 deletions(-)

diff --git a/arch/arm/boot/dts/r8a7790.dtsi b/arch/arm/boot/dts/r8a7790.dtsi
index d3c6ab806616..e2c530c330a8 100644
--- a/arch/arm/boot/dts/r8a7790.dtsi
+++ b/arch/arm/boot/dts/r8a7790.dtsi
@@ -320,8 +320,6 @@
power-domains = < R8A7790_PD_ALWAYS_ON>;
resets = < 124>;
 
-   renesas,channels-mask = <0x60>;
-
status = "disabled";
};
 
@@ -341,8 +339,6 @@
power-domains = < R8A7790_PD_ALWAYS_ON>;
resets = < 329>;
 
-   renesas,channels-mask = <0xff>;
-
status = "disabled";
};
 
-- 
2.11.0

[PATCH 61/61] ARM: dts: alt: Convert to named i2c-gpio bindings

[Simon Horman]

From: Geert Uytterhoeven 

Commits 7d29f509d2cfd807 ("dt-bindings: i2c: i2c-gpio: Add support for
named gpios") and 05c74778858d7d99 ("i2c: gpio: Add support for named
gpios in DT") introduced named i2c-gpio DT bindings, and deprecated the
more error-prone unnamed variant.

Switch to the new bindings, and add the missing GPIO_OPEN_DRAIN I/O
flags, which were implicitly assumed before.

Signed-off-by: Geert Uytterhoeven 
Reviewed-by: Wolfram Sang 
Signed-off-by: Simon Horman 
---
 arch/arm/boot/dts/r8a7794-alt.dts | 5 ++---
 1 file changed, 2 insertions(+), 3 deletions(-)

diff --git a/arch/arm/boot/dts/r8a7794-alt.dts 
b/arch/arm/boot/dts/r8a7794-alt.dts
index bd98790d964e..60c6515c4996 100644
--- a/arch/arm/boot/dts/r8a7794-alt.dts
+++ b/arch/arm/boot/dts/r8a7794-alt.dts
@@ -143,9 +143,8 @@
#size-cells = <0>;
compatible = "i2c-gpio";
status = "disabled";
-   gpios = < 9 GPIO_ACTIVE_HIGH /* sda */
- 8 GPIO_ACTIVE_HIGH /* scl */
-   >;
+   sda-gpios = < 9 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
+   scl-gpios = < 8 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
i2c-gpio,delay-us = <5>;
};
 
-- 
2.11.0

[PATCH 50/61] ARM: dts: r8a7794: Update CMT compat strings

[Simon Horman]

From: Magnus Damm 

Use recently updated R-Car Gen2 CMT0 and CMT1 compat strings.

With this change in place we can keep device-specific configuration in
the driver and the driver can be able to support CMT1 specific features.

Signed-off-by: Magnus Damm 
Acked-by: Laurent Pinchart 
Signed-off-by: Geert Uytterhoeven 
Signed-off-by: Simon Horman 
---
 arch/arm/boot/dts/r8a7794.dtsi | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/arm/boot/dts/r8a7794.dtsi b/arch/arm/boot/dts/r8a7794.dtsi
index 90050565114c..67aa409b32bf 100644
--- a/arch/arm/boot/dts/r8a7794.dtsi
+++ b/arch/arm/boot/dts/r8a7794.dtsi
@@ -188,7 +188,7 @@
};
 
cmt0: timer@ffca {
-   compatible = "renesas,cmt-48-gen2";
+   compatible = "renesas,r8a7794-cmt0", "renesas,rcar-gen2-cmt0";
reg = <0 0xffca 0 0x1004>;
interrupts = ,
 ;
@@ -203,7 +203,7 @@
};
 
cmt1: timer@e613 {
-   compatible = "renesas,cmt-48-gen2";
+   compatible = "renesas,r8a7794-cmt1", "renesas,rcar-gen2-cmt1";
reg = <0 0xe613 0 0x1004>;
interrupts = ,
 ,
-- 
2.11.0

[PATCH 48/61] ARM: dts: r8a7791: Update CMT compat strings

[Simon Horman]

From: Magnus Damm 

Use recently updated R-Car Gen2 CMT0 and CMT1 compat strings.

With this change in place we can keep device-specific configuration in
the driver and the driver can be able to support CMT1 specific features.

Signed-off-by: Magnus Damm 
Acked-by: Laurent Pinchart 
Signed-off-by: Geert Uytterhoeven 
Signed-off-by: Simon Horman 
---
 arch/arm/boot/dts/r8a7791.dtsi | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/arm/boot/dts/r8a7791.dtsi b/arch/arm/boot/dts/r8a7791.dtsi
index e888b5b0e135..a69d6f883b34 100644
--- a/arch/arm/boot/dts/r8a7791.dtsi
+++ b/arch/arm/boot/dts/r8a7791.dtsi
@@ -257,7 +257,7 @@
};
 
cmt0: timer@ffca {
-   compatible = "renesas,cmt-48-r8a7791", "renesas,cmt-48-gen2";
+   compatible = "renesas,r8a7791-cmt0", "renesas,rcar-gen2-cmt0";
reg = <0 0xffca 0 0x1004>;
interrupts = ,
 ;
@@ -272,7 +272,7 @@
};
 
cmt1: timer@e613 {
-   compatible = "renesas,cmt-48-r8a7791", "renesas,cmt-48-gen2";
+   compatible = "renesas,r8a7791-cmt1", "renesas,rcar-gen2-cmt1";
reg = <0 0xe613 0 0x1004>;
interrupts = ,
 ,
-- 
2.11.0

[PATCH 54/61] ARM: dts: r8a7791: Remove CMT renesas,channels-mask

[Simon Horman]

From: Magnus Damm 

Update the DTS to remove the now deprecated "renesas,channels-mask"
property.

The channel information is now kept in the device driver and can easily
be determined based on the compat string.

Signed-off-by: Magnus Damm 
Signed-off-by: Geert Uytterhoeven 
Signed-off-by: Simon Horman 
---
 arch/arm/boot/dts/r8a7791.dtsi | 4 
 1 file changed, 4 deletions(-)

diff --git a/arch/arm/boot/dts/r8a7791.dtsi b/arch/arm/boot/dts/r8a7791.dtsi
index a69d6f883b34..dfc1c406179f 100644
--- a/arch/arm/boot/dts/r8a7791.dtsi
+++ b/arch/arm/boot/dts/r8a7791.dtsi
@@ -266,8 +266,6 @@
power-domains = < R8A7791_PD_ALWAYS_ON>;
resets = < 124>;
 
-   renesas,channels-mask = <0x60>;
-
status = "disabled";
};
 
@@ -287,8 +285,6 @@
power-domains = < R8A7791_PD_ALWAYS_ON>;
resets = < 329>;
 
-   renesas,channels-mask = <0xff>;
-
status = "disabled";
};
 
-- 
2.11.0

[PATCH 20/61] ARM: dts: r8a7745: Use R-Car SDHI Gen2 fallback compat string

[Simon Horman]

Use newly added R-Car SDHI Gen2 fallback compat string
in the DT of the r8a7745 SoC.

This should have no run-time effect as the driver matches against
the per-SoC compat string before considering the fallback compat string.

Signed-off-by: Simon Horman 
---
 arch/arm/boot/dts/r8a7745.dtsi | 9 ++---
 1 file changed, 6 insertions(+), 3 deletions(-)

diff --git a/arch/arm/boot/dts/r8a7745.dtsi b/arch/arm/boot/dts/r8a7745.dtsi
index 16dc4895b455..846c27a00c54 100644
--- a/arch/arm/boot/dts/r8a7745.dtsi
+++ b/arch/arm/boot/dts/r8a7745.dtsi
@@ -870,7 +870,8 @@
};
 
sdhi0: sd@ee10 {
-   compatible = "renesas,sdhi-r8a7745";
+   compatible = "renesas,sdhi-r8a7745",
+"renesas,rcar-gen2-sdhi";
reg = <0 0xee10 0 0x328>;
interrupts = ;
clocks = < CPG_MOD 314>;
@@ -884,7 +885,8 @@
};
 
sdhi1: sd@ee14 {
-   compatible = "renesas,sdhi-r8a7745";
+   compatible = "renesas,sdhi-r8a7745",
+"renesas,rcar-gen2-sdhi";
reg = <0 0xee14 0 0x100>;
interrupts = ;
clocks = < CPG_MOD 312>;
@@ -898,7 +900,8 @@
};
 
sdhi2: sd@ee16 {
-   compatible = "renesas,sdhi-r8a7745";
+   compatible = "renesas,sdhi-r8a7745",
+"renesas,rcar-gen2-sdhi";
reg = <0 0xee16 0 0x100>;
interrupts = ;
clocks = < CPG_MOD 311>;
-- 
2.11.0

[PATCH 49/61] ARM: dts: r8a7793: Update CMT compat strings

[Simon Horman]

From: Magnus Damm 

Use recently updated R-Car Gen2 CMT0 and CMT1 compat strings.

With this change in place we can keep device-specific configuration in
the driver and the driver can be able to support CMT1 specific features.

Signed-off-by: Magnus Damm 
Acked-by: Laurent Pinchart 
Signed-off-by: Geert Uytterhoeven 
Signed-off-by: Simon Horman 
---
 arch/arm/boot/dts/r8a7793.dtsi | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/arm/boot/dts/r8a7793.dtsi b/arch/arm/boot/dts/r8a7793.dtsi
index 6e74d0855931..4a79da3ddbef 100644
--- a/arch/arm/boot/dts/r8a7793.dtsi
+++ b/arch/arm/boot/dts/r8a7793.dtsi
@@ -248,7 +248,7 @@
};
 
cmt0: timer@ffca {
-   compatible = "renesas,cmt-48-r8a7793", "renesas,cmt-48-gen2";
+   compatible = "renesas,r8a7793-cmt0", "renesas,rcar-gen2-cmt0";
reg = <0 0xffca 0 0x1004>;
interrupts = ,
 ;
@@ -263,7 +263,7 @@
};
 
cmt1: timer@e613 {
-   compatible = "renesas,cmt-48-r8a7793", "renesas,cmt-48-gen2";
+   compatible = "renesas,r8a7793-cmt1", "renesas,rcar-gen2-cmt1";
reg = <0 0xe613 0 0x1004>;
interrupts = ,
 ,
-- 
2.11.0

[PATCH 56/61] ARM: dts: r8a7794: Remove CMT renesas,channels-mask

[Simon Horman]

From: Magnus Damm 

Update the DTS to remove the now deprecated "renesas,channels-mask"
property.

The channel information is now kept in the device driver and can easily
be determined based on the compat string.

Signed-off-by: Magnus Damm 
Signed-off-by: Geert Uytterhoeven 
Signed-off-by: Simon Horman 
---
 arch/arm/boot/dts/r8a7794.dtsi | 4 
 1 file changed, 4 deletions(-)

diff --git a/arch/arm/boot/dts/r8a7794.dtsi b/arch/arm/boot/dts/r8a7794.dtsi
index 67aa409b32bf..96e405e70d9a 100644
--- a/arch/arm/boot/dts/r8a7794.dtsi
+++ b/arch/arm/boot/dts/r8a7794.dtsi
@@ -197,8 +197,6 @@
power-domains = < R8A7794_PD_ALWAYS_ON>;
resets = < 124>;
 
-   renesas,channels-mask = <0x60>;
-
status = "disabled";
};
 
@@ -218,8 +216,6 @@
power-domains = < R8A7794_PD_ALWAYS_ON>;
resets = < 329>;
 
-   renesas,channels-mask = <0xff>;
-
status = "disabled";
};
 
-- 
2.11.0

[PATCH 45/61] ARM: dts: r8a7794: Add SMP support

[Simon Horman]

From: Sergei Shtylyov 

Add the device tree node for the Advanced Power Management Unit (APMU).
Use the "enable-method" prop to  point out that the APMU should be used
for the SMP support.

Signed-off-by: Sergei Shtylyov 
Signed-off-by: Geert Uytterhoeven 
Tested-by: Simon Horman 
Signed-off-by: Simon Horman 
---
 arch/arm/boot/dts/r8a7794.dtsi | 7 +++
 1 file changed, 7 insertions(+)

diff --git a/arch/arm/boot/dts/r8a7794.dtsi b/arch/arm/boot/dts/r8a7794.dtsi
index 95206c25e6a1..90050565114c 100644
--- a/arch/arm/boot/dts/r8a7794.dtsi
+++ b/arch/arm/boot/dts/r8a7794.dtsi
@@ -37,6 +37,7 @@
cpus {
#address-cells = <1>;
#size-cells = <0>;
+   enable-method = "renesas,apmu";
 
cpu0: cpu@0 {
device_type = "cpu";
@@ -66,6 +67,12 @@
};
};
 
+   apmu@e6151000 {
+   compatible = "renesas,r8a7794-apmu", "renesas,apmu";
+   reg = <0 0xe6151000 0 0x188>;
+   cpus = < >;
+   };
+
gic: interrupt-controller@f1001000 {
compatible = "arm,gic-400";
#interrupt-cells = <3>;
-- 
2.11.0

[PATCH 19/61] ARM: dts: r8a7743: Use R-Car SDHI Gen2 fallback compat string

[Simon Horman]

Use newly added R-Car SDHI Gen2 fallback compat string
in the DT of the r8a7743 SoC.

This should have no run-time effect as the driver matches against
the per-SoC compat string before considering the fallback compat string.

Signed-off-by: Simon Horman 
---
 arch/arm/boot/dts/r8a7743.dtsi | 9 ++---
 1 file changed, 6 insertions(+), 3 deletions(-)

diff --git a/arch/arm/boot/dts/r8a7743.dtsi b/arch/arm/boot/dts/r8a7743.dtsi
index 112a72baa7a4..6aa86b75b80c 100644
--- a/arch/arm/boot/dts/r8a7743.dtsi
+++ b/arch/arm/boot/dts/r8a7743.dtsi
@@ -954,7 +954,8 @@
};
 
sdhi0: sd@ee10 {
-   compatible = "renesas,sdhi-r8a7743";
+   compatible = "renesas,sdhi-r8a7743",
+"renesas,rcar-gen2-sdhi";
reg = <0 0xee10 0 0x328>;
interrupts = ;
clocks = < CPG_MOD 314>;
@@ -968,7 +969,8 @@
};
 
sdhi1: sd@ee14 {
-   compatible = "renesas,sdhi-r8a7743";
+   compatible = "renesas,sdhi-r8a7743",
+"renesas,rcar-gen2-sdhi";
reg = <0 0xee14 0 0x100>;
interrupts = ;
clocks = < CPG_MOD 312>;
@@ -982,7 +984,8 @@
};
 
sdhi2: sd@ee16 {
-   compatible = "renesas,sdhi-r8a7743";
+   compatible = "renesas,sdhi-r8a7743",
+"renesas,rcar-gen2-sdhi";
reg = <0 0xee16 0 0x100>;
interrupts = ;
clocks = < CPG_MOD 311>;
-- 
2.11.0

[PATCH 31/61] ARM: dts: iwg22d-sodimm-dbhd-ca: Add HDMI video output

[Simon Horman]

From: Fabrizio Castro 

This patch enables the HDMI interface found on the expansion board.

Signed-off-by: Fabrizio Castro 
Reviewed-by: Biju Das 
Acked-by: Laurent Pinchart 
Signed-off-by: Simon Horman 
---
 .../arm/boot/dts/r8a7745-iwg22d-sodimm-dbhd-ca.dts | 85 ++
 1 file changed, 85 insertions(+)

diff --git a/arch/arm/boot/dts/r8a7745-iwg22d-sodimm-dbhd-ca.dts 
b/arch/arm/boot/dts/r8a7745-iwg22d-sodimm-dbhd-ca.dts
index f925388454da..a8a4ec87378d 100644
--- a/arch/arm/boot/dts/r8a7745-iwg22d-sodimm-dbhd-ca.dts
+++ b/arch/arm/boot/dts/r8a7745-iwg22d-sodimm-dbhd-ca.dts
@@ -20,6 +20,38 @@
serial4 = 
serial6 = 
};
+
+   cec_clock: cec-clock {
+   compatible = "fixed-clock";
+   #clock-cells = <0>;
+   clock-frequency = <1200>;
+   };
+
+   hdmi-out {
+   compatible = "hdmi-connector";
+   type = "a";
+
+   port {
+   hdmi_con: endpoint {
+   remote-endpoint = <_out>;
+   };
+   };
+   };
+};
+
+ {
+   pinctrl-0 = <_pins>;
+   pinctrl-names = "default";
+
+   status = "okay";
+
+   ports {
+   port@0 {
+   endpoint {
+   remote-endpoint = <_in>;
+   };
+   };
+   };
 };
 
  {
@@ -29,12 +61,65 @@
status = "okay";
 };
 
+ {
+   pinctrl-0 = <_pins>;
+   pinctrl-names = "default";
+
+   status = "okay";
+   clock-frequency = <40>;
+
+   hdmi@39 {
+   compatible = "adi,adv7511w";
+   reg = <0x39>;
+   interrupt-parent = <>;
+   interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
+   clocks = <_clock>;
+   clock-names = "cec";
+   pd-gpios = < 24 GPIO_ACTIVE_HIGH>;
+
+   adi,input-depth = <8>;
+   adi,input-colorspace = "rgb";
+   adi,input-clock = "1x";
+   adi,input-style = <1>;
+   adi,input-justification = "evenly";
+
+   ports {
+   #address-cells = <1>;
+   #size-cells = <0>;
+
+   port@0 {
+   reg = <0>;
+   adv7511_in: endpoint {
+   remote-endpoint = <_out_rgb0>;
+   };
+   };
+
+   port@1 {
+   reg = <1>;
+   adv7511_out: endpoint {
+   remote-endpoint = <_con>;
+   };
+   };
+   };
+   };
+};
+
  {
+   du0_pins: du0 {
+   groups = "du0_rgb888", "du0_sync", "du0_disp", "du0_clk0_out";
+   function = "du0";
+   };
+
hscif2_pins: hscif2 {
groups = "hscif2_data";
function = "hscif2";
};
 
+   i2c1_pins: i2c1 {
+   groups = "i2c1_d";
+   function = "i2c1";
+   };
+
scif1_pins: scif1 {
groups = "scif1_data";
function = "scif1";
-- 
2.11.0

[PATCH 36/61] ARM: dts: iwg20d-q7-common: Add can0 support to carrier board

[Simon Horman]

From: Fabrizio Castro 

This patch enables CAN0 interface exposed through connector J20 on the
carrier board.

Signed-off-by: Fabrizio Castro 
Reviewed-by: Biju Das 
Signed-off-by: Simon Horman 
---
 arch/arm/boot/dts/iwg20d-q7-common.dtsi | 12 
 1 file changed, 12 insertions(+)

diff --git a/arch/arm/boot/dts/iwg20d-q7-common.dtsi 
b/arch/arm/boot/dts/iwg20d-q7-common.dtsi
index c865499ad2a1..3e4bc4d6b9d3 100644
--- a/arch/arm/boot/dts/iwg20d-q7-common.dtsi
+++ b/arch/arm/boot/dts/iwg20d-q7-common.dtsi
@@ -59,6 +59,13 @@
};
 };
 
+ {
+   pinctrl-0 = <_pins>;
+   pinctrl-names = "default";
+
+   status = "okay";
+};
+
  {
status = "okay";
pinctrl-0 = <_pins>;
@@ -90,6 +97,11 @@
 };
 
  {
+   can0_pins: can0 {
+   groups = "can0_data_d";
+   function = "can0";
+   };
+
avb_pins: avb {
groups = "avb_mdio", "avb_gmii";
function = "avb";
-- 
2.11.0

[PATCH 17/61] ARM: dts: iwg22d-sodimm: Enable HS-USB

[Simon Horman]

From: Biju Das 

From: Biju Das 

Enable HS-USB on iWave RZ/G1E carrier board.

Signed-off-by: Biju Das 
Reviewed-by: Fabrizio Castro 
Signed-off-by: Simon Horman 
---
 arch/arm/boot/dts/r8a7745-iwg22d-sodimm.dts | 11 +++
 1 file changed, 11 insertions(+)

diff --git a/arch/arm/boot/dts/r8a7745-iwg22d-sodimm.dts 
b/arch/arm/boot/dts/r8a7745-iwg22d-sodimm.dts
index 3eb4f83297d4..80c82aa94c06 100644
--- a/arch/arm/boot/dts/r8a7745-iwg22d-sodimm.dts
+++ b/arch/arm/boot/dts/r8a7745-iwg22d-sodimm.dts
@@ -67,6 +67,12 @@
status = "okay";
 };
 
+ {
+   status = "okay";
+   pinctrl-0 = <_pins>;
+   pinctrl-names = "default";
+};
+
  {
status = "okay";
pinctrl-0 = <_pins>;
@@ -95,6 +101,11 @@
power-source = <3300>;
};
 
+   usb0_pins: usb0 {
+   groups = "usb0";
+   function = "usb0";
+   };
+
usb1_pins: usb1 {
groups = "usb1";
function = "usb1";
-- 
2.11.0

[PATCH 13/61] ARM: dts: iwg22d-sodimm: sort dt nodes

[Simon Horman]

From: Fabrizio Castro 

Improve the layout of r8a7745-iwg22d-sodimm.dts by sorting the
nodes alphabetically.

Signed-off-by: Fabrizio Castro 
Signed-off-by: Chris Paterson 
Signed-off-by: Simon Horman 
---
 arch/arm/boot/dts/r8a7745-iwg22d-sodimm.dts | 62 ++---
 1 file changed, 31 insertions(+), 31 deletions(-)

diff --git a/arch/arm/boot/dts/r8a7745-iwg22d-sodimm.dts 
b/arch/arm/boot/dts/r8a7745-iwg22d-sodimm.dts
index 82587d7b2056..3eb4f83297d4 100644
--- a/arch/arm/boot/dts/r8a7745-iwg22d-sodimm.dts
+++ b/arch/arm/boot/dts/r8a7745-iwg22d-sodimm.dts
@@ -16,9 +16,9 @@
compatible = "iwave,g22d", "iwave,g22m", "renesas,r8a7745";
 
aliases {
+   ethernet0 = 
serial3 = 
serial5 = 
-   ethernet0 = 
};
 
chosen {
@@ -40,6 +40,25 @@
};
 };
 
+ {
+   pinctrl-0 = <_pins>;
+   pinctrl-names = "default";
+
+   phy-handle = <>;
+   phy-mode = "gmii";
+   renesas,no-ether-link;
+   status = "okay";
+
+   phy3: ethernet-phy@3 {
+   /*
+* On some older versions of the platform (before R4.0) the phy address
+* may be 1 or 3. The address is fixed to 3 for R4.0 onwards.
+*/
+   reg = <3>;
+   micrel,led-mode = <1>;
+   };
+};
+
  {
pinctrl-0 = <_pins>;
pinctrl-names = "default";
@@ -48,7 +67,18 @@
status = "okay";
 };
 
+ {
+   status = "okay";
+   pinctrl-0 = <_pins>;
+   pinctrl-names = "default";
+};
+
  {
+   avb_pins: avb {
+   groups = "avb_mdio", "avb_gmii";
+   function = "avb";
+   };
+
hscif1_pins: hscif1 {
groups = "hscif1_data", "hscif1_ctrl";
function = "hscif1";
@@ -59,11 +89,6 @@
function = "scif4";
};
 
-   avb_pins: avb {
-   groups = "avb_mdio", "avb_gmii";
-   function = "avb";
-   };
-
sdhi0_pins: sd0 {
groups = "sdhi0_data4", "sdhi0_ctrl";
function = "sdhi0";
@@ -83,25 +108,6 @@
status = "okay";
 };
 
- {
-   pinctrl-0 = <_pins>;
-   pinctrl-names = "default";
-
-   phy-handle = <>;
-   phy-mode = "gmii";
-   renesas,no-ether-link;
-   status = "okay";
-
-   phy3: ethernet-phy@3 {
-   /*
-* On some older versions of the platform (before R4.0) the phy address
-* may be 1 or 3. The address is fixed to 3 for R4.0 onwards.
-*/
-   reg = <3>;
-   micrel,led-mode = <1>;
-   };
-};
-
  {
pinctrl-0 = <_pins>;
pinctrl-names = "default";
@@ -112,12 +118,6 @@
status = "okay";
 };
 
- {
-   status = "okay";
-   pinctrl-0 = <_pins>;
-   pinctrl-names = "default";
-};
-
  {
status = "okay";
 };
-- 
2.11.0

[PATCH 34/61] ARM: dts: iwg22d-sodimm-dbhd-ca: Add can1 support to HDMI DB

[Simon Horman]

From: Fabrizio Castro 

CAN1 interface is exposed via connector J1 found on the HDMI daughter
board. This patch enables can1 DT node from within the daughter board
specific device tree.

Signed-off-by: Fabrizio Castro 
Reviewed-by: Biju Das 
Signed-off-by: Simon Horman 
---
 arch/arm/boot/dts/r8a7745-iwg22d-sodimm-dbhd-ca.dts | 12 
 1 file changed, 12 insertions(+)

diff --git a/arch/arm/boot/dts/r8a7745-iwg22d-sodimm-dbhd-ca.dts 
b/arch/arm/boot/dts/r8a7745-iwg22d-sodimm-dbhd-ca.dts
index a8a4ec87378d..d34de8266ccd 100644
--- a/arch/arm/boot/dts/r8a7745-iwg22d-sodimm-dbhd-ca.dts
+++ b/arch/arm/boot/dts/r8a7745-iwg22d-sodimm-dbhd-ca.dts
@@ -54,6 +54,13 @@
};
 };
 
+ {
+   pinctrl-0 = <_pins>;
+   pinctrl-names = "default";
+
+   status = "okay";
+};
+
  {
pinctrl-0 = <_pins>;
pinctrl-names = "default";
@@ -105,6 +112,11 @@
 };
 
  {
+   can1_pins: can1 {
+   groups = "can1_data_b";
+   function = "can1";
+   };
+
du0_pins: du0 {
groups = "du0_rgb888", "du0_sync", "du0_disp", "du0_clk0_out";
function = "du0";
-- 
2.11.0

[PATCH 38/61] ARM: dts: r8a7743: Add default PCIe bus clock

[Simon Horman]

From: Biju Das 

This patch adds a default PCIe bus clock node.

Signed-off-by: Biju Das 
Reviewed-by: Fabrizio Castro 
Signed-off-by: Simon Horman 
---
 arch/arm/boot/dts/r8a7743.dtsi | 7 +++
 1 file changed, 7 insertions(+)

diff --git a/arch/arm/boot/dts/r8a7743.dtsi b/arch/arm/boot/dts/r8a7743.dtsi
index 12c7b9267fd7..de4b8c64d56b 100644
--- a/arch/arm/boot/dts/r8a7743.dtsi
+++ b/arch/arm/boot/dts/r8a7743.dtsi
@@ -1189,6 +1189,13 @@
clock-frequency = <0>;
};
 
+   /* External PCIe clock - can be overridden by the board */
+   pcie_bus_clk: pcie_bus {
+   compatible = "fixed-clock";
+   #clock-cells = <0>;
+   clock-frequency = <0>;
+   };
+
/* External SCIF clock */
scif_clk: scif {
compatible = "fixed-clock";
-- 
2.11.0

[PATCH 46/61] ARM: dts: r8a73a4: Update CMT compat string

[Simon Horman]

From: Magnus Damm 

Use the recently updated r8a73a4 CMT1 compat string.

With this change in place we can keep device-specific configuration in
the driver and the driver can be able to support CMT1 specific features.

Signed-off-by: Magnus Damm 
Acked-by: Laurent Pinchart 
Signed-off-by: Geert Uytterhoeven 
Signed-off-by: Simon Horman 
---
 arch/arm/boot/dts/r8a73a4.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/boot/dts/r8a73a4.dtsi b/arch/arm/boot/dts/r8a73a4.dtsi
index dd4d09712a2a..805b0fd70f53 100644
--- a/arch/arm/boot/dts/r8a73a4.dtsi
+++ b/arch/arm/boot/dts/r8a73a4.dtsi
@@ -132,7 +132,7 @@
};
 
cmt1: timer@e613 {
-   compatible = "renesas,cmt-48-r8a73a4", "renesas,cmt-48-gen2";
+   compatible = "renesas,r8a73a4-cmt1", "renesas,rcar-gen2-cmt1";
reg = <0 0xe613 0 0x1004>;
interrupts = ;
clocks = <_clks R8A73A4_CLK_CMT1>;
-- 
2.11.0

[PATCH 37/61] ARM: dts: iwg20d-q7-dbcm-ca: Add can1 support to camera DB

[Simon Horman]

From: Fabrizio Castro 

CAN1 interface is exposed via connector J3 found on the camera daughter
board. This patch enables can1 DT node from within the daughter board
specific dtsi.

Signed-off-by: Fabrizio Castro 
Reviewed-by: Biju Das 
Signed-off-by: Simon Horman 
---
 arch/arm/boot/dts/iwg20d-q7-dbcm-ca.dtsi | 12 
 1 file changed, 12 insertions(+)

diff --git a/arch/arm/boot/dts/iwg20d-q7-dbcm-ca.dtsi 
b/arch/arm/boot/dts/iwg20d-q7-dbcm-ca.dtsi
index 4db18f2ef303..476273b3f994 100644
--- a/arch/arm/boot/dts/iwg20d-q7-dbcm-ca.dtsi
+++ b/arch/arm/boot/dts/iwg20d-q7-dbcm-ca.dtsi
@@ -32,6 +32,13 @@
};
 };
 
+ {
+   pinctrl-0 = <_pins>;
+   pinctrl-names = "default";
+
+   status = "okay";
+};
+
  {
pinctrl-0 = <_pins>;
pinctrl-names = "default";
@@ -94,6 +101,11 @@
 };
 
  {
+   can1_pins: can1 {
+   groups = "can1_data_d";
+   function = "can1";
+   };
+
du_pins: du {
groups = "du_rgb888", "du_sync", "du_oddf", "du_clk_out_0";
function = "du";
-- 
2.11.0

[PATCH 44/61] ARM: dts: genmai: Correct primary compatible value for eeprom

[Simon Horman]

From: Geert Uytterhoeven 

The Renesas part number of the two-wire serial interface EEPROM is not
24C128, but R1EX24128ASA00A.

Hence change its primary compatible value to "renesas,r1ex24128".

Signed-off-by: Geert Uytterhoeven 
Signed-off-by: Simon Horman 
---
 arch/arm/boot/dts/r7s72100-genmai.dts | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/boot/dts/r7s72100-genmai.dts 
b/arch/arm/boot/dts/r7s72100-genmai.dts
index cd4d5ff7749e..5af2a0116ff2 100644
--- a/arch/arm/boot/dts/r7s72100-genmai.dts
+++ b/arch/arm/boot/dts/r7s72100-genmai.dts
@@ -123,7 +123,7 @@
pinctrl-0 = <_pins>;
 
eeprom@50 {
-   compatible = "renesas,24c128", "atmel,24c128";
+   compatible = "renesas,r1ex24128", "atmel,24c128";
reg = <0x50>;
pagesize = <64>;
};
-- 
2.11.0

[PATCH 02/61] ARM: dts: r8a7745: Use R-Car Gen2 Ether fallback compat string

[Simon Horman]

Use newly added R-Car Gen2 Ether fallback compat string
in the DT of the r8a7745 SoC.

This should have no run-time effect as the driver matches against
the per-SoC compat string before considering the fallback compat string.

Signed-off-by: Simon Horman 
Reviewed-by: Geert Uytterhoeven 
---
 arch/arm/boot/dts/r8a7745.dtsi | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/arch/arm/boot/dts/r8a7745.dtsi b/arch/arm/boot/dts/r8a7745.dtsi
index 3a50f703601c..6ad93f0deb8f 100644
--- a/arch/arm/boot/dts/r8a7745.dtsi
+++ b/arch/arm/boot/dts/r8a7745.dtsi
@@ -615,7 +615,8 @@
};
 
ether: ethernet@ee70 {
-   compatible = "renesas,ether-r8a7745";
+   compatible = "renesas,ether-r8a7745",
+"renesas,rcar-gen2-ether";
reg = <0 0xee70 0 0x400>;
interrupts = ;
clocks = < CPG_MOD 813>;
-- 
2.11.0

[PATCH 28/61] ARM: dts: iwg20d-q7: Add support for ttySC3

[Simon Horman]

From: Fabrizio Castro 

Signed-off-by: Fabrizio Castro 
Signed-off-by: Chris Paterson 
Reviewed-by: Geert Uytterhoeven 
Signed-off-by: Simon Horman 
---
 arch/arm/boot/dts/iwg20d-q7-common.dtsi | 14 ++
 1 file changed, 14 insertions(+)

diff --git a/arch/arm/boot/dts/iwg20d-q7-common.dtsi 
b/arch/arm/boot/dts/iwg20d-q7-common.dtsi
index efd8af9242d1..c865499ad2a1 100644
--- a/arch/arm/boot/dts/iwg20d-q7-common.dtsi
+++ b/arch/arm/boot/dts/iwg20d-q7-common.dtsi
@@ -11,6 +11,7 @@
 / {
aliases {
serial0 = 
+   serial3 = 
ethernet0 = 
};
 
@@ -104,6 +105,11 @@
function = "scif0";
};
 
+   scifb1_pins: scifb1 {
+   groups = "scifb1_data_d", "scifb1_ctrl";
+   function = "scifb1";
+   };
+
sdhi1_pins: sd1 {
groups = "sdhi1_data4", "sdhi1_ctrl";
function = "sdhi1";
@@ -134,6 +140,14 @@
status = "okay";
 };
 
+ {
+   pinctrl-0 = <_pins>;
+   pinctrl-names = "default";
+
+   uart-has-rtscts;
+   status = "okay";
+};
+
  {
pinctrl-0 = <_pins>;
pinctrl-1 = <_pins_uhs>;
-- 
2.11.0

[PATCH 05/61] ARM: dts: r8a7791: Use R-Car Gen2 Ether fallback compat string

[Simon Horman]

Use newly added R-Car Gen2 Ether fallback compat string
in the DT of the r8a7791 SoC.

This should have no run-time effect as the driver matches against
the per-SoC compat string before considering the fallback compat string.

Signed-off-by: Simon Horman 
Reviewed-by: Geert Uytterhoeven 
---
 arch/arm/boot/dts/r8a7791.dtsi | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/arch/arm/boot/dts/r8a7791.dtsi b/arch/arm/boot/dts/r8a7791.dtsi
index 67831d0405f3..9815a933e4cc 100644
--- a/arch/arm/boot/dts/r8a7791.dtsi
+++ b/arch/arm/boot/dts/r8a7791.dtsi
@@ -961,7 +961,8 @@
};
 
ether: ethernet@ee70 {
-   compatible = "renesas,ether-r8a7791";
+   compatible = "renesas,ether-r8a7791",
+"renesas,rcar-gen2-ether";
reg = <0 0xee70 0 0x400>;
interrupts = ;
clocks = < CPG_MOD 813>;
-- 
2.11.0

[PATCH 12/61] ARM: dts: iwg22d-sodimm-dbhd-ca: Add device tree for HDMI DB

[Simon Horman]

From: Fabrizio Castro 

Add file r8a7745-iwg22d-sodimm-dbhd-ca.dts to provide support for
iW-RainboW-G22D with HDMI daughter board plugged in.

The interfaces defined in the new .dts file are: scif1, scif5,
and hscif2.

Signed-off-by: Fabrizio Castro 
Signed-off-by: Chris Paterson 
Signed-off-by: Simon Horman 
---
 arch/arm/boot/dts/Makefile |  1 +
 .../arm/boot/dts/r8a7745-iwg22d-sodimm-dbhd-ca.dts | 61 ++
 2 files changed, 62 insertions(+)
 create mode 100644 arch/arm/boot/dts/r8a7745-iwg22d-sodimm-dbhd-ca.dts

diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index d0381e9caf21..21396726b437 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -756,6 +756,7 @@ dtb-$(CONFIG_ARCH_RENESAS) += \
r8a7743-iwg20d-q7-dbcm-ca.dtb \
r8a7743-sk-rzg1m.dtb \
r8a7745-iwg22d-sodimm.dtb \
+   r8a7745-iwg22d-sodimm-dbhd-ca.dtb \
r8a7745-sk-rzg1e.dtb \
r8a7778-bockw.dtb \
r8a7779-marzen.dtb \
diff --git a/arch/arm/boot/dts/r8a7745-iwg22d-sodimm-dbhd-ca.dts 
b/arch/arm/boot/dts/r8a7745-iwg22d-sodimm-dbhd-ca.dts
new file mode 100644
index ..f925388454da
--- /dev/null
+++ b/arch/arm/boot/dts/r8a7745-iwg22d-sodimm-dbhd-ca.dts
@@ -0,0 +1,61 @@
+/*
+ * Device Tree Source for the iWave-RZG1E SODIMM carrier board + HDMI daughter
+ * board
+ *
+ * Copyright (C) 2017 Renesas Electronics Corp.
+ *
+ * This file is licensed under the terms of the GNU General Public License
+ * version 2.  This program is licensed "as is" without any warranty of any
+ * kind, whether express or implied.
+ */
+
+#include "r8a7745-iwg22d-sodimm.dts"
+
+/ {
+   model = "iWave RainboW-G22D-SODIMM RZ/G1E based board with HDMI add-on";
+   compatible = "iwave,g22d", "iwave,g22m", "renesas,r8a7745";
+
+   aliases {
+   serial0 = 
+   serial4 = 
+   serial6 = 
+   };
+};
+
+ {
+   pinctrl-0 = <_pins>;
+   pinctrl-names = "default";
+
+   status = "okay";
+};
+
+ {
+   hscif2_pins: hscif2 {
+   groups = "hscif2_data";
+   function = "hscif2";
+   };
+
+   scif1_pins: scif1 {
+   groups = "scif1_data";
+   function = "scif1";
+   };
+
+   scif5_pins: scif5 {
+   groups = "scif5_data_d";
+   function = "scif5";
+   };
+};
+
+ {
+   pinctrl-0 = <_pins>;
+   pinctrl-names = "default";
+
+   status = "okay";
+};
+
+ {
+   pinctrl-0 = <_pins>;
+   pinctrl-names = "default";
+
+   status = "okay";
+};
-- 
2.11.0

[PATCH 35/61] ARM: dts: r8a7743: Add CAN[01] SoC support

[Simon Horman]

From: Fabrizio Castro 

Add the definitions for can0 and can1 to the SoC .dtsi.

Signed-off-by: Fabrizio Castro 
Reviewed-by: Biju Das 
Signed-off-by: Simon Horman 
---
 arch/arm/boot/dts/r8a7743.dtsi | 36 
 1 file changed, 36 insertions(+)

diff --git a/arch/arm/boot/dts/r8a7743.dtsi b/arch/arm/boot/dts/r8a7743.dtsi
index 6aa86b75b80c..12c7b9267fd7 100644
--- a/arch/arm/boot/dts/r8a7743.dtsi
+++ b/arch/arm/boot/dts/r8a7743.dtsi
@@ -1067,6 +1067,34 @@
};
};
 
+   can0: can@e6e8 {
+   compatible = "renesas,can-r8a7743",
+"renesas,rcar-gen2-can";
+   reg = <0 0xe6e8 0 0x1000>;
+   interrupts = ;
+   clocks = < CPG_MOD 916>,
+< CPG_CORE R8A7743_CLK_RCAN>,
+<_clk>;
+   clock-names = "clkp1", "clkp2", "can_clk";
+   power-domains = < R8A7743_PD_ALWAYS_ON>;
+   resets = < 916>;
+   status = "disabled";
+   };
+
+   can1: can@e6e88000 {
+   compatible = "renesas,can-r8a7743",
+"renesas,rcar-gen2-can";
+   reg = <0 0xe6e88000 0 0x1000>;
+   interrupts = ;
+   clocks = < CPG_MOD 915>,
+< CPG_CORE R8A7743_CLK_RCAN>,
+<_clk>;
+   clock-names = "clkp1", "clkp2", "can_clk";
+   power-domains = < R8A7743_PD_ALWAYS_ON>;
+   resets = < 915>;
+   status = "disabled";
+   };
+
pci0: pci@ee09 {
compatible = "renesas,pci-r8a7743",
 "renesas,pci-rcar-gen2";
@@ -1153,6 +1181,14 @@
clock-frequency = <4800>;
};
 
+   /* External CAN clock */
+   can_clk: can {
+   compatible = "fixed-clock";
+   #clock-cells = <0>;
+   /* This value must be overridden by the board. */
+   clock-frequency = <0>;
+   };
+
/* External SCIF clock */
scif_clk: scif {
compatible = "fixed-clock";
-- 
2.11.0

[PATCH 10/61] ARM: dts: iwg22d: Use /dev/ttySC3 as debug console

[Simon Horman]

From: Fabrizio Castro 

The BSP release from iWave uses /dev/ttySC3 as debug console, this patch
renames the alias accordingly for compatibility.

Signed-off-by: Fabrizio Castro 
Signed-off-by: Chris Paterson 
Signed-off-by: Simon Horman 
---
 arch/arm/boot/dts/r8a7745-iwg22d-sodimm.dts | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/arm/boot/dts/r8a7745-iwg22d-sodimm.dts 
b/arch/arm/boot/dts/r8a7745-iwg22d-sodimm.dts
index 52153ec3638c..edadeee8f1ec 100644
--- a/arch/arm/boot/dts/r8a7745-iwg22d-sodimm.dts
+++ b/arch/arm/boot/dts/r8a7745-iwg22d-sodimm.dts
@@ -16,13 +16,13 @@
compatible = "iwave,g22d", "iwave,g22m", "renesas,r8a7745";
 
aliases {
-   serial0 = 
+   serial3 = 
ethernet0 = 
};
 
chosen {
bootargs = "ignore_loglevel rw root=/dev/nfs ip=dhcp";
-   stdout-path = "serial0:115200n8";
+   stdout-path = "serial3:115200n8";
};
 
vccq_sdhi0: regulator-vccq-sdhi0 {
-- 
2.11.0

[PATCH 16/61] ARM: dts: r8a7745: Enable DMA for HSUSB

[Simon Horman]

From: Biju Das 

From: Biju Das 

This patch adds DMA properties to the HSUSB node.

Signed-off-by: Biju Das 
Reviewed-by: Fabrizio Castro 
Signed-off-by: Simon Horman 
---
 arch/arm/boot/dts/r8a7745.dtsi | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/arch/arm/boot/dts/r8a7745.dtsi b/arch/arm/boot/dts/r8a7745.dtsi
index 6e0c69bb375d..948dd1fc2d9c 100644
--- a/arch/arm/boot/dts/r8a7745.dtsi
+++ b/arch/arm/boot/dts/r8a7745.dtsi
@@ -951,6 +951,9 @@
reg = <0 0xe659 0 0x100>;
interrupts = ;
clocks = < CPG_MOD 704>;
+   dmas = <_dmac0 0>, <_dmac0 1>,
+  <_dmac1 0>, <_dmac1 1>;
+   dma-names = "ch0", "ch1", "ch2", "ch3";
power-domains = < R8A7745_PD_ALWAYS_ON>;
resets = < 704>;
renesas,buswait = <4>;
-- 
2.11.0

[PATCH 22/61] ARM: dts: r8a7779: Use R-Car SDHI Gen1 fallback compat string

[Simon Horman]

Use newly added R-Car SDHI Gen1 fallback compat string
in the DT of the r8a7779 SoC.

This should have no run-time effect as the driver matches against
the per-SoC compat string before considering the fallback compat string.

Signed-off-by: Simon Horman 
---
 arch/arm/boot/dts/r8a7779.dtsi | 12 
 1 file changed, 8 insertions(+), 4 deletions(-)

diff --git a/arch/arm/boot/dts/r8a7779.dtsi b/arch/arm/boot/dts/r8a7779.dtsi
index e8eb94748b27..e79ae306eedd 100644
--- a/arch/arm/boot/dts/r8a7779.dtsi
+++ b/arch/arm/boot/dts/r8a7779.dtsi
@@ -355,7 +355,8 @@
};
 
sdhi0: sd@ffe4c000 {
-   compatible = "renesas,sdhi-r8a7779";
+   compatible = "renesas,sdhi-r8a7779",
+"renesas,rcar-gen1-sdhi";
reg = <0xffe4c000 0x100>;
interrupts = ;
clocks = <_clks R8A7779_CLK_SDHI0>;
@@ -364,7 +365,8 @@
};
 
sdhi1: sd@ffe4d000 {
-   compatible = "renesas,sdhi-r8a7779";
+   compatible = "renesas,sdhi-r8a7779",
+"renesas,rcar-gen1-sdhi";
reg = <0xffe4d000 0x100>;
interrupts = ;
clocks = <_clks R8A7779_CLK_SDHI1>;
@@ -373,7 +375,8 @@
};
 
sdhi2: sd@ffe4e000 {
-   compatible = "renesas,sdhi-r8a7779";
+   compatible = "renesas,sdhi-r8a7779",
+"renesas,rcar-gen1-sdhi";
reg = <0xffe4e000 0x100>;
interrupts = ;
clocks = <_clks R8A7779_CLK_SDHI2>;
@@ -382,7 +385,8 @@
};
 
sdhi3: sd@ffe4f000 {
-   compatible = "renesas,sdhi-r8a7779";
+   compatible = "renesas,sdhi-r8a7779",
+"renesas,rcar-gen1-sdhi";
reg = <0xffe4f000 0x100>;
interrupts = ;
clocks = <_clks R8A7779_CLK_SDHI3>;
-- 
2.11.0

[PATCH 18/61] ARM: dts: r8a7745: Add IIC cores to dtsi

[Simon Horman]

From: Fabrizio Castro 

Add iic0 and iic1 nodes to SoC dtsi. Also, define aliases i2c6
and i2c7. Board specific DT files will enable the interfaces
if needed.

Signed-off-by: Fabrizio Castro 
Reviewed-by: Chris Paterson 
Signed-off-by: Simon Horman 
---
 arch/arm/boot/dts/r8a7745.dtsi | 36 
 1 file changed, 36 insertions(+)

diff --git a/arch/arm/boot/dts/r8a7745.dtsi b/arch/arm/boot/dts/r8a7745.dtsi
index 948dd1fc2d9c..16dc4895b455 100644
--- a/arch/arm/boot/dts/r8a7745.dtsi
+++ b/arch/arm/boot/dts/r8a7745.dtsi
@@ -25,6 +25,8 @@
i2c3 = 
i2c4 = 
i2c5 = 
+   i2c6 = 
+   i2c7 = 
spi0 = 
spi1 = 
spi2 = 
@@ -753,6 +755,40 @@
status = "disabled";
};
 
+   iic0: i2c@e650 {
+   #address-cells = <1>;
+   #size-cells = <0>;
+   compatible = "renesas,iic-r8a7745",
+"renesas,rcar-gen2-iic",
+"renesas,rmobile-iic";
+   reg = <0 0xe650 0 0x425>;
+   interrupts = ;
+   clocks = < CPG_MOD 318>;
+   dmas = < 0x61>, < 0x62>,
+  < 0x61>, < 0x62>;
+   dma-names = "tx", "rx", "tx", "rx";
+   power-domains = < R8A7745_PD_ALWAYS_ON>;
+   resets = < 318>;
+   status = "disabled";
+   };
+
+   iic1: i2c@e651 {
+   #address-cells = <1>;
+   #size-cells = <0>;
+   compatible = "renesas,iic-r8a7745",
+"renesas,rcar-gen2-iic",
+"renesas,rmobile-iic";
+   reg = <0 0xe651 0 0x425>;
+   interrupts = ;
+   clocks = < CPG_MOD 323>;
+   dmas = < 0x65>, < 0x66>,
+  < 0x65>, < 0x66>;
+   dma-names = "tx", "rx", "tx", "rx";
+   power-domains = < R8A7745_PD_ALWAYS_ON>;
+   resets = < 323>;
+   status = "disabled";
+   };
+
mmcif0: mmc@ee20 {
compatible = "renesas,mmcif-r8a7745",
 "renesas,sh-mmcif";
-- 
2.11.0

[PATCH 04/61] ARM: dts: r8a7790: Use R-Car Gen2 Ether fallback compat string

[Simon Horman]

Use newly added R-Car Gen2 Ether fallback compat string
in the DT of the r8a7790 SoC.

This should have no run-time effect as the driver matches against
the per-SoC compat string before considering the fallback compat string.

Signed-off-by: Simon Horman 
Reviewed-by: Geert Uytterhoeven 
---
 arch/arm/boot/dts/r8a7790.dtsi | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/arch/arm/boot/dts/r8a7790.dtsi b/arch/arm/boot/dts/r8a7790.dtsi
index 2f017fee4009..4fc607e8e40c 100644
--- a/arch/arm/boot/dts/r8a7790.dtsi
+++ b/arch/arm/boot/dts/r8a7790.dtsi
@@ -906,7 +906,8 @@
};
 
ether: ethernet@ee70 {
-   compatible = "renesas,ether-r8a7790";
+   compatible = "renesas,ether-r8a7790",
+"renesas,rcar-gen2-ether";
reg = <0 0xee70 0 0x400>;
interrupts = ;
clocks = < CPG_MOD 813>;
-- 
2.11.0

[PATCH 03/61] ARM: dts: r8a7778: Use R-Car Gen1 Ether fallback compat string

[Simon Horman]

Use newly added R-Car Gen1 Ether fallback compat string
in the DT of the r8a7778 SoC.

This should have no run-time effect as the driver matches against
the per-SoC compat string before considering the fallback compat string.

Signed-off-by: Simon Horman 
Reviewed-by: Geert Uytterhoeven 
---
 arch/arm/boot/dts/r8a7778.dtsi | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/arch/arm/boot/dts/r8a7778.dtsi b/arch/arm/boot/dts/r8a7778.dtsi
index a39472aab867..d6e3c0400ec3 100644
--- a/arch/arm/boot/dts/r8a7778.dtsi
+++ b/arch/arm/boot/dts/r8a7778.dtsi
@@ -51,7 +51,8 @@
};
 
ether: ethernet@fde0 {
-   compatible = "renesas,ether-r8a7778";
+   compatible = "renesas,ether-r8a7778",
+"renesas,rcar-gen1-ether";
reg = <0xfde0 0x400>;
interrupts = ;
clocks = <_clks R8A7778_CLK_ETHER>;
-- 
2.11.0

[PATCH 09/61] ARM: dts: iwg20d-q7-dbcm-ca: Add HDMI video output

[Simon Horman]

From: Fabrizio Castro 

Although there is a HDMI connector on the q7 carrier board it is not
connected to the RZ/G1M SoC. One must use the HDMI connector on the
camera daughter board.

This patch adds support for this connector.

Signed-off-by: Fabrizio Castro 
Reviewed-by: Biju Das 
Reviewed-by: Laurent Pinchart 
Signed-off-by: Simon Horman 
---
 arch/arm/boot/dts/iwg20d-q7-dbcm-ca.dtsi | 75 
 1 file changed, 75 insertions(+)

diff --git a/arch/arm/boot/dts/iwg20d-q7-dbcm-ca.dtsi 
b/arch/arm/boot/dts/iwg20d-q7-dbcm-ca.dtsi
index 31fab5f183a9..4db18f2ef303 100644
--- a/arch/arm/boot/dts/iwg20d-q7-dbcm-ca.dtsi
+++ b/arch/arm/boot/dts/iwg20d-q7-dbcm-ca.dtsi
@@ -13,6 +13,37 @@
serial1 = 
serial4 = 
};
+
+   cec_clock: cec-clock {
+   compatible = "fixed-clock";
+   #clock-cells = <0>;
+   clock-frequency = <1200>;
+   };
+
+   hdmi-out {
+   compatible = "hdmi-connector";
+   type = "a";
+
+   port {
+   hdmi_con_out: endpoint {
+   remote-endpoint = <_out>;
+   };
+   };
+   };
+};
+
+ {
+   pinctrl-0 = <_pins>;
+   pinctrl-names = "default";
+   status = "okay";
+
+   ports {
+   port@0 {
+   endpoint {
+   remote-endpoint = <_in>;
+   };
+   };
+   };
 };
 
  {
@@ -23,7 +54,51 @@
status = "okay";
 };
 
+ {
+   status = "okay";
+   clock-frequency = <40>;
+
+   hdmi@39 {
+   compatible = "adi,adv7511w";
+   reg = <0x39>;
+   interrupt-parent = <>;
+   interrupts = <13 IRQ_TYPE_LEVEL_LOW>;
+   clocks = <_clock>;
+   clock-names = "cec";
+
+   adi,input-depth = <8>;
+   adi,input-colorspace = "rgb";
+   adi,input-clock = "1x";
+   adi,input-style = <1>;
+   adi,input-justification = "evenly";
+
+   ports {
+   #address-cells = <1>;
+   #size-cells = <0>;
+
+   port@0 {
+   reg = <0>;
+   adv7511_in: endpoint {
+   remote-endpoint = <_out_rgb>;
+   };
+   };
+
+   port@1 {
+   reg = <1>;
+   adv7511_out: endpoint {
+   remote-endpoint = <_con_out>;
+   };
+   };
+   };
+   };
+};
+
  {
+   du_pins: du {
+   groups = "du_rgb888", "du_sync", "du_oddf", "du_clk_out_0";
+   function = "du";
+   };
+
hscif1_pins: hscif1 {
groups = "hscif1_data_c", "hscif1_ctrl_c";
function = "hscif1";
-- 
2.11.0

[PATCH 23/61] ARM: dts: r8a7790: Use R-Car SDHI Gen2 fallback compat string

[Simon Horman]

Use newly added R-Car SDHI Gen2 fallback compat string
in the DT of the r8a7790 SoC.

This should have no run-time effect as the driver matches against
the per-SoC compat string before considering the fallback compat string.

Signed-off-by: Simon Horman 
---
 arch/arm/boot/dts/r8a7790.dtsi | 12 
 1 file changed, 8 insertions(+), 4 deletions(-)

diff --git a/arch/arm/boot/dts/r8a7790.dtsi b/arch/arm/boot/dts/r8a7790.dtsi
index 4fc607e8e40c..6ea06455c0d1 100644
--- a/arch/arm/boot/dts/r8a7790.dtsi
+++ b/arch/arm/boot/dts/r8a7790.dtsi
@@ -662,7 +662,8 @@
};
 
sdhi0: sd@ee10 {
-   compatible = "renesas,sdhi-r8a7790";
+   compatible = "renesas,sdhi-r8a7790",
+"renesas,rcar-gen2-sdhi";
reg = <0 0xee10 0 0x328>;
interrupts = ;
clocks = < CPG_MOD 314>;
@@ -676,7 +677,8 @@
};
 
sdhi1: sd@ee12 {
-   compatible = "renesas,sdhi-r8a7790";
+   compatible = "renesas,sdhi-r8a7790",
+"renesas,rcar-gen2-sdhi";
reg = <0 0xee12 0 0x328>;
interrupts = ;
clocks = < CPG_MOD 313>;
@@ -690,7 +692,8 @@
};
 
sdhi2: sd@ee14 {
-   compatible = "renesas,sdhi-r8a7790";
+   compatible = "renesas,sdhi-r8a7790",
+"renesas,rcar-gen2-sdhi";
reg = <0 0xee14 0 0x100>;
interrupts = ;
clocks = < CPG_MOD 312>;
@@ -704,7 +707,8 @@
};
 
sdhi3: sd@ee16 {
-   compatible = "renesas,sdhi-r8a7790";
+   compatible = "renesas,sdhi-r8a7790",
+"renesas,rcar-gen2-sdhi";
reg = <0 0xee16 0 0x100>;
interrupts = ;
clocks = < CPG_MOD 311>;
-- 
2.11.0

[PATCH 08/61] ARM: dts: r8a7743: Add DU support

[Simon Horman]

From: Fabrizio Castro 

Add du node to r8a7743 SoC DT. Boards that want to enable the DU
need to specify the output topology.

Signed-off-by: Fabrizio Castro 
Reviewed-by: Biju Das 
Reviewed-by: Laurent Pinchart 
Signed-off-by: Simon Horman 
---
 arch/arm/boot/dts/r8a7743.dtsi | 30 ++
 1 file changed, 30 insertions(+)

diff --git a/arch/arm/boot/dts/r8a7743.dtsi b/arch/arm/boot/dts/r8a7743.dtsi
index f647b86c0205..112a72baa7a4 100644
--- a/arch/arm/boot/dts/r8a7743.dtsi
+++ b/arch/arm/boot/dts/r8a7743.dtsi
@@ -1034,6 +1034,36 @@
};
};
 
+   du: display@feb0 {
+   compatible = "renesas,du-r8a7743";
+   reg = <0 0xfeb0 0 0x4>,
+ <0 0xfeb9 0 0x1c>;
+   reg-names = "du", "lvds.0";
+   interrupts = ,
+;
+   clocks = < CPG_MOD 724>,
+< CPG_MOD 723>,
+< CPG_MOD 726>;
+   clock-names = "du.0", "du.1", "lvds.0";
+   status = "disabled";
+
+   ports {
+   #address-cells = <1>;
+   #size-cells = <0>;
+
+   port@0 {
+   reg = <0>;
+   du_out_rgb: endpoint {
+   };
+   };
+   port@1 {
+   reg = <1>;
+   du_out_lvds0: endpoint {
+   };
+   };
+   };
+   };
+
pci0: pci@ee09 {
compatible = "renesas,pci-r8a7743",
 "renesas,pci-rcar-gen2";
-- 
2.11.0

[PATCH 07/61] ARM: dts: r8a7794: Use R-Car Gen2 Ether fallback compat string

[Simon Horman]

Use newly added R-Car Gen2 Ether fallback compat string
in the DT of the r8a7794 SoC.

This should have no run-time effect as the driver matches against
the per-SoC compat string before considering the fallback compat string.

Signed-off-by: Simon Horman 
Reviewed-by: Geert Uytterhoeven 
---
 arch/arm/boot/dts/r8a7794.dtsi | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/arch/arm/boot/dts/r8a7794.dtsi b/arch/arm/boot/dts/r8a7794.dtsi
index 905e50c9b524..148c2567a6ce 100644
--- a/arch/arm/boot/dts/r8a7794.dtsi
+++ b/arch/arm/boot/dts/r8a7794.dtsi
@@ -640,7 +640,8 @@
};
 
ether: ethernet@ee70 {
-   compatible = "renesas,ether-r8a7794";
+   compatible = "renesas,ether-r8a7794",
+"renesas,rcar-gen2-ether";
reg = <0 0xee70 0 0x400>;
interrupts = ;
clocks = < CPG_MOD 813>;
-- 
2.11.0

[PATCH 25/61] ARM: dts: r8a7792: Use R-Car SDHI Gen2 fallback compat string

[Simon Horman]

Use newly added R-Car SDHI Gen2 fallback compat string
in the DT of the r8a7792 SoC.

This should have no run-time effect as the driver matches against
the per-SoC compat string before considering the fallback compat string.

Signed-off-by: Simon Horman 
---
 arch/arm/boot/dts/r8a7792.dtsi | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/arch/arm/boot/dts/r8a7792.dtsi b/arch/arm/boot/dts/r8a7792.dtsi
index 131f65b0426e..7b394273031e 100644
--- a/arch/arm/boot/dts/r8a7792.dtsi
+++ b/arch/arm/boot/dts/r8a7792.dtsi
@@ -507,7 +507,8 @@
};
 
sdhi0: sd@ee10 {
-   compatible = "renesas,sdhi-r8a7792";
+   compatible = "renesas,sdhi-r8a7792",
+"renesas,rcar-gen2-sdhi";
reg = <0 0xee10 0 0x328>;
interrupts = <0 165 IRQ_TYPE_LEVEL_HIGH>;
dmas = < 0xcd>, < 0xce>,
-- 
2.11.0

[GIT PULL] Renesas ARM Based SoC DT Updates for v4.16

[Simon Horman]

Hi Olof, Hi Kevin, Hi Arnd,

Please consider these Renesas ARM based SoC DT updates for v4.16.


The following changes since commit 4fbd8d194f06c8a3fd2af1ce560ddb31f7ec8323:

  Linux 4.15-rc1 (2017-11-26 16:01:47 -0800)

are available in the git repository at:

  https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas.git 
tags/renesas-dt-for-v4.16

for you to fetch changes up to 7f32eddb81ecc06131a643babe2d0f961fbd7f08:

  ARM: dts: alt: Convert to named i2c-gpio bindings (2017-12-04 09:34:53 +0100)


Renesas ARM Based SoC DT Updates for v4.16

* Convert to named i2c-gpio bindings

  Geert Uytterhoeven says "Commits 7d29f509d2cfd807 ("dt-bindings: i2c:
  i2c-gpio: Add support for named gpios") and 05c74778858d7d99 ("i2c: gpio:
  Add support for named gpios in DT") introduced named i2c-gpio DT
  bindings, and deprecated the more error-prone unnamed variant.

  This patch series switches all Renesas boards to the new bindings, and
  adds the missing GPIO_OPEN_DRAIN I/O flags, which were implicitly
  assumed before..."

  ...  Note that after this series is applied, the i2c-gpio buses are no
  longer detected when booting new DTBs on old (v4.14 and older) kernels,
  which should not be an issue.  Booting old DTBs on new kernels is not
  affected."

* Update DTS for CMT DT binding rework

  Geert Uytterhoeven says "This patch series updates the CMT device nodes
  in the various Renesas DTS files sh_cmt clocksource driver for the recent
  DT binding rework that was merged in v4.14-rc1 and v4.15-rc1..."

* Add SMP support to r8a7794 (R-Car E2) SoC

  Sergei Shtylyov says "Add the device tree node for the Advanced Power
  Management Unit (APMU).  Use the "enable-method" prop to  point out that
  the APMU should be used for the SMP support."

* Correct primary compatible value for eeprom
  on r7s72100 (RZ/A1H) genmai and r8a7791 (R-Car M2-W) koelsh boards

  Geert Uytterhoeven says "The Renesas part numbers of the two-wire serial
  interface EEPROMs do not follow the 24Cxx pattern, but the R1EX24xxx
  pattern.

  Hence change the primary compatible values to the appropriate variant of
  "renesas,r1ex24xxx", like is already done on Gose.""

* Move cec_clock to root node on r8a7791 (R-Car M2-W) koelsh board
  r8a7791 (R-Car M2-W) koelsh board

* Use R-Car SDHI and Ether Gen1 and 2 fallback compat strings

  Use recently posted R-Car SDHI and Ether Gen 1 and 2 fallback
  compat strings in the DT of Renesas ARM based SoCs.

* Add IIC cores to dtsi of r8a7745 (RZ/G1E) SoC

* Rework DT architecture for r8a7745 (RZ/G1E) iW-RainboW-G22D development
  platform and add serial support.

  Fabrizio Castro says "... define a new DT architecture for the
  iW-RainboW-G22D SODIMM Development Platform to include the configuration
  with the HDMI daughter board and to define the serial interfaces."

* Add USB function support to
  r8a7745 (RZ/G1E) iW-RainboW-G22D development platform

* Add PCIEC and ttySC3 support to r8a7743 (RZ/G1M) iW-RainboW-G20M-Qseven SoM

* Add VIN support to r8a7743 (RZ/G1M) and r8a7745 (RZ/G1E) SoCs

* Add CAN and HDMI support to r8a7743 (RZ/G1M) iW-RainboW-G20D-Qseven and
  r8a7745 (RZ/G1E) iW-RainboW-G22D development platforms


Biju Das (7):
  ARM: dts: r8a7745: Add HS-USB device node
  ARM: dts: r8a7745: Add USB-DMAC device nodes
  ARM: dts: r8a7745: Enable DMA for HSUSB
  ARM: dts: iwg22d-sodimm: Enable HS-USB
  ARM: dts: r8a7743: Add default PCIe bus clock
  ARM: dts: r8a7743: Add PCIe Controller device node
  ARM: dts: iwg20d-q7: Enable PCIe Controller

Fabrizio Castro (18):
  ARM: dts: r8a7743: Add DU support
  ARM: dts: iwg20d-q7-dbcm-ca: Add HDMI video output
  ARM: dts: iwg22d: Use /dev/ttySC3 as debug console
  ARM: dts: iwg22d: Add /dev/ttySC5 support
  ARM: dts: iwg22d-sodimm-dbhd-ca: Add device tree for HDMI DB
  ARM: dts: iwg22d-sodimm: sort dt nodes
  ARM: dts: r8a7745: Add IIC cores to dtsi
  ARM: dts: iwg20d-q7: Add support for ttySC3
  ARM: dts: r8a7745: Add DU support
  ARM: dts: iwg22d-sodimm-dbhd-ca: Add HDMI video output
  ARM: dts: r8a7745: Add CAN[01] SoC support
  ARM: dts: iwg22d-sodimm: Add can0 support to carrier board
  ARM: dts: iwg22d-sodimm-dbhd-ca: Add can1 support to HDMI DB
  ARM: dts: r8a7743: Add CAN[01] SoC support
  ARM: dts: iwg20d-q7-common: Add can0 support to carrier board
  ARM: dts: iwg20d-q7-dbcm-ca: Add can1 support to camera DB
  ARM: dts: r8a7743: add VIN dt support
  ARM: dts: r8a7745: add VIN dt support

Geert Uytterhoeven (6):
  ARM: dts: koelsch: Correct primary compatible value for eeprom
  ARM: dts: genmai: Correct primary compatible value for eeprom
  ARM: dts: armadillo800eva: Convert to named i2c-gpio bindings
  ARM: dts: lager: Convert to named i2c-gpio bindings
  ARM: dts: koelsch: Convert to 

[PATCH 21/61] ARM: dts: r8a7778: Use R-Car SDHI Gen1 fallback compat string

[Simon Horman]

Use newly added R-Car SDHI Gen1 fallback compat string
in the DT of the r8a7778 SoC.

This should have no run-time effect as the driver matches against
the per-SoC compat string before considering the fallback compat string.

Signed-off-by: Simon Horman 
---
 arch/arm/boot/dts/r8a7778.dtsi | 9 ++---
 1 file changed, 6 insertions(+), 3 deletions(-)

diff --git a/arch/arm/boot/dts/r8a7778.dtsi b/arch/arm/boot/dts/r8a7778.dtsi
index d6e3c0400ec3..3b49f9ed2e2b 100644
--- a/arch/arm/boot/dts/r8a7778.dtsi
+++ b/arch/arm/boot/dts/r8a7778.dtsi
@@ -380,7 +380,8 @@
};
 
sdhi0: sd@ffe4c000 {
-   compatible = "renesas,sdhi-r8a7778";
+   compatible = "renesas,sdhi-r8a7778",
+"renesas,rcar-gen1-sdhi";
reg = <0xffe4c000 0x100>;
interrupts = ;
clocks = <_clks R8A7778_CLK_SDHI0>;
@@ -389,7 +390,8 @@
};
 
sdhi1: sd@ffe4d000 {
-   compatible = "renesas,sdhi-r8a7778";
+   compatible = "renesas,sdhi-r8a7778",
+"renesas,rcar-gen1-sdhi";
reg = <0xffe4d000 0x100>;
interrupts = ;
clocks = <_clks R8A7778_CLK_SDHI1>;
@@ -398,7 +400,8 @@
};
 
sdhi2: sd@ffe4f000 {
-   compatible = "renesas,sdhi-r8a7778";
+   compatible = "renesas,sdhi-r8a7778",
+"renesas,rcar-gen1-sdhi";
reg = <0xffe4f000 0x100>;
interrupts = ;
clocks = <_clks R8A7778_CLK_SDHI2>;
-- 
2.11.0

[PATCH 14/61] ARM: dts: r8a7745: Add HS-USB device node

[Simon Horman]

From: Biju Das 

From: Biju Das 

Define the R8A7745 generic part of the HS-USB device node. It is up to the
board file to enable the device.

Signed-off-by: Biju Das 
Reviewed-by: Fabrizio Castro 
Signed-off-by: Simon Horman 
---
 arch/arm/boot/dts/r8a7745.dtsi | 14 ++
 1 file changed, 14 insertions(+)

diff --git a/arch/arm/boot/dts/r8a7745.dtsi b/arch/arm/boot/dts/r8a7745.dtsi
index 6ad93f0deb8f..432aa48ea395 100644
--- a/arch/arm/boot/dts/r8a7745.dtsi
+++ b/arch/arm/boot/dts/r8a7745.dtsi
@@ -917,6 +917,20 @@
};
};
 
+   hsusb: usb@e659 {
+   compatible = "renesas,usbhs-r8a7745",
+"renesas,rcar-gen2-usbhs";
+   reg = <0 0xe659 0 0x100>;
+   interrupts = ;
+   clocks = < CPG_MOD 704>;
+   power-domains = < R8A7745_PD_ALWAYS_ON>;
+   resets = < 704>;
+   renesas,buswait = <4>;
+   phys = < 1>;
+   phy-names = "usb";
+   status = "disabled";
+   };
+
usbphy: usb-phy@e6590100 {
compatible = "renesas,usb-phy-r8a7745",
 "renesas,rcar-gen2-usb-phy";
-- 
2.11.0

[PATCH 27/61] ARM: dts: r8a7794: Use R-Car SDHI Gen2 fallback compat string

[Simon Horman]

Use newly added R-Car SDHI Gen2 fallback compat string
in the DT of the r8a7794 SoC.

This should have no run-time effect as the driver matches against
the per-SoC compat string before considering the fallback compat string.

Signed-off-by: Simon Horman 
---
 arch/arm/boot/dts/r8a7794.dtsi | 9 ++---
 1 file changed, 6 insertions(+), 3 deletions(-)

diff --git a/arch/arm/boot/dts/r8a7794.dtsi b/arch/arm/boot/dts/r8a7794.dtsi
index 148c2567a6ce..95206c25e6a1 100644
--- a/arch/arm/boot/dts/r8a7794.dtsi
+++ b/arch/arm/boot/dts/r8a7794.dtsi
@@ -792,7 +792,8 @@
};
 
sdhi0: sd@ee10 {
-   compatible = "renesas,sdhi-r8a7794";
+   compatible = "renesas,sdhi-r8a7794",
+"renesas,rcar-gen2-sdhi";
reg = <0 0xee10 0 0x328>;
interrupts = ;
clocks = < CPG_MOD 314>;
@@ -806,7 +807,8 @@
};
 
sdhi1: sd@ee14 {
-   compatible = "renesas,sdhi-r8a7794";
+   compatible = "renesas,sdhi-r8a7794",
+"renesas,rcar-gen2-sdhi";
reg = <0 0xee14 0 0x100>;
interrupts = ;
clocks = < CPG_MOD 312>;
@@ -820,7 +822,8 @@
};
 
sdhi2: sd@ee16 {
-   compatible = "renesas,sdhi-r8a7794";
+   compatible = "renesas,sdhi-r8a7794",
+"renesas,rcar-gen2-sdhi";
reg = <0 0xee16 0 0x100>;
interrupts = ;
clocks = < CPG_MOD 311>;
-- 
2.11.0

[PATCH 29/61] ARM: dts: koelsch: Move cec_clock to root node

[Simon Horman]

cec-clock is a fixed clock generator that is not controlled by i2c5 and
thus should not be a child of the i2c5 bus node. Rather, it should be
a child of the root node of the DT.

Fixes: 02a5ab18d366 ("ARM: dts: koelsch: Add CEC clock for HDMI transmitter")
Reported-by: Laurent Pinchart 
Signed-off-by: Simon Horman 
Reviewed-by: Laurent Pinchart 
---
 arch/arm/boot/dts/r8a7791-koelsch.dts | 12 ++--
 1 file changed, 6 insertions(+), 6 deletions(-)

diff --git a/arch/arm/boot/dts/r8a7791-koelsch.dts 
b/arch/arm/boot/dts/r8a7791-koelsch.dts
index e164eda69baf..4126de417922 100644
--- a/arch/arm/boot/dts/r8a7791-koelsch.dts
+++ b/arch/arm/boot/dts/r8a7791-koelsch.dts
@@ -278,6 +278,12 @@
};
};
 
+   cec_clock: cec-clock {
+   compatible = "fixed-clock";
+   #clock-cells = <0>;
+   clock-frequency = <1200>;
+   };
+
hdmi-out {
compatible = "hdmi-connector";
type = "a";
@@ -640,12 +646,6 @@
};
};
 
-   cec_clock: cec-clock {
-   compatible = "fixed-clock";
-   #clock-cells = <0>;
-   clock-frequency = <1200>;
-   };
-
hdmi@39 {
compatible = "adi,adv7511w";
reg = <0x39>;
-- 
2.11.0

[PATCH 11/61] ARM: dts: iwg22d: Add /dev/ttySC5 support

[Simon Horman]

From: Fabrizio Castro 

Add support for HSCIF1 as /dev/ttySC5, keeping the same naming
scheme adopted by iWave in their BSP release. This interface
uses RTS/CTS.

Signed-off-by: Fabrizio Castro 
Signed-off-by: Chris Paterson 
Signed-off-by: Simon Horman 
---
 arch/arm/boot/dts/r8a7745-iwg22d-sodimm.dts | 14 ++
 1 file changed, 14 insertions(+)

diff --git a/arch/arm/boot/dts/r8a7745-iwg22d-sodimm.dts 
b/arch/arm/boot/dts/r8a7745-iwg22d-sodimm.dts
index edadeee8f1ec..82587d7b2056 100644
--- a/arch/arm/boot/dts/r8a7745-iwg22d-sodimm.dts
+++ b/arch/arm/boot/dts/r8a7745-iwg22d-sodimm.dts
@@ -17,6 +17,7 @@
 
aliases {
serial3 = 
+   serial5 = 
ethernet0 = 
};
 
@@ -39,7 +40,20 @@
};
 };
 
+ {
+   pinctrl-0 = <_pins>;
+   pinctrl-names = "default";
+
+   uart-has-rtscts;
+   status = "okay";
+};
+
  {
+   hscif1_pins: hscif1 {
+   groups = "hscif1_data", "hscif1_ctrl";
+   function = "hscif1";
+   };
+
scif4_pins: scif4 {
groups = "scif4_data_b";
function = "scif4";
-- 
2.11.0

[PATCH 26/61] ARM: dts: r8a7793: Use R-Car SDHI Gen2 fallback compat string

[Simon Horman]

Use newly added R-Car SDHI Gen2 fallback compat string
in the DT of the r8a7793 SoC.

This should have no run-time effect as the driver matches against
the per-SoC compat string before considering the fallback compat string.

Signed-off-by: Simon Horman 
---
 arch/arm/boot/dts/r8a7793.dtsi | 9 ++---
 1 file changed, 6 insertions(+), 3 deletions(-)

diff --git a/arch/arm/boot/dts/r8a7793.dtsi b/arch/arm/boot/dts/r8a7793.dtsi
index 196afec766c6..6e74d0855931 100644
--- a/arch/arm/boot/dts/r8a7793.dtsi
+++ b/arch/arm/boot/dts/r8a7793.dtsi
@@ -562,7 +562,8 @@
};
 
sdhi0: sd@ee10 {
-   compatible = "renesas,sdhi-r8a7793";
+   compatible = "renesas,sdhi-r8a7793",
+"renesas,rcar-gen2-sdhi";
reg = <0 0xee10 0 0x328>;
interrupts = ;
clocks = < CPG_MOD 314>;
@@ -576,7 +577,8 @@
};
 
sdhi1: sd@ee14 {
-   compatible = "renesas,sdhi-r8a7793";
+   compatible = "renesas,sdhi-r8a7793",
+"renesas,rcar-gen2-sdhi";
reg = <0 0xee14 0 0x100>;
interrupts = ;
clocks = < CPG_MOD 312>;
@@ -590,7 +592,8 @@
};
 
sdhi2: sd@ee16 {
-   compatible = "renesas,sdhi-r8a7793";
+   compatible = "renesas,sdhi-r8a7793",
+"renesas,rcar-gen2-sdhi";
reg = <0 0xee16 0 0x100>;
interrupts = ;
clocks = < CPG_MOD 311>;
-- 
2.11.0

[PATCH 30/61] ARM: dts: r8a7745: Add DU support

[Simon Horman]

From: Fabrizio Castro 

Add du node to r8a7745 SoC DT. Boards that want to enable the DU
need to specify the output topology.

Signed-off-by: Fabrizio Castro 
Reviewed-by: Biju Das 
Reviewed-by: Laurent Pinchart 
Signed-off-by: Simon Horman 
---
 arch/arm/boot/dts/r8a7745.dtsi | 27 +++
 1 file changed, 27 insertions(+)

diff --git a/arch/arm/boot/dts/r8a7745.dtsi b/arch/arm/boot/dts/r8a7745.dtsi
index 846c27a00c54..53eb1ce446a4 100644
--- a/arch/arm/boot/dts/r8a7745.dtsi
+++ b/arch/arm/boot/dts/r8a7745.dtsi
@@ -821,6 +821,33 @@
status = "disabled";
};
 
+   du: display@feb0 {
+   compatible = "renesas,du-r8a7745";
+   reg = <0 0xfeb0 0 0x4>;
+   reg-names = "du";
+   interrupts = ,
+;
+   clocks = < CPG_MOD 724>, < CPG_MOD 723>;
+   clock-names = "du.0", "du.1";
+   status = "disabled";
+
+   ports {
+   #address-cells = <1>;
+   #size-cells = <0>;
+
+   port@0 {
+   reg = <0>;
+   du_out_rgb0: endpoint {
+   };
+   };
+   port@1 {
+   reg = <1>;
+   du_out_rgb1: endpoint {
+   };
+   };
+   };
+   };
+
msiof0: spi@e6e2 {
compatible = "renesas,msiof-r8a7745",
 "renesas,rcar-gen2-msiof";
-- 
2.11.0

[PATCH 01/61] ARM: dts: r8a7743: Use R-Car Gen2 Ether fallback compat string

[Simon Horman]

Use newly added R-Car Gen2 Ether fallback compat string
in the DT of the r8a7743 SoC.

This should have no run-time effect as the driver matches against
the per-SoC compat string before considering the fallback compat string.

Signed-off-by: Simon Horman 
Reviewed-by: Geert Uytterhoeven 
---
 arch/arm/boot/dts/r8a7743.dtsi | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/arch/arm/boot/dts/r8a7743.dtsi b/arch/arm/boot/dts/r8a7743.dtsi
index 7bbba4a36f31..f647b86c0205 100644
--- a/arch/arm/boot/dts/r8a7743.dtsi
+++ b/arch/arm/boot/dts/r8a7743.dtsi
@@ -827,7 +827,8 @@
};
 
ether: ethernet@ee70 {
-   compatible = "renesas,ether-r8a7743";
+   compatible = "renesas,ether-r8a7743",
+"renesas,rcar-gen2-ether";
reg = <0 0xee70 0 0x400>;
interrupts = ;
clocks = < CPG_MOD 813>;
-- 
2.11.0

[PATCH 32/61] ARM: dts: r8a7745: Add CAN[01] SoC support

[Simon Horman]

From: Fabrizio Castro 

Add the definitions for can0 and can1 to the SoC .dtsi.

Signed-off-by: Fabrizio Castro 
Reviewed-by: Biju Das 
Signed-off-by: Simon Horman 
---
 arch/arm/boot/dts/r8a7745.dtsi | 36 
 1 file changed, 36 insertions(+)

diff --git a/arch/arm/boot/dts/r8a7745.dtsi b/arch/arm/boot/dts/r8a7745.dtsi
index 53eb1ce446a4..52f13246fc8a 100644
--- a/arch/arm/boot/dts/r8a7745.dtsi
+++ b/arch/arm/boot/dts/r8a7745.dtsi
@@ -1049,6 +1049,34 @@
#phy-cells = <1>;
};
};
+
+   can0: can@e6e8 {
+   compatible = "renesas,can-r8a7745",
+"renesas,rcar-gen2-can";
+   reg = <0 0xe6e8 0 0x1000>;
+   interrupts = ;
+   clocks = < CPG_MOD 916>,
+< CPG_CORE R8A7745_CLK_RCAN>,
+<_clk>;
+   clock-names = "clkp1", "clkp2", "can_clk";
+   power-domains = < R8A7745_PD_ALWAYS_ON>;
+   resets = < 916>;
+   status = "disabled";
+   };
+
+   can1: can@e6e88000 {
+   compatible = "renesas,can-r8a7745",
+"renesas,rcar-gen2-can";
+   reg = <0 0xe6e88000 0 0x1000>;
+   interrupts = ;
+   clocks = < CPG_MOD 915>,
+< CPG_CORE R8A7745_CLK_RCAN>,
+<_clk>;
+   clock-names = "clkp1", "clkp2", "can_clk";
+   power-domains = < R8A7745_PD_ALWAYS_ON>;
+   resets = < 915>;
+   status = "disabled";
+   };
};
 
/* External root clock */
@@ -1066,6 +1094,14 @@
clock-frequency = <4800>;
};
 
+   /* External CAN clock */
+   can_clk: can {
+   compatible = "fixed-clock";
+   #clock-cells = <0>;
+   /* This value must be overridden by the board. */
+   clock-frequency = <0>;
+   };
+
/* External SCIF clock */
scif_clk: scif {
compatible = "fixed-clock";
-- 
2.11.0

[PATCH 1/2] ARM: shmobile: Document Renesas M3-W-based Salvator-XS board DT bindings

[Simon Horman]

From: Geert Uytterhoeven 

The Renesas Salvator-XS (Salvator-X 2nd version) development board can
be equipped with either an R-Car H3 ES2.0 or M3-W ES1.x SiP, which are
pin-compatible.

Document board part number and compatible values for the version with
R-Car M3-W.

Signed-off-by: Geert Uytterhoeven 
Acked-by: Rob Herring 
Signed-off-by: Simon Horman 
---
 Documentation/devicetree/bindings/arm/shmobile.txt | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/Documentation/devicetree/bindings/arm/shmobile.txt 
b/Documentation/devicetree/bindings/arm/shmobile.txt
index 020d758fc0c5..062520a0e74c 100644
--- a/Documentation/devicetree/bindings/arm/shmobile.txt
+++ b/Documentation/devicetree/bindings/arm/shmobile.txt
@@ -104,6 +104,8 @@ Boards:
 compatible = "renesas,salvator-x", "renesas,r8a7796"
   - Salvator-XS (Salvator-X 2nd version, RTP0RC7795SIPB0012S)
 compatible = "renesas,salvator-xs", "renesas,r8a7795"
+  - Salvator-XS (Salvator-X 2nd version, RTP0RC7796SIPB0012S)
+compatible = "renesas,salvator-xs", "renesas,r8a7796"
   - SILK (RTP0RC7794LCB00011S)
 compatible = "renesas,silk", "renesas,r8a7794"
   - SK-RZG1E (YR8A77450S000BE)
-- 
2.11.0

[PATCH 1/1] soc: renesas: Identify R-Car M3-W ES1.1

[Simon Horman]

From: Geert Uytterhoeven 

The Product Register of R-Car M3-W ES1.1 incorrectly identifies the SoC
revision as ES2.0.  Add a workaround to fix this.

Signed-off-by: Geert Uytterhoeven 
Signed-off-by: Simon Horman 
---
 drivers/soc/renesas/renesas-soc.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/drivers/soc/renesas/renesas-soc.c 
b/drivers/soc/renesas/renesas-soc.c
index 9f4ee2567c72..926b7fd6db2d 100644
--- a/drivers/soc/renesas/renesas-soc.c
+++ b/drivers/soc/renesas/renesas-soc.c
@@ -250,6 +250,9 @@ static int __init renesas_soc_init(void)
if (chipid) {
product = readl(chipid);
iounmap(chipid);
+   /* R-Car M3-W ES1.1 incorrectly identifies as ES2.0 */
+   if ((product & 0x7fff) == 0x5210)
+   product ^= 0x11;
if (soc->id && ((product >> 8) & 0xff) != soc->id) {
pr_warn("SoC mismatch (product = 0x%x)\n", product);
return -ENODEV;
-- 
2.11.0

[PATCH 2/2] arm64: renesas: document V3MSK board bindings

[Simon Horman]

From: Sergei Shtylyov 

Document the V3M Starter Kit device tree bindings, listing it as
a supported board.

This allows to use checkpatch.pl to validate .dts files referring to
the V3MSK board.

Signed-off-by: Sergei Shtylyov 
Acked-by: Rob Herring 
Signed-off-by: Simon Horman 
---
 Documentation/devicetree/bindings/arm/shmobile.txt | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/Documentation/devicetree/bindings/arm/shmobile.txt 
b/Documentation/devicetree/bindings/arm/shmobile.txt
index 062520a0e74c..5c3af7ef0761 100644
--- a/Documentation/devicetree/bindings/arm/shmobile.txt
+++ b/Documentation/devicetree/bindings/arm/shmobile.txt
@@ -112,6 +112,8 @@ Boards:
 compatible = "renesas,sk-rzg1e", "renesas,r8a7745"
   - SK-RZG1M (YR8A77430S000BE)
 compatible = "renesas,sk-rzg1m", "renesas,r8a7743"
+  - V3MSK
+compatible = "renesas,v3msk", "renesas,r8a77970"
   - Wheat
 compatible = "renesas,wheat", "renesas,r8a7792"
 
-- 
2.11.0

[GIT PULL] Renesas ARM Based SoC Updates for v4.16

[Simon Horman]

Hi Olof, Hi Kevin, Hi Arnd,

Please consider these Renesas ARM based SoC updates for v4.16.


The following changes since commit 4fbd8d194f06c8a3fd2af1ce560ddb31f7ec8323:

  Linux 4.15-rc1 (2017-11-26 16:01:47 -0800)

are available in the git repository at:

  https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas.git 
tags/renesas-soc-for-v4.16

for you to fetch changes up to 90f0d2b344313a8a4c366ef60d0df33008d2be84:

  soc: renesas: Identify R-Car M3-W ES1.1 (2017-11-27 11:40:57 +0100)


Renesas ARM Based SoC Updates for v4.16

* Identify R-Car M3-W ES1.1

  Geert Uytterhoeven says "The Product Register of R-Car M3-W ES1.1
  incorrectly identifies the SoC revision as ES2.0.  Add a workaround to
  fix this."

  It is my understanding that this is likely to be forwards-compatibile.


Geert Uytterhoeven (1):
  soc: renesas: Identify R-Car M3-W ES1.1

 drivers/soc/renesas/renesas-soc.c | 3 +++
 1 file changed, 3 insertions(+)

[GIT PULL] Renesas ARM Based SoC DT Bindings Updates for v4.16

[Simon Horman]

Hi Olof, Hi Kevin, Hi Arnd,

Please consider these Renesas ARM based SoC DT bindings updates for v4.16.


The following changes since commit 4fbd8d194f06c8a3fd2af1ce560ddb31f7ec8323:

  Linux 4.15-rc1 (2017-11-26 16:01:47 -0800)

are available in the git repository at:

  https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas.git 
tags/renesas-dt-bindings-for-v4.16

for you to fetch changes up to eebd0732136fd293c8f15a435978c1c34cd7f32f:

  arm64: renesas: document V3MSK board bindings (2017-11-29 09:18:24 +0100)


Renesas ARM Based SoC DT Bindings Updates for v4.16

* Document V3MSK board bindings

  These are the bindings for the R-Car V3M Starter Kit

* Document M3-W-based Salvator-XS board bingigns

  Geert Uytterhoeven says "The Renesas Salvator-XS (Salvator-X 2nd version)
  development board can be equipped with either an R-Car H3 ES2.0 or M3-W
  ES1.x SiP, which are pin-compatible."


Geert Uytterhoeven (1):
  ARM: shmobile: Document Renesas M3-W-based Salvator-XS board DT bindings

Sergei Shtylyov (1):
  arm64: renesas: document V3MSK board bindings

 Documentation/devicetree/bindings/arm/shmobile.txt | 4 
 1 file changed, 4 insertions(+)

Re: [PATCH] clk: renesas: r8a77970: add LVDS clock

[Geert Uytterhoeven]

On Tue, Dec 5, 2017 at 10:43 PM, Sergei Shtylyov
 wrote:
> I seem to have omitted the LVDS clock from the R8A77970 CPG/MSSR support
> patch for some reason -- add it back...
>
> Based on the original (and large) patch by Daisuke Matsushita
> .
>
> Fixes: 8d46e28fb508 ("clk: renesas: cpg-mssr: Add R8A77970 support")
> Signed-off-by: Vladimir Barinov 
> Signed-off-by: Sergei Shtylyov 

Reviewed-by: Geert Uytterhoeven 
i.e. will queue in clk-renesas-for-v4.16.

Gr{oetje,eeting}s,

Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- ge...@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds

[PATCH 3/3] usb: renesas_usbhs: use PIPEnCLR.ACLRM instead of {C,Dn}FIFOCTR.BCLR in usbhs_pkt_pop()

[Yoshihiro Shimoda]

This patch uses usbhs_pipe_clear_without_sequence() instead of
usbhsf_fifo_clear() because usbhsf_fifo_clear() may not clear the pipe
buffer completely. This patch also changes the clearing condition from
DMA only to both DMA and PIO.

Signed-off-by: Yoshihiro Shimoda 
---
 drivers/usb/renesas_usbhs/fifo.c | 5 ++---
 1 file changed, 2 insertions(+), 3 deletions(-)

diff --git a/drivers/usb/renesas_usbhs/fifo.c b/drivers/usb/renesas_usbhs/fifo.c
index ff96c2e..5925d11 100644
--- a/drivers/usb/renesas_usbhs/fifo.c
+++ b/drivers/usb/renesas_usbhs/fifo.c
@@ -94,8 +94,6 @@ static struct usbhs_pkt *__usbhsf_pkt_get(struct usbhs_pipe 
*pipe)
return list_first_entry_or_null(>list, struct usbhs_pkt, node);
 }
 
-static void usbhsf_fifo_clear(struct usbhs_pipe *pipe,
- struct usbhs_fifo *fifo);
 static void usbhsf_fifo_unselect(struct usbhs_pipe *pipe,
 struct usbhs_fifo *fifo);
 static struct dma_chan *usbhsf_dma_chan_get(struct usbhs_fifo *fifo,
@@ -124,10 +122,11 @@ struct usbhs_pkt *usbhs_pkt_pop(struct usbhs_pipe *pipe, 
struct usbhs_pkt *pkt)
chan = usbhsf_dma_chan_get(fifo, pkt);
if (chan) {
dmaengine_terminate_all(chan);
-   usbhsf_fifo_clear(pipe, fifo);
usbhsf_dma_unmap(pkt);
}
 
+   usbhs_pipe_clear_without_sequence(pipe, 0, 0);
+
__usbhsf_pkt_del(pkt);
}
 
-- 
1.9.1

[PATCH 0/3] usb: renesas_usbhs: modify fifo/pipe buffer clear handling

[Yoshihiro Shimoda]

This patch set is based on the latest Felipe's usb.git / testing next branch
(commit id = 3ed9bbf28b6bc494606b4c1847073343f96d85db).

Yoshihiro Shimoda (3):
  usb: renesas_usbhs: remove redundant polling in usbhsf_fifo_barrier()
  usb: renesas_usbhs: add usbhs_pipe_clear_without_sequence() function
  usb: renesas_usbhs: use PIPEnCLR.ACLRM instead of {C,Dn}FIFOCTR.BCLR
in usbhs_pkt_pop()

 drivers/usb/renesas_usbhs/fifo.c | 21 +++--
 drivers/usb/renesas_usbhs/pipe.c | 19 ++-
 drivers/usb/renesas_usbhs/pipe.h |  2 ++
 3 files changed, 23 insertions(+), 19 deletions(-)

-- 
1.9.1

[PATCH 1/3] usb: renesas_usbhs: remove redundant polling in usbhsf_fifo_barrier()

[Yoshihiro Shimoda]

The datasheet doesn't mention that needs to poll of FRDY is set or not.
So, this patch removes such handling in the usbhsf_fifo_barrier().

Signed-off-by: Yoshihiro Shimoda 
---
 drivers/usb/renesas_usbhs/fifo.c | 16 +---
 1 file changed, 5 insertions(+), 11 deletions(-)

diff --git a/drivers/usb/renesas_usbhs/fifo.c b/drivers/usb/renesas_usbhs/fifo.c
index 2d24ef3..ff96c2e 100644
--- a/drivers/usb/renesas_usbhs/fifo.c
+++ b/drivers/usb/renesas_usbhs/fifo.c
@@ -256,15 +256,9 @@ static void usbhsf_send_terminator(struct usbhs_pipe *pipe,
 static int usbhsf_fifo_barrier(struct usbhs_priv *priv,
   struct usbhs_fifo *fifo)
 {
-   int timeout = 1024;
-
-   do {
-   /* The FIFO port is accessible */
-   if (usbhs_read(priv, fifo->ctr) & FRDY)
-   return 0;
-
-   udelay(10);
-   } while (timeout--);
+   /* The FIFO port is accessible */
+   if (usbhs_read(priv, fifo->ctr) & FRDY)
+   return 0;
 
return -EBUSY;
 }
@@ -278,8 +272,8 @@ static void usbhsf_fifo_clear(struct usbhs_pipe *pipe,
if (!usbhs_pipe_is_dcp(pipe)) {
/*
 * This driver checks the pipe condition first to avoid -EBUSY
-* from usbhsf_fifo_barrier() with about 10 msec delay in
-* the interrupt handler if the pipe is RX direction and empty.
+* from usbhsf_fifo_barrier() if the pipe is RX direction and
+* empty.
 */
if (usbhs_pipe_is_dir_in(pipe))
ret = usbhs_pipe_is_accessible(pipe);
-- 
1.9.1