Hi Geert,
On Thu, Mar 22, 2018 at 6:55 PM, Geert Uytterhoeven
wrote:
> Hi Magnus,
>
> On Wed, Mar 21, 2018 at 11:34 AM, Geert Uytterhoeven
> wrote:
>> On Tue, Mar 20, 2018 at 9:20 AM, Magnus Damm wrote:
>>> From: Magnus Damm
On Thu, Mar 22, 2018 at 6:09 PM, Geert Uytterhoeven
wrote:
> Hi Linus,
>
> The following changes since commit a8ab4f2bd8a5298679dabe16910322625a0df247:
>
> pinctrl: sh-pfc: r8a77965: Add support for INTC-EX IRQ pins (2018-02-28
> 09:17:54 +0100)
>
> are
The r8a7792 Wheat board has two ADV7513 devices sharing a single I2C
bus, however in low power mode the ADV7513 will reset it's slave maps to
use the hardware defined default addresses.
The ADV7511 driver was adapted to allow the two devices to be registered
correctly - but it did not take into
The r8a7792 Wheat board has two ADV7513 devices sharing a single I2C
bus, however in low power mode the ADV7513 will reset it's slave maps to
use the hardware defined default addresses.
The ADV7511 driver was adapted to allow the two devices to be registered
correctly - but it did not take into
2018-03-23 0:13 GMT+09:00 Geert Uytterhoeven :
> Hi Laurent,
>
> CC Yamada-san
>
> On Thu, Mar 22, 2018 at 3:50 PM, Laurent Pinchart
> wrote:
>> On Thursday, 22 March 2018 16:26:22 EET Geert Uytterhoeven wrote:
>>> On Fri, Mar 16, 2018 at
Hi Mike, Stephen,
The following changes since commit 7ce36da900c0a2ff4777d9ba51c4f1cb74205463:
clk: renesas: cpg-mssr: Add support for R-Car M3-N (2018-02-26 09:13:29 +0100)
are available in the git repository at:
Hi Linus,
The following changes since commit a8ab4f2bd8a5298679dabe16910322625a0df247:
pinctrl: sh-pfc: r8a77965: Add support for INTC-EX IRQ pins (2018-02-28
09:17:54 +0100)
are available in the git repository at:
Hi Laurent,
CC Yamada-san
On Thu, Mar 22, 2018 at 3:50 PM, Laurent Pinchart
wrote:
> On Thursday, 22 March 2018 16:26:22 EET Geert Uytterhoeven wrote:
>> On Fri, Mar 16, 2018 at 2:39 AM, wrote:
>> > On Thursday, March 15, 2018 8:37 AM,
Hi Geert,
On Thursday, 22 March 2018 16:26:22 EET Geert Uytterhoeven wrote:
> On Fri, Mar 16, 2018 at 2:39 AM, wrote:
> > On Thursday, March 15, 2018 8:37 AM, Arnd Bergmann wrote:
> >> The *.dtb and *.dtb.S files get removed by 'make' during the build
> >> process, and
Hi Frank,
On Fri, Mar 16, 2018 at 2:39 AM, wrote:
> On Thursday, March 15, 2018 8:37 AM, Arnd Bergmann [mailto:a...@arndb.de]
> wrote:
>>
>> The *.dtb and *.dtb.S files get removed by 'make' during the build
>> process,
>> and later seem to be missed during the
On Thu, Mar 22, 2018 at 12:44 PM, Michel Pollet
wrote:
> This adds the newly added board to the Renesas built target
>
> Signed-off-by: Michel Pollet
Reviewed-by: Geert Uytterhoeven
Gr{oetje,eeting}s,
Hi Michel,
On Thu, Mar 22, 2018 at 12:44 PM, Michel Pollet
wrote:
> This adds a base device tree file for the RZN1-DB board, with only the
> basic support allowing the system to boot to a prompt. Only one UART is
> used, with only a single CPU running.
>
>
Hi Michel,
On Thu, Mar 22, 2018 at 12:44 PM, Michel Pollet
wrote:
> This adds the Renesas RZ/N1 Family (Part #R9A06G0xx) SoC
> bare bone support.
>
> This currently only handles generic parts (gic, architected timer)
> and a UART.
> For simplicity sake, this also
On Thu, Mar 22, 2018 at 12:44 PM, Michel Pollet
wrote:
> Add the RZ/N1 Family (Part #R9A06G0xx) ARCH config to the rest of
> the Renesas SoC collection.
>
> Signed-off-by: Michel Pollet
Subject should be "arm: shmobile: ..."
Apart
Hi Michel,
On Thu, Mar 22, 2018 at 12:44 PM, Michel Pollet
wrote:
> The Renesas RZ/N1 Family (Part #R9A06G0xx) needs a small driver
> to reboot the Cortex-A7 cores. This driver is a sub driver of
> the sysctrl MFD.
>
> Signed-off-by: Michel Pollet
Hi Michel,
On Thu, Mar 22, 2018 at 12:44 PM, Michel Pollet
wrote:
> This documents the RZ/N1 bindings for both the RZ/N1 and the RZN1D400-DB
> board.
>
> Signed-off-by: Michel Pollet
Thanks for your patch!
> ---
Hi Michel,
On Thu, Mar 22, 2018 at 12:44 PM, Michel Pollet
wrote:
> The Renesas RZ/N1 Family (Part #R9A06G0xx) requires a driver
> as part of the sysctrl MFD to handle rebooting the CA7 cores.
> This documents the driver bindings.
>
> Signed-off-by: Michel Pollet
Hi Michel,
Thanks for your patch!
On Thu, Mar 22, 2018 at 12:44 PM, Michel Pollet
wrote:
> The Renesas RZ/N1 Family (Part #R9A06G0xx) has a multi-function
> system controller. This documents the node used to encapsulate
> it's sub drivers.
its
>
> Signed-off-by:
This series adds the plain basic support for booting a bare
kernel on the RZ/N1D-DB Board. It's been trimmed to the strict
minimum as a 'base', further patches that will add the
rest of the support, pinctrl, clock architecture and quite
a few others.
Thanks for the comments on the previous
The Renesas RZ/N1 Family (Part #R9A06G0xx) has a multi-function
system controller. This documents the node used to encapsulate
it's sub drivers.
Signed-off-by: Michel Pollet
---
.../bindings/mfd/renesas,rzn1-sysctrl.txt | 22 ++
1 file
This documents the RZ/N1 bindings for both the RZ/N1 and the RZN1D400-DB
board.
Signed-off-by: Michel Pollet
---
Documentation/devicetree/bindings/arm/shmobile.txt | 5 -
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git
The Renesas RZ/N1 Family (Part #R9A06G0xx) requires a driver
as part of the sysctrl MFD to handle rebooting the CA7 cores.
This documents the driver bindings.
Signed-off-by: Michel Pollet
---
.../bindings/power/renesas,rzn1-reboot.txt | 22
Add the RZ/N1 Family (Part #R9A06G0xx) ARCH config to the rest of
the Renesas SoC collection.
Signed-off-by: Michel Pollet
---
arch/arm/mach-shmobile/Kconfig | 5 +
1 file changed, 5 insertions(+)
diff --git a/arch/arm/mach-shmobile/Kconfig
The Renesas RZ/N1 Family (Part #R9A06G0xx) needs a small driver
to reboot the Cortex-A7 cores. This driver is a sub driver of
the sysctrl MFD.
Signed-off-by: Michel Pollet
---
drivers/power/reset/Kconfig | 7 +++
drivers/power/reset/Makefile | 1 +
This adds the Renesas RZ/N1 Family (Part #R9A06G0xx) SoC
bare bone support.
This currently only handles generic parts (gic, architected timer)
and a UART.
For simplicity sake, this also relies on the bootloader to set the
pinctrl and clocks.
Signed-off-by: Michel Pollet
This adds the newly added board to the Renesas built target
Signed-off-by: Michel Pollet
---
arch/arm/boot/dts/Makefile | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index 3b4cc1b..0f01ada 100644
---
This adds a base device tree file for the RZN1-DB board, with only the
basic support allowing the system to boot to a prompt. Only one UART is
used, with only a single CPU running.
Signed-off-by: Michel Pollet
---
arch/arm/boot/dts/r9a06g032-rzn1d400-db.dts | 26
Sort subnodes of the soc node.
- The primary key is the bus address.
- The secondary key is the IP block.
- The tertiary key is the node name.
This is part of an ongoing effort to provide consistent node
order in the DT of Renesas SoCs to improve maintainability.
This should not have any
Sort nodes of the R-Car H3 (r8a7795) and M3-W (r8a7796) DTs.
This is part of an ongoing effort to provide consistent node
order in the DT of Renesas SoCs to improve maintainability.
This should not have any run-time effect.
Based on renesas-devel-20180321-v4.16-rc6
Changes since v1:
* Dropped
Sort subnodes of the root node alphanumerically.
This is part of an ongoing effort to provide consistent node
order in the DT of Renesas SoCs to improve maintainability.
This should not have any run-time effect.
Signed-off-by: Simon Horman
---
v2
* Also sort clock
Sort subnodes of the soc node.
- The primary key is the bus address.
- The secondary key is the IP block.
- The tertiary key is the node name.
This is part of an ongoing effort to provide consistent node
order in the DT of Renesas SoCs to improve maintainability.
This should not have any
Sort subnodes of the root node alphanumerically.
This is part of an ongoing effort to provide consistent node
order in the DT of Renesas SoCs to improve maintainability.
This should not have any run-time effect.
Signed-off-by: Simon Horman
---
v2
* New patch
---
On 20 March 2018 at 22:42, Wolfram Sang
wrote:
> From: Masaharu Hayakawa
>
> All our documentation says HOST_MODE, we don't really know where EXT_ACC
> came from. Rename it to reduce the confusion.
>
> Signed-off-by: Masaharu
Hi Magnus,
On Wed, Mar 21, 2018 at 11:34 AM, Geert Uytterhoeven
wrote:
> On Tue, Mar 20, 2018 at 9:20 AM, Magnus Damm wrote:
>> From: Magnus Damm
>>
>> Booting sh73a0 KZM9G results in the following on the console:
>>
>> [
Hi Magnus,
On Thu, Mar 22, 2018 at 7:07 AM, Magnus Damm wrote:
> On Wed, Mar 21, 2018 at 6:57 PM, Simon Horman wrote:
>> On Wed, Mar 21, 2018 at 09:51:33AM +0100, Simon Horman wrote:
>>> On Tue, Mar 20, 2018 at 04:51:07PM +0900, Magnus Damm wrote:
>>>
On Thu, Mar 22, 2018 at 03:07:49PM +0900, Magnus Damm wrote:
> Hi Simon,
>
> On Wed, Mar 21, 2018 at 6:57 PM, Simon Horman wrote:
> > On Wed, Mar 21, 2018 at 09:51:33AM +0100, Simon Horman wrote:
> >> On Tue, Mar 20, 2018 at 04:51:07PM +0900, Magnus Damm wrote:
> >> > From:
Hi Simon,
On Wed, Mar 21, 2018 at 6:57 PM, Simon Horman wrote:
> On Wed, Mar 21, 2018 at 09:51:33AM +0100, Simon Horman wrote:
>> On Tue, Mar 20, 2018 at 04:51:07PM +0900, Magnus Damm wrote:
>> > From: Magnus Damm
>> >
>> > Judging by
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