On Wed, Mar 28, 2018 at 5:22 PM, Phil Edworthy
wrote:
> The DesignWare GPIO IP can be configured for either 1 or 32 interrupts,
1 to 32, or just a choice between two?
> but the driver currently only supports 1 interrupt. See the DesignWare
> DW_apb_gpio Databook
From: Biju Das
Date: Thu, 29 Mar 2018 11:02:55 +0100
> Add a new compatible string for the RZ/G1C (R8A77470) SoC.
>
> Signed-off-by: Biju Das
> Reviewed-by: Fabrizio Castro
Applied.
On Fri, Mar 30, 2018 at 12:13:00PM +0900, Yoshihiro Kaneko wrote:
> This series adds thermal support for r8a77995.
> R-Car D3 (r8a77995) have a thermal sensor module which is similar to Gen2.
> Therefore this series adds r8a77995 support to rcar_thermal driver not
> rcar_gen3_thermal driver.
>
>
the system]
url:
https://github.com/0day-ci/linux/commits/Michel-Pollet/arm-Base-support-for-Renesas-RZN1D-DB-Board/20180330-103029
base: https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas.git devel
config: arm-allmodconfig (attached as .config)
compiler: arm-linux-gnueabi-gcc
On Thu, Mar 29, 2018 at 12:42 PM, Biju Das wrote:
> Enable low-level debugging support for RZ/G1C (r8a77470). RZ/G1C uses
> SCIF1 for the debug console.
>
> Signed-off-by: Biju Das
> Reviewed-by: Fabrizio Castro
On Thu, Mar 29, 2018 at 12:02 PM, Biju Das wrote:
> Add a new compatible string for the RZ/G1C (R8A77470) SoC.
>
> Signed-off-by: Biju Das
> Reviewed-by: Fabrizio Castro
Reviewed-by: Geert Uytterhoeven
Hi Kaneko-san,
On Fri, Mar 30, 2018 at 5:13 AM, Yoshihiro Kaneko wrote:
> Add support for R-Car D3 (r8a77995) thermal sensor.
>
> Signed-off-by: Yoshihiro Kaneko
Thanks for your patch!
> --- a/drivers/thermal/rcar_thermal.c
> +++
On Fri, Mar 30, 2018 at 5:13 AM, Yoshihiro Kaneko wrote:
> Signed-off-by: Yoshihiro Kaneko
Reviewed-by: Geert Uytterhoeven
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux
On Fri, Mar 30, 2018 at 5:13 AM, Yoshihiro Kaneko wrote:
> Signed-off-by: Yoshihiro Kaneko
Reviewed-by: Geert Uytterhoeven
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux
Hi Michel,
On Thu, Mar 29, 2018 at 9:47 AM, Michel Pollet
wrote:
> This adds the Renesas RZ/N1 Family (Part #R9A06G0xx) SoC
> bare bone support.
>
> This currently only handles generic parts (gic, architected timer)
> and a UART.
> For simplicity sake, this also
Hi Michel,
On Thu, Mar 29, 2018 at 9:46 AM, Michel Pollet
wrote:
> This documents the RZ/N1 bindings for both the RZ/N1 and the RZN1D-DB
> board.
>
> Signed-off-by: Michel Pollet
Thanks for your patch!
> ---
Hi Michel,
On Thu, Mar 29, 2018 at 9:46 AM, Michel Pollet
wrote:
> The Renesas RZ/N1 Family (Part #R9A06G0xx) requires a driver
> as part of the sysctrl MFD to handle rebooting the CA7 cores.
> This documents the driver bindings.
>
> Signed-off-by: Michel Pollet
Hi Michel,
On Thu, Mar 29, 2018 at 9:46 AM, Michel Pollet
wrote:
> The Renesas RZ/N1 Family (Part #R9A06G0xx) has a multi-function
> system controller. This documents the node used to encapsulate
> it's sub drivers.
>
> Signed-off-by: Michel Pollet
On Thu, Mar 29, 2018 at 12:17 PM, Biju Das wrote:
> Renesas RZ/G SoC have the R-Car gen2 compatible IRQC interrupt
> controllers. Document RZ/G1C (also known as R8A77470) SoC bindings.
>
> Signed-off-by: Biju Das
> Reviewed-by: Fabrizio Castro
On Thu, Mar 29, 2018 at 12:11 PM, Biju Das wrote:
> Renesas RZ/G SoC also have the R-Car gen2/3 compatible DMA controllers.
> Document RZ/G1C (also known as R8A77470) SoC bindings.
>
> Signed-off-by: Biju Das
> Reviewed-by: Fabrizio Castro
On Thu, Mar 29, 2018 at 07:33:05PM +0200, Geert Uytterhoeven wrote:
> Hi all,
>
> The CLK_TYPE_GEN2_LB clock type is meant for SoCs like R-Car H2, where
> the LB clock divider depends on the value of the MD18 pin.
>
> However, on most RZ/G1 and R-Car Gen2 SoCs, the LB clock divider is
>
On Thu, Mar 29, 2018 at 08:47:04AM +0100, Michel Pollet wrote:
> This adds the newly added board to the Renesas built target
>
> Signed-off-by: Michel Pollet
> Reviewed-by: Geert Uytterhoeven
> ---
> arch/arm/boot/dts/Makefile | 1 +
> 1
On Thu, Mar 29, 2018 at 08:47:03AM +0100, Michel Pollet wrote:
> This adds a base device tree file for the RZN1-DB board, with only the
> basic support allowing the system to boot to a prompt. Only one UART is
> used, with only a single CPU running.
>
> Signed-off-by: Michel Pollet
On Thu, Mar 29, 2018 at 01:04:50PM +0200, jacopo mondi wrote:
> Hi Michel
>
> The subject of all your patches for arch/arm should start with:
>
> ARM: dts:
>
> A git log on that directory clearly shows that's the preferred one.
>
> I would also say that you are missing a symbol definition in
>
On Thu, Mar 29, 2018 at 08:47:01AM +0100, Michel Pollet wrote:
> Add the RZ/N1 Family (Part #R9A06G0xx) ARCH config to the rest of
> the Renesas SoC collection.
>
> Signed-off-by: Michel Pollet
> Reviewed-by: Geert Uytterhoeven
Thanks,
On Thu, Mar 29, 2018 at 11:17:08AM +0100, Biju Das wrote:
> Renesas RZ/G SoC have the R-Car gen2 compatible IRQC interrupt
> controllers. Document RZ/G1C (also known as R8A77470) SoC bindings.
>
> Signed-off-by: Biju Das
> Reviewed-by: Fabrizio Castro
On Thu, Mar 29, 2018 at 11:11:06AM +0100, Biju Das wrote:
> Renesas RZ/G SoC also have the R-Car gen2/3 compatible DMA controllers.
> Document RZ/G1C (also known as R8A77470) SoC bindings.
>
> Signed-off-by: Biju Das
> Reviewed-by: Fabrizio Castro
On Thu, Mar 29, 2018 at 09:15:03AM +0200, Geert Uytterhoeven wrote:
> On Wed, Mar 28, 2018 at 9:26 PM, Biju Das wrote:
> > Enable recently added r8a77470 (RZ/G1C) SoC.
> >
> > Signed-off-by: Biju Das
> > Reviewed-by: Fabrizio Castro
On Thu, Mar 29, 2018 at 10:00:15AM +, Fabrizio Castro wrote:
> Hello Simon,
>
> thank you for reworking the subject.
>
> > Subject: Re: [PATCH 09/12] ARM: shmobile: Document iW-RainboW-G23S single
> > board computer
> >
> > On Wed, Mar 28, 2018 at 09:36:10AM +0200, Geert Uytterhoeven wrote:
On Wed, Mar 28, 2018 at 08:26:14PM +0100, Biju Das wrote:
> The initial R8A77470 SoC device tree including CPU0, GIC, timer, SYSC, RST,
> CPG, and the required clock descriptions.
>
> Signed-off-by: Biju Das
> Reviewed-by: Fabrizio Castro
On Thu, Mar 29, 2018 at 09:15:05AM +0200, Geert Uytterhoeven wrote:
> On Wed, Mar 28, 2018 at 9:26 PM, Biju Das wrote:
> > Add minimal support for the RZ/G1C (R8A77470) SoC.
> >
> > Signed-off-by: Biju Das
> > Reviewed-by: Fabrizio Castro
On Wed, Mar 28, 2018 at 08:26:09PM +0100, Biju Das wrote:
> Add support for RZ/G1C (R8A77470) SoC power areas to the R-Car SYSC
> driver.
>
> Signed-off-by: Biju Das
> Reviewed-by: Fabrizio Castro
> Reviewed-by: Geert Uytterhoeven
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