Enable PCIe PHY and PCIEC and specify the PCIe bus clock for the Condor
board.
Based on the original (and large) patch by Vladimir Barinov.
Signed-off-by: Vladimir Barinov
Signed-off-by: Sergei Shtylyov
---
Changes in version 2:
- mentioned Vladimir's original work and added his signoff;
-
Describe the PCIe PHY, PCIEC, and PCIe bus clock in the R8A77980 device
tree.
Based on the original (and large) patch by Vladimir Barinov.
Signed-off-by: Vladimir Barinov
Signed-off-by: Sergei Shtylyov
---
Changes in version 2:
- merged in the PCIEC patch, renamed the patch, updated the
Hello!
Here's the set of 2 patches against Simon Horman's 'renesas.git' repo's
'renesas-devel-20180614v2-v4.17' tag. We're adding the R8A77980 PCIe related
device nodes and then enable PCIe on the Condor board. These patches depend
on the R8A77980 PCIe PHY driver support in order to work
On Wed, Jun 13, 2018 at 12:25:59PM -0500, Bjorn Helgaas wrote:
> On Wed, Jun 13, 2018 at 04:52:52PM +0100, Lorenzo Pieralisi wrote:
> > On Wed, Jun 13, 2018 at 08:53:08AM -0500, Bjorn Helgaas wrote:
> > > On Wed, Jun 13, 2018 at 01:54:51AM +0200, Marek Vasut wrote:
> > > > On 06/11/2018 03:59 PM,
Hello!
On 06/14/2018 02:00 PM, Michel Pollet wrote:
> This provides a pinctrl driver for the Renesas R9A06G032 SoC
>
> Signed-off-by: Michel Pollet
> ---
> arch/arm/boot/dts/r9a06g032.dtsi | 8
> 1 file changed, 8 insertions(+)
>
> diff --git a/arch/arm/boot/dts/r9a06g032.dtsi
>
Hi,
** This series is for informational purposes only! **
This series is comprised of backports to v4.14 of the following
components from their standard as of v4.16 to that of v4.17:
* at24
* cpg
* dw-hdmi
* gen3
* gpio-rcar
* i2c-rcar
* i2c-sh-mobile
* ipmmu-vmsa
* irq-renesas-irqc
* m25p80
*
Hi,
** This series is for informational purposes only! **
This series is comprised of backports to v4.14 of the following
components from their standard as of v4.15 to that of v4.16:
* at24
* cpg
* dw-hdmi
* gen3
* gpio-rcar
* i2c-rcar
* i2c-sh-mobile
* ipmmu-vmsa
* irq-renesas-irqc
* m25p80
*
On Thu, Jun 14, 2018 at 09:29:33AM +0200, Simon Horman wrote:
> On Thu, Jun 14, 2018 at 10:56:07AM +0900, Wolfram Sang wrote:
> > Due to a merge conflict, this got accidently dropped. Add it again.
> >
> > Signed-off-by: Wolfram Sang
> > ---
> > arch/arm64/boot/dts/renesas/r8a7796.dtsi | 1 +
>
On Thu, Jun 14, 2018 at 10:43:48AM +0900, Wolfram Sang wrote:
>
> > This does not apply cleanly on top of renesas-devel-20180608-v4.17.
> >
> > Please rebase.
>
> Sorry, seems I missed an update to renesas/devel :( Will rebase and
> resend.
Thanks Wolfram, much appreciated.
On Thu, Jun 14, 2018 at 10:56:06AM +0900, Wolfram Sang wrote:
> Signed-off-by: Wolfram Sang
> Acked-by: Yoshihiro Shimoda
> Acked-by: Kuninori Morimoto
Thanks Wolfram, applied.
On Thu, Jun 14, 2018 at 10:42:30AM +0900, Wolfram Sang wrote:
> Hi Simon,
>
> > I applied this by hand, resolving the conflict in r8a7796.dtsi.
>
> Thanks for doing this Simon.
>
> > The result is below. Wolfram, please check it.
>
> I am afraid there is something missing, though...
>
> >
On Thu, Jun 14, 2018 at 10:56:07AM +0900, Wolfram Sang wrote:
> Due to a merge conflict, this got accidently dropped. Add it again.
>
> Signed-off-by: Wolfram Sang
> ---
> arch/arm64/boot/dts/renesas/r8a7796.dtsi | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git
On Wed, Jun 13, 2018 at 11:12:40PM +0300, Sergei Shtylyov wrote:
> Define the Condor/V3HSK board dependent parts of the DU and LVDS device
> nodes. Also add the device nodes for Thine THC63LVD1024 LVDS decoder and
> Analog Devices ADV7511W HDMI transmitter...
>
> Based on the original (and
On Wed, Jun 13, 2018 at 11:11:27PM +0300, Sergei Shtylyov wrote:
> Describe the interconnected FCPVD0, VSPD0, DU, and LVDS0 devices in the
> R8A77980 device tree...
>
> Based on the original (and large) patch by Vladimir Barinov.
>
> Signed-off-by: Vladimir Barinov
> Signed-off-by: Sergei
On Wed, Jun 13, 2018 at 07:44:02PM +0300, Sergei Shtylyov wrote:
> On 06/13/2018 07:42 PM, Sergei Shtylyov wrote:
>
> > Specify Ethernet PHY IRQs in the Condor/V3HSK board device trees, now that
> > we have the GPIO support (previously phylib had to resort to polling).
> >
> > Based on the
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