Introduce RZ/A2 (R7S9210) as an SoC that can be selected.
Chris Brandt (2):
ARM: shmobile: Add basic RZ/A2 SoC support
dt-bindings: arm: Document RZ/A2 SoC DT bindings
Documentation/devicetree/bindings/arm/shmobile.txt | 2 ++
arch/arm/mach-shmobile/Kconfig | 6 +
Add device tree bindings documentation for Renesas RZ/A2 (r7s9210) SoC.
Signed-off-by: Chris Brandt
---
Documentation/devicetree/bindings/arm/shmobile.txt | 2 ++
1 file changed, 2 insertions(+)
diff --git a/Documentation/devicetree/bindings/arm/shmobile.txt
b/Documentation/devicetree/bindings
Add the RZ/A2 SoC to the Renesas SoC collection.
Signed-off-by: Chris Brandt
---
arch/arm/mach-shmobile/Kconfig | 6 ++
arch/arm/mach-shmobile/Makefile| 1 +
arch/arm/mach-shmobile/setup-r7s9210.c | 27 +++
3 files changed, 34 insertions(+)
create m
Hi Geert,
On Thursday, 5 July 2018 13:55:00 EEST Geert Uytterhoeven wrote:
> On Thu, Jun 14, 2018 at 1:36 PM Simon Horman wrote:
> > This series is comprised of backports to v4.14 of the following
> > components from their standard as of v4.16 to that of v4.17:
[snip]
> I subjected it to the sa
> Do you want me to implement it?
Yes, please.
Thanks a lot!
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Hi Wolfram,
On Wed, Jul 11, 2018 at 6:33 PM Wolfram Sang
wrote:
> @Geert: any reason gpio-rcar is missing it? I would need it for the
> i2c-gpio-fault-injector.
Because so far no one had a need for it?
/me thought gpiolib would return a cached value from a previous
set_direction_{in,out}put(), b
Add support for RZ/A2 series.
The clock HW is similar to RZ/A1, but with different dividers
and additional clocks sources.
Chris Brandt (2):
clk: renesas: mstp: Add support for r7s9210
clk: renesas: mstp: Document R7S9210 support
.../bindings/clock/renesas,cpg-mstp-clocks.txt | 1 +
d
Renesas R7S9210 SoC also has the CPG MSTP clocks.
Signed-off-by: Chris Brandt
---
Documentation/devicetree/bindings/clock/renesas,cpg-mstp-clocks.txt | 1 +
1 file changed, 1 insertion(+)
diff --git
a/Documentation/devicetree/bindings/clock/renesas,cpg-mstp-clocks.txt
b/Documentation/devicetr
Add support for RZ/A2 series.
The clock HW is similar to RZ/A1, but with different dividers
and additional clocks sources.
Signed-off-by: Chris Brandt
---
drivers/clk/renesas/Kconfig| 5 ++
drivers/clk/renesas/Makefile | 1 +
drivers/clk/renesas/clk-mstp.c | 3 +
drivers/clk/renesas/
> Hmmm, the name i2c_generic_bus_free suggests that scl should also be checked,
> because the *bus* isn't really free unless both lines are high? No? Or, maybe
> just rename to i2c_generic_sda_free (or something)?
Well, technically, bus recovery is just for resurrecting a stuck low
SDA. So, I'd t
On Wed, Jul 11, 2018 at 07:51:02AM +0200, Peter Rosin wrote:
> On 2018-07-10 23:42, Wolfram Sang wrote:
> > For bus recovery, we either need to bail out early if we can read SDA or
> > we need to send STOP after every pulse. Otherwise recovery might be
> > misinterpreted as an unwanted write. So, r
Hi Peter,
> Hmmm, should not the ndelay before the loop also be split up in two like
> this, with one ndelay(... / 2) on either side of the (possible) set_sda.
> Not that it should matter, since SDA is presumably stuck low. But what if
> it isn't?
I agree it would be better.
> I would also chang
EINVAL is very generic, use ENOTSUPP in case the gpiochip does not
provide this function. While removing the assignment from the 'status'
variable, use better indentation in the declaration block.
Signed-off-by: Wolfram Sang
---
I got puzzled by the EINVAL until I found out that gpio-rcar simply
Hi Simon,
On Wed, Jul 11, 2018 at 4:41 PM Simon Horman wrote:
> On Fri, Jul 06, 2018 at 11:05:41AM +0200, Geert Uytterhoeven wrote:
> > When the sh-sci driver detects an issue with DMA during operation, it
> > falls backs to PIO, and releases all DMA resources.
> >
> > As releasing DMA resources
Hi Simon,
On Wed, Jul 11, 2018 at 4:52 PM Simon Horman wrote:
> On Fri, Jul 06, 2018 at 11:05:42AM +0200, Geert Uytterhoeven wrote:
> > The transmit DMA workqueue is never stopped, hence the work function may
> > be called after the port has been shut down.
> >
> > Fix this race condition by canc
Hi Geert,
On 11 July 2018 13:42, Geert Uytterhoeven wrote:
> On Wed, Jul 11, 2018 at 2:30 PM Phil Edworthy wrote:
> > The Renesas RZ/N1 UART is based on the Synopsys DW UART, but has
> > additional registers for DMA. This patch does not address the changes
> > required for DMA support, it simply a
On Fri, Jul 06, 2018 at 11:05:43AM +0200, Geert Uytterhoeven wrote:
> As of commit b36f09c3c441a6e5 ("dmaengine: Add transfer termination
> synchronization support"), dmaengine_terminate_all() is deprecated.
>
> Replace calls to dmaengine_terminate_all() in DMA release code by calls
> to dmaengine
On Fri, Jul 06, 2018 at 11:05:42AM +0200, Geert Uytterhoeven wrote:
> The transmit DMA workqueue is never stopped, hence the work function may
> be called after the port has been shut down.
>
> Fix this race condition by cancelling queued work, if any, before DMA
> release. Don't initialize the w
Add R7S9210 (RZ/A2) support
Signed-off-by: Chris Brandt
---
Documentation/devicetree/bindings/serial/renesas,sci-serial.txt | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/serial/renesas,sci-serial.txt
b/Documentation/devicetree/bindings/serial/renesas,sci-
The RZ/A2 uses a modified SCIF that until recently was only used in
Renesas MCU devices (not MPU devices).
So, while it functions mostly the same as a normal SCIF, some things
needed to be shifted around.
Chris Brandt (2):
serial: sh-sci: Add support for R7S9210
serial: sh-sci: Document r7s92
Add support for a "RZ_SCIFA" which is different than a traditional
SCIFA. It looks like a normal SCIF with FIFO data, but with a
compressed address space. Also, the break out of interrupts
are different then traditinal SCIF: ERI/BRI, RXI, TXI, TEI, DRI.
The R7S9210 (RZ/A2) contains this type of SCI
On Fri, Jul 06, 2018 at 11:05:41AM +0200, Geert Uytterhoeven wrote:
> When the sh-sci driver detects an issue with DMA during operation, it
> falls backs to PIO, and releases all DMA resources.
>
> As releasing DMA resources immediately has no advantages, but
> complicates the code, and is suscept
Enable support for the Renesas RZN1D-DB Board:
- RZ/N1D (R9A06G032) base SoC support.
Signed-off-by: Geert Uytterhoeven
---
arch/arm/configs/multi_v7_defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/configs/multi_v7_defconfig
b/arch/arm/configs/multi_v7_defconfig
index 1
Add a clock type and macro for defining clocks using the OSC EXTAL
predivider combined with a fixed divider.
On most R-Car Gen3 SoCs, the predivider value depends on mode pins, and
thus must be specified in the configuration structure.
Inspired by a patch in the BSP by Takeshi Kihara
.
Signed-of
R-Car Gen3 Hardware Manual Rev.0.52 documents the relation between the
MD13 and MD14 mode pins, and the OSC EXTAL predivider, as used by the
OSC and RINT RCLK clocks. Hence augment the configuration structure
with all documented predivider values.
According to R-Car Gen3 Hardware Manual Rev.1.00,
R-Car Gen3 Hardware Manual Rev.0.52 documents the relation between the
MD13 and MD14 mode pins, and the OSC EXTAL predivider, as used by the
OSC and RINT RCLK clocks. Hence augment the configuration structure
with all documented predivider values.
According to R-Car Gen3 Hardware Manual Rev.0.53,
Add a clock type and macro for defining clocks where the parent and
divider are selected based on the value of the RCKCR.CKSEL bit.
Signed-off-by: Geert Uytterhoeven
---
drivers/clk/renesas/rcar-gen3-cpg.c | 23 ---
drivers/clk/renesas/rcar-gen3-cpg.h | 8 +++-
2 files c
Add support for defining fixed rate clocks, to be used for on-chip
oscillators.
Signed-off-by: Geert Uytterhoeven
---
drivers/clk/renesas/renesas-cpg-mssr.c | 5 +
drivers/clk/renesas/renesas-cpg-mssr.h | 3 +++
2 files changed, 8 insertions(+)
diff --git a/drivers/clk/renesas/renesas-cpg-m
R-Car Gen3 Hardware Manual Rev.0.54 documents the relation between the
MD13 and MD14 mode pins, and the OSC EXTAL predivider, as used by the
OSC clock. Hence augment the configuration structure with all
documented predivider values.
Add the OSC clock using the configured predivider.
Signed-off-b
According to R-Car Gen3 Hardware Manual Rev.1.00, R-Car D3 has the
RCLK Frequency Control Register (RCKCR), which determines the OSC and
RINT predivider values, and selection of the RCLK clock source between
RINT and the On-Chip Oscillator.
Hence change the OSC and RINT clock definitions to use th
According to R-Car Gen3 Hardware Manual Rev.1.00, R-Car E3 has the
RCLK Frequency Control Register (RCKCR), which determines the OSC and
RINT predivider values, and selection of the RCLK clock source between
RINT and the On-Chip Oscillator.
Hence change the OSC and RINT clock definitions to use th
Hi all,
This patch series contains various improvements for OSC and RCLK
handling on R-Car Gen3 SoCs.
This has been tested on R-Car H3 ES1.0/ES2.0, R-Car M3-W ES1.0, R-Car
D3, and R-Car E3.
The R-Car V3H (r8a77980) patches were compile-tested only due to lack of
hardware.
Thanks for your
On R-Car V3H, RCLK can be switched between EXTALR and the On-Chip
Oscillator using mode pin MD19.
Signed-off-by: Geert Uytterhoeven
---
As Figure 8.1e "Block Diagram of CPG (R-Car V3H)" does not show any
divider after the On-Chip Oscillator, I assume the OCO runs at 32768 Hz.
---
drivers/clk/ren
R-Car Gen3 Hardware Manual Rev.0.52 documents the relation between the
MD13 and MD14 mode pins, and the OSC EXTAL predivider, as used by the
OSC and RINT RCLK clocks. Hence augment the configuration structure
with all documented predivider values.
According to R-Car Gen3 Hardware Manual Rev.0.53,
Make the existing support for selecting between clean and SSCG clocks
using MD12 more generic, to allow using other mode pins for arbitrary
clock selection.
Signed-off-by: Geert Uytterhoeven
---
drivers/clk/renesas/rcar-gen3-cpg.c | 10 --
drivers/clk/renesas/rcar-gen3-cpg.h | 13 +++
On Wed, Jul 11, 2018 at 02:43:42PM +0200, Geert Uytterhoeven wrote:
> On Wed, Jul 11, 2018 at 10:49 AM Yoshihiro Shimoda
> wrote:
> > The labels for RWDT device node were named as 2 types now:
> >
> > - wdt0: r8a7795, r8a7796, r8a77965.
> > - rwdt: r8a77970, r8a77990, r8a77995.
> >
> > To be mad
On Wed, Jul 11, 2018 at 10:49 AM Yoshihiro Shimoda
wrote:
> The labels for RWDT device node were named as 2 types now:
>
> - wdt0: r8a7795, r8a7796, r8a77965.
> - rwdt: r8a77970, r8a77990, r8a77995.
>
> To be made consistent, this patch unifis the labels as the hardware
> name "rwdt".
>
> Signed
Hi Phil,
On Wed, Jul 11, 2018 at 2:30 PM Phil Edworthy wrote:
> The Renesas RZ/N1 UART is based on the Synopsys DW UART, but has additional
> registers for DMA. This patch does not address the changes required for DMA
> support, it simply adds the compatible string.
>
> Signed-off-by: Phil Edwort
Hi Phil,
On Wed, Jul 11, 2018 at 2:30 PM Phil Edworthy wrote:
> The RZ/N1 UART is a modified Synopsys DesignWare UART.
> The modifications only relate to DMA so you could actually use the
> controller with the Synopsys compatible string if you are not using
> DMA, but you should not do so.
>
> Si
The Renesas RZ/N1 UART is based on the Synopsys DW UART, but has additional
registers for DMA. This patch does not address the changes required for DMA
support, it simply adds the compatible string.
Signed-off-by: Phil Edworthy
---
drivers/tty/serial/8250/8250_dw.c | 1 +
1 file changed, 1 inser
The RZ/N1 UART is a modified Synopsys DesignWare UART.
The modifications only relate to DMA so you could actually use the
controller with the Synopsys compatible string if you are not using
DMA, but you should not do so.
Signed-off-by: Phil Edworthy
---
Documentation/devicetree/bindings/serial/r
Just a new compatible string for the Synopsys UART to allow us to add DMA at
some point in the future.
Phil Edworthy (2):
dt: serial: Add Renesas RZ/N1 binding documentation
serial: 8250_dw: Add compatible string for Renesas RZ/N1 UART
Documentation/devicetree/bindings/serial/renesas,rzn1-ua
The labels for RWDT device node were named as 2 types now:
- wdt0: r8a7795, r8a7796, r8a77965.
- rwdt: r8a77970, r8a77990, r8a77995.
To be made consistent, this patch unifis the labels as the hardware
name "rwdt".
Signed-off-by: Yoshihiro Shimoda
---
arch/arm64/boot/dts/renesas/r8a7795.dtsi
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