On 10/05/2018 10:25 PM, Sergei Shtylyov wrote:
> Describe THS/CIVM in the R8A77970 device trees.
Damn, should be singular "tree"! :-/
> Based on the original (and large) patches by Vladimir Barinov.
>
> Signed-off-by: Vladimir Barinov
> Signed-off-by: Sergei Shtylyov
[...]
MBR, Sergei
Describe THS/CIVM in the R8A77970 device trees.
Based on the original (and large) patches by Vladimir Barinov.
Signed-off-by: Vladimir Barinov
Signed-off-by: Sergei Shtylyov
---
This patch is against the 'renesas-devel-20181004-v4.19-rc6' tag of Simon
Horman's 'renesas.git' repo.
The thermal
> May I ask how exactly you spotted the "shift-31-problem" in
> drivers/i2c/busses/i2c-rcar.c:
> - visual code review?
> - static analysis, special compiler flags?
This one. I run a set of static code analyziers when applying patches.
One of them is 'cppcheck' which reported it.
> According
On Thu, Sep 20, 2018 at 06:14:20PM +0200, Wolfram Sang wrote:
> The usefulness of this debug output is questionable. It covers only
> direct i2c_transfer calls and no SMBUS calls, neither direct nor
> emulated ones. And the latter one is largely used in the kernel, so a
> lot of stuff is missed.
On Thu, Sep 20, 2018 at 06:14:21PM +0200, Wolfram Sang wrote:
> Using the common kernel pattern to bail out at the beginning if some
> conditions are not met, we can save a level of indentation. No
> functional change.
>
> Signed-off-by: Wolfram Sang
I think we can have this clean up already.
Hi Wolfram,
Thanks for your feedback.
On 2018-10-03 00:54:02 +0200, Wolfram Sang wrote:
> On Wed, Sep 26, 2018 at 05:00:26PM +0200, Niklas Söderlund wrote:
> > From: Masaharu Hayakawa
> >
> > The initial value of the interrupt mask register may be different from
> > the H/W manual at the
Add device tree binding documentation and header file for Renesas R7S9210
(RZ/A2) SoCs.
Signed-off-by: Chris Brandt
---
.../bindings/pinctrl/renesas,rza2-pinctrl.txt | 76 ++
include/dt-bindings/pinctrl/r7s9210-pinctrl.h | 47 +
2 files changed, 123
Adds support for the pin and gpio controller found in R7S9210 (RZ/A2) SoCs.
Signed-off-by: Chris Brandt
---
drivers/pinctrl/Kconfig| 11 +
drivers/pinctrl/Makefile | 1 +
drivers/pinctrl/pinctrl-rza2.c | 519 +
3 files changed, 531
The pin controller in the RZ/A2 is nothing like the pin controller in
the RZ/A1. That's a good thing! This pin controller is much more simple
and easier to configure.
So, this driver is faily simple (I hope).
Chris Brandt (2):
pinctrl: Add RZ/A2 pin and gpio controller
dt-bindings: pinctrl:
Hi Linus,
The following changes since commit a97f340c0a071bcb32ff68f3d19cf56a76887288:
pinctrl: sh-pfc: rcar: Rename automotive-only arrays to automotive
(2018-09-28 09:49:15 +0200)
are available in the Git repository at:
On Thu, Oct 4, 2018 at 11:03 PM Sergei Shtylyov
wrote:
> Add the R-Car V3M (R8A77970) SoC support to the R-Car gen2 thermal driver.
> The hardware is the same as in the R-Car D3 (R8A77995) plus the CIVM status
> register (we don't use).
>
> Signed-off-by: Sergei Shtylyov
Reviewed-by: Geert
On Thu, Oct 4, 2018 at 11:02 PM Sergei Shtylyov
wrote:
> Document the R-Car V3M (R8A77970) SoC in the Renesas R-Car gen2 thermal
> bindings. The hardware is the same as in the R-Car D3 (R8A77995) plus an
> extra status register.
>
> Signed-off-by: Sergei Shtylyov
Reviewed-by: Geert
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