Hi Simon
sorry for my late response
> > > It will be v4.21, not for v4.20.
> >
> > Are the dependencies present in v4.21-rc1?
> > If so perhaps we could apply this series as
> > my branches are currently based on v4.21-rc1.
> >
> > Let me know what you think.
>
> Hi Morimoto-san,
>
> could
On Mon, Nov 19, 2018 at 10:38 AM Geert Uytterhoeven
wrote:
> Wolfram: Eugenu's commit 4f145f14f6b98b5a ("dt-bindings: can:
> rcar_can: document r8a77965 support") is in next as of next-20181115 .
> However, it's not part of linux-can-next. Seems to be destined for v4.20 as
> a fix.
... which has
Hi Shimodaさん
From: Yoshihiro Shimoda
Sent: Monday, November 19, 2018 3:58 AM
> And I read Figure 32.1 of the RZ/A2 documentation and I wonder if we need
> to release
> USBCTR.PLL_RST even if we use USB peripheral mode.
I will ask the RZ/A2 design team to confirm.
If this setting is required, I
* Geert Uytterhoeven [181115 03:25]:
> As of commit d1dabab2841d546f ("ARM: OMAP2+: Clean up
> omap4_local_timer_init"), this header file is no longer used.
Applying into omap-for-v4.21/soc thanks.
Tony
From: Dmitry Shifrin
Add the QSPI{0|1} pins/groups/functions to the R8A77980 PFC driver.
[Sergei: ported to the upstream driver, fixed up the swapped QSPI0 SPCLK/
SSL pins, fixed up the comments, moved the QSPI pins/groups/functions to
be in the alphanumeric order, removed unneeded empty lines,
Hi Ulf, Wolfram
On 2018-11-19 14:33:58 +0100, Wolfram Sang wrote:
>
> > Sure, no problem. I drop this and the other series then.
>
> Thanks, Ulf!
>
Thanks for looking out for me here, I will fly home tomorrow so I hope
to get a new versions of these series out late this week.
--
Regards,
Document SoC specific bindings for RZ/G2M (r8a774a1) SoC.
Signed-off-by: Biju Das
---
Documentation/devicetree/bindings/timer/renesas,cmt.txt | 11 ---
1 file changed, 8 insertions(+), 3 deletions(-)
diff --git a/Documentation/devicetree/bindings/timer/renesas,cmt.txt
This fixes the check for unused mdio bus setting and the following static
checker warning:
drivers/pinctrl/pinctrl-rzn1.c:198 rzn1_pinctrl_mdio_select()
warn: always true condition '(ipctl->mdio_func[mdio] >= 0) => (0-u32max >= 0)'
It also fixes the return var when calling of_get_child_count()
Hi Daniel,
Thanks for the feedback.
> >> Subject: Re: [PATCH] arm64: dts: renesas: r8a7796: Add CMT device
> >> nodes
> >>
> >> On 26/10/2018 10:25, Biju Das wrote:
> >>> This patch adds CMT{0|1|2|3} device nodes for r8a7796 SoC.
> >>>
> >>> Signed-off-by: Biju Das
> >>> ---
> >>> This patch is
On Mon, Nov 19, 2018 at 03:12:00PM +0100, Marek Vasut wrote:
> On 11/19/2018 11:01 AM, Mason Yang wrote:
> > +++ b/drivers/spi/spi-renesas-rpc.c
> > @@ -0,0 +1,750 @@
> > +// SPDX-License-Identifier: GPL-2.0
> > +//
> > +// Copyright (C) 2018 ~ 2019 Renesas Solutions Corp.
> > +// Copyright (C)
On Mon, 19 Nov 2018 16:12:41 +0100
Marek Vasut wrote:
> On 11/19/2018 03:43 PM, Boris Brezillon wrote:
> > On Mon, 19 Nov 2018 15:14:07 +0100
> > Marek Vasut wrote:
> >
> >> On 11/19/2018 03:10 PM, Boris Brezillon wrote:
> >>> On Mon, 19 Nov 2018 14:49:31 +0100
> >>> Marek Vasut wrote:
>
On 11/19/2018 03:43 PM, Boris Brezillon wrote:
> On Mon, 19 Nov 2018 15:14:07 +0100
> Marek Vasut wrote:
>
>> On 11/19/2018 03:10 PM, Boris Brezillon wrote:
>>> On Mon, 19 Nov 2018 14:49:31 +0100
>>> Marek Vasut wrote:
>>>
On 11/19/2018 11:01 AM, Mason Yang wrote:
> Document the
On Mon, 19 Nov 2018 15:14:07 +0100
Marek Vasut wrote:
> On 11/19/2018 03:10 PM, Boris Brezillon wrote:
> > On Mon, 19 Nov 2018 14:49:31 +0100
> > Marek Vasut wrote:
> >
> >> On 11/19/2018 11:01 AM, Mason Yang wrote:
> >>> Document the bindings used by the Renesas R-Car D3 RPC controller.
>
On 11/19/2018 10:38 AM, Geert Uytterhoeven wrote:
> Hi Marek, Wolfram,
Hi,
> On Mon, Nov 19, 2018 at 12:46 AM Marek Vasut wrote:
>> On 11/19/2018 12:14 AM, Wolfram Sang wrote:
>>> On Sun, Nov 18, 2018 at 06:30:56PM +0100, Marek Vasut wrote:
Document the support for rcar_can on R8A77990 SoC
On 11/19/2018 03:10 PM, Boris Brezillon wrote:
> On Mon, 19 Nov 2018 14:49:31 +0100
> Marek Vasut wrote:
>
>> On 11/19/2018 11:01 AM, Mason Yang wrote:
>>> Document the bindings used by the Renesas R-Car D3 RPC controller.
>>>
>>> Signed-off-by: Mason Yang
>>> ---
>>>
This adds clk_get_optional() and devm_clk_get_optional() functions to get
optional clocks.
They behave the same as (devm_)clk_get except where there is no clock
producer. In this case, instead of returning -ENOENT, the function
returns NULL. This makes error checking simpler and allows
On 11/19/2018 11:01 AM, Mason Yang wrote:
> Add a driver for Renesas R-Car D3 RPC SPI controller driver.
The RPC supports both HF and SPI, not just SPI. And it's present in all
of Gen3 , not just D3 .
[...]
> +++ b/drivers/spi/spi-renesas-rpc.c
> @@ -0,0 +1,750 @@
> +// SPDX-License-Identifier:
On Mon, 19 Nov 2018 14:49:31 +0100
Marek Vasut wrote:
> On 11/19/2018 11:01 AM, Mason Yang wrote:
> > Document the bindings used by the Renesas R-Car D3 RPC controller.
> >
> > Signed-off-by: Mason Yang
> > ---
> > .../devicetree/bindings/spi/spi-renesas-rpc.txt| 33
> >
On 11/19/2018 11:01 AM, Mason Yang wrote:
> Document the bindings used by the Renesas R-Car D3 RPC controller.
>
> Signed-off-by: Mason Yang
> ---
> .../devicetree/bindings/spi/spi-renesas-rpc.txt| 33
> ++
> 1 file changed, 33 insertions(+)
> create mode 100644
Hi Linus,
On Mon, Nov 19, 2018 at 2:22 PM Linus Walleij wrote:
> On Tue, Nov 13, 2018 at 6:28 PM Geert Uytterhoeven
> wrote:
> > Anyway, we're getting closer to bikeshedding, so with the real issues fixed:
> > Reviewed-by: Geert Uytterhoeven
>
> I assume you are queueing the RZ/A2 stuff as
Hi Uwe,
On 19 November 2018 12:58 Uwe Kleine-König wrote:
> On Mon, Nov 19, 2018 at 12:53:46PM +, Phil Edworthy wrote:
> > On 19 November 2018 10:46 Uwe Kleine-König wrote:
> > > On Mon, Nov 19, 2018 at 10:41:42AM +, Phil Edworthy wrote:
> > > > btw, do we need to add
> Sure, no problem. I drop this and the other series then.
Thanks, Ulf!
signature.asc
Description: PGP signature
kbuild test robot reports:
>> ERROR: "i2c_mux_add_adapter" [drivers/gpu/drm/bridge/sii902x.ko]
undefined!
>> ERROR: "i2c_mux_alloc" [drivers/gpu/drm/bridge/sii902x.ko]
undefined!
>> ERROR: "i2c_mux_del_adapters" [drivers/gpu/drm/bridge/sii902x.ko]
undefined!
Quite obviously the driver depends on
> -Original Message-
> From: linux-renesas-soc-ow...@vger.kernel.org
> On Behalf Of Boris Brezillon
> Sent: 19 November 2018 13:23
> To: Fabrizio Castro
> Cc: Peter Rosin ; Archit Taneja ;
> Andrzej Hajda ; David Airlie
> ; Laurent Pinchart ;
> dri-de...@lists.freedesktop.org;
On Mon, 19 Nov 2018 13:09:16 +
Fabrizio Castro wrote:
> Hi Boris,
>
> > From: Boris Brezillon
> > Sent: 19 November 2018 12:51
> > Subject: Re: [PATCH] drm/bridge: Fix 0-day build error
> >
> > Hi Fabrizio,
> >
> > The prefix should be "drm/bridge/sii902x:" and I'd prefer a short
> >
kbuild test robot reports:
>> ERROR: "i2c_mux_add_adapter" [drivers/gpu/drm/bridge/sii902x.ko]
undefined!
>> ERROR: "i2c_mux_alloc" [drivers/gpu/drm/bridge/sii902x.ko]
undefined!
>> ERROR: "i2c_mux_del_adapters" [drivers/gpu/drm/bridge/sii902x.ko]
undefined!
Quite obviously the driver depends on
On 19 November 2018 at 13:14, Wolfram Sang wrote:
>
>> I noticed there were a minor comment from Yamada-san, however I
>> decided to pick this as is and leave further improvements to be made
>> on top.
>
> Can I vote for waiting until Niklas comes back from Plumbers and have a
> proper V2 applied
Hi Boris,
> From: Boris Brezillon
> Sent: 19 November 2018 12:51
> Subject: Re: [PATCH] drm/bridge: Fix 0-day build error
>
> Hi Fabrizio,
>
> The prefix should be "drm/bridge/sii902x:" and I'd prefer a short
> explanation of what is problematic in the subject rather than "Fix
> 0-day build
Hello Phil,
On Mon, Nov 19, 2018 at 12:53:46PM +, Phil Edworthy wrote:
> On 19 November 2018 10:46 Uwe Kleine-König wrote:
> > On Mon, Nov 19, 2018 at 10:41:42AM +, Phil Edworthy wrote:
> > > btw, do we need to add of_clk_get_by_name_optional()? I only added it
> > > as a counterpart to
Hi Uwe,
On 19 November 2018 10:46 Uwe Kleine-König wrote:
> On Mon, Nov 19, 2018 at 10:41:42AM +, Phil Edworthy wrote:
> > On 16 November 2018 16:11 Uwe Kleine-König wrote:
> > > On Fri, Nov 16, 2018 at 05:01:28PM +0100, Uwe Kleine-König wrote:
> > > > Other than that I think the patch is
Hi Fabrizio,
The prefix should be "drm/bridge/sii902x:" and I'd prefer a short
explanation of what is problematic in the subject rather than "Fix
0-day build error". Maybe something like
"drm/bridge/sii902x: Add missing dependency on I2C_MUX"
On Mon, 19 Nov 2018 12:44:23 +
Fabrizio Castro
kbuild test robot reports:
>> ERROR: "i2c_mux_add_adapter" [drivers/gpu/drm/bridge/sii902x.ko]
undefined!
>> ERROR: "i2c_mux_alloc" [drivers/gpu/drm/bridge/sii902x.ko]
undefined!
>> ERROR: "i2c_mux_del_adapters" [drivers/gpu/drm/bridge/sii902x.ko]
undefined!
Quite obviously the driver depends on
> I noticed there were a minor comment from Geert, however I decided to
> pick this as is and leave further improvements to be made on top.
Same here; could we wait for v2?
signature.asc
Description: PGP signature
> I noticed there were a minor comment from Yamada-san, however I
> decided to pick this as is and leave further improvements to be made
> on top.
Can I vote for waiting until Niklas comes back from Plumbers and have a
proper V2 applied instead? Makes backporting easier.
signature.asc
On Thu, Nov 15, 2018 at 11:16:23PM +0100, Fernando Ramos wrote:
> This patch unifies the naming of DRM functions for reference counting as
> requested on Documentation/gpu/todo.rst
>
> Signed-off-by: Fernando Ramos
> ---
> drivers/gpu/drm/arc/arcpgu_drv.c | 4 ++--
>
On 1 November 2018 at 00:05, Niklas Söderlund
wrote:
> From: Niklas Söderlund
>
> Hi,
>
> While looking at the Renesas BSP kernel I found patches which improves
> the state of the hardware at probe and after runtime resume.
>
> Patch 1/3 make sure the module clock is enabled after resuming
On 5 November 2018 at 22:39, Marek Vasut wrote:
> Whitelist R8A77990 E3 SoC in the SDHI driver. The SDHI core
> present in the SoC is an 8tap variant of the Gen3 SDHI core.
>
> Signed-off-by: Marek Vasut
> Cc: Geert Uytterhoeven
> Cc: Simon Horman
> Cc: Wolfram Sang
> Cc: Yoshihiro Shimoda
>
On 1 November 2018 at 00:13, Niklas Söderlund
wrote:
> From: Niklas Söderlund
>
> Hi,
>
> Recent datasheet updates have made it clear that some quirks are not SoC
> specific but SoC + ES version specific. Currently the quirks are
> selected using compatibility values but whit this new
On 31 October 2018 at 23:59, Niklas Söderlund
wrote:
> From: Niklas Söderlund
>
> The driver sets an incorrect clock and depends on the clock driver
> knowledge of this incorrect setting to still set a 200Mhz SDn clock.
> Instead of spreading the workaround between the two drivers the clock
>
On 1 November 2018 at 00:00, Niklas Söderlund
wrote:
> From: Masaharu Hayakawa
>
> The manual does not contain information that a wait is needed in the
> tuning process, this might be a leftover from early development.
> Removing the wait don't have any effect on operation so delete the wait
>
On 15.11.2018 23:16, Fernando Ramos wrote:
> This patch unifies the naming of DRM functions for reference counting as
> requested on Documentation/gpu/todo.rst
>
> Signed-off-by: Fernando Ramos
> ---
> drivers/gpu/drm/arc/arcpgu_drv.c | 4 ++--
>
Enable NXP pcf85263 real time clock for the iWave SBC based on RZ/G1C.
Signed-off-by: Biju Das
---
arch/arm/boot/dts/r8a77470-iwg23s-sbc.dts | 18 ++
1 file changed, 18 insertions(+)
diff --git a/arch/arm/boot/dts/r8a77470-iwg23s-sbc.dts
This patch adds binding for NXP pcf85263 real-time clock. pcf85263 rtc is
compatible with pcf85363 rtc except that pcf85363 has 64 bytes additional
RAM.
Signed-off-by: Biju Das
---
Documentation/devicetree/bindings/rtc/pcf85363.txt | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff
Add support for NXP pcf85263 real-time clock. pcf85263 rtc is compatible
with pcf85363,except that pcf85363 has additional 64 bytes of RAM.
1 byte of nvmem is supported and exposed in sysfs (# is the instance
number,starting with 0): /sys/bus/nvmem/devices/pcf85263-#/nvmem
Signed-off-by: Biju
The iWave RZ/G1C SBC supports RTC (NXP pcf85263). To increase hardware
support enable the driver in the shmobile_defconfig multiplatform
configuration.
Signed-off-by: Biju Das
---
arch/arm/configs/shmobile_defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git
This patch set aims to add support for NXP pcf85263 real-time clock.
pcf85263 rtc is compatible with pcf85363 rtc except that pcf85363 has
64 bytes additional RAM.
1 byte of nvmem is supported in pcf85263 and is exposed through sysfs.
The details of pcf85363 and pcf85263 can be found in the
On 19/11/2018 11:35, Biju Das wrote:
> Hi Daniel,
>
> Thanks for the feedback.
>
>> -Original Message-
>> From: Daniel Lezcano
>> Sent: 19 November 2018 10:26
>> To: Biju Das ; Rob Herring
>> ; Mark Rutland
>> Cc: Simon Horman ; Magnus Damm
>> ; linux-renesas-soc@vger.kernel.org;
>>
> > Same here, what was tested?
>
> I connected the CN10 to Peak CANFD, brought both interfaces up at
> 125kBd/250kBd for FD
> $ ip link set canX up type can bitrate 125000 dbitrate 25 fd on
>
> And ran on either side:
> $ cangen -m canX
> and
> $ candump -t d -dex canX
> This should give a
On Mon, Nov 19, 2018 at 11:41:39AM +0100, Simon Horman wrote:
> On Mon, Nov 19, 2018 at 12:18:07AM +0100, Wolfram Sang wrote:
> >
> > > + - "renesas,r8a77965-canfd" for R8A77965 (R-Car M3-N) compatible
> > > controller.
> >
> > Eeeks, the 'canfd' is a suffix here not a prefix :( Not your
On Mon, Nov 19, 2018 at 11:21:52AM +0100, Geert Uytterhoeven wrote:
> The PINMUX_IPSR_MSEL2() and PINMUX_IPSR_PHYS() macros are unused, and
> will conflict with generic macros that are to be added.
>
> Signed-off-by: Geert Uytterhoeven
> ---
> To be queued in sh-pfc-for-v4.21, before "pinctrl:
> Marek: I think you misunderstood Wolfram's question.
> He asked about the DT bindings, not about the driver.
Exactly.
> Wolfram: Eugenu's commit 4f145f14f6b98b5a ("dt-bindings: can:
> rcar_can: document r8a77965 support") is in next as of next-20181115 .
> However, it's not part of
Hi Geert,
On 11/13/18 2:15 PM, Geert Uytterhoeven wrote:
> Vfio-platform requires dedicated reset support, provided either by ACPI,
> or, on DT platforms, by a device-specific reset driver matching against
> the device's compatible value.
>
> On many SoCs, devices are connected to an SoC-internal
Hi Mark,
This Renesas R-Car D3 RPC SPI driver is based on Boris's
new spi-mem direct mapping read/write mode[1][2] and
test on R-Car D3 Draak board.
thanks for your review.
best regards,
Mason
[1] https://patchwork.kernel.org/patch/10670753/
[2] https://patchwork.kernel.org/patch/10670747/
Document the bindings used by the Renesas R-Car D3 RPC controller.
Signed-off-by: Mason Yang
---
.../devicetree/bindings/spi/spi-renesas-rpc.txt| 33 ++
1 file changed, 33 insertions(+)
create mode 100644 Documentation/devicetree/bindings/spi/spi-renesas-rpc.txt
diff
Add a driver for Renesas R-Car D3 RPC SPI controller driver.
Signed-off-by: Mason Yang
---
drivers/spi/Kconfig | 6 +
drivers/spi/Makefile | 1 +
drivers/spi/spi-renesas-rpc.c | 750 ++
3 files changed, 757 insertions(+)
create
Hello Phil,
On Mon, Nov 19, 2018 at 10:41:42AM +, Phil Edworthy wrote:
> On 16 November 2018 16:11 Uwe Kleine-König wrote:
> > On Fri, Nov 16, 2018 at 05:01:28PM +0100, Uwe Kleine-König wrote:
> > > Other than that I think the patch is fine
> >
> > Thinking again, I wonder why not just do:
>
On Mon, Nov 19, 2018 at 12:29:37AM +0100, Marek Vasut wrote:
> On 11/19/2018 12:10 AM, Wolfram Sang wrote:
> > On Sun, Nov 18, 2018 at 06:33:27PM +0100, Marek Vasut wrote:
> >> From: Takeshi Kihara
> >>
> >> This patch adds CAN FD controller nodes for the R8A77965 SoC.
> >>
> >> Signed-off-by:
On Sun, Nov 18, 2018 at 06:30:56PM +0100, Marek Vasut wrote:
> Document the support for rcar_can on R8A77990 SoC devices.
> Add R8A77990 to the list of SoCs which require the "assigned-clocks"
> and "assigned-clock-rates" properties.
>
> Signed-off-by: Marek Vasut
> Cc: Eugeniu Rosca
> Cc:
On Mon, Nov 19, 2018 at 12:18:07AM +0100, Wolfram Sang wrote:
>
> > + - "renesas,r8a77965-canfd" for R8A77965 (R-Car M3-N) compatible
> > controller.
>
> Eeeks, the 'canfd' is a suffix here not a prefix :( Not your issue,
> of course. But Simon, shall we fix that for all CANFD?
I think its
Hi Uwe,
On 16 November 2018 16:11 Uwe Kleine-König wrote:
> On Fri, Nov 16, 2018 at 05:01:28PM +0100, Uwe Kleine-König wrote:
> > Other than that I think the patch is fine
>
> Thinking again, I wonder why not just do:
>
> static inline struct clk *clk_get_optional(struct device *dev, const char
Hi Simon,
On Mon, Nov 19, 2018 at 11:14 AM Simon Horman wrote:
> On Thu, Nov 08, 2018 at 02:18:16PM +0100, Simon Horman wrote:
> > On Thu, Nov 08, 2018 at 01:25:45PM +0100, Geert Uytterhoeven wrote:
> > > On Thu, Nov 8, 2018 at 12:52 PM Simon Horman wrote:
> > > > On Thu, Nov 08, 2018 at
Hi Daniel,
Thanks for the feedback.
> -Original Message-
> From: Daniel Lezcano
> Sent: 19 November 2018 10:26
> To: Biju Das ; Rob Herring
> ; Mark Rutland
> Cc: Simon Horman ; Magnus Damm
> ; linux-renesas-soc@vger.kernel.org;
> devicet...@vger.kernel.org; Geert Uytterhoeven
> ;
On Tue, Nov 13, 2018 at 08:22:26PM +0100, Marek Vasut wrote:
> From: Takeshi Kihara
>
> This patch adds PCI express channel 0 device node to the R8A77990 SoC
> and enables PCIEC0 PCI express controller on the Ebisu board.
>
> Signed-off-by: Takeshi Kihara
> Signed-off-by: Marek Vasut
> Cc:
Hi Daniel,
On Mon, Nov 19, 2018 at 11:26 AM Daniel Lezcano
wrote:
> On 26/10/2018 10:25, Biju Das wrote:
> > This patch adds CMT{0|1|2|3} device nodes for r8a7796 SoC.
> >
> > Signed-off-by: Biju Das
> > ---
> > This patch is tested against renesas-dev
> >
> > I have executed on
On 26/10/2018 10:25, Biju Das wrote:
> This patch adds CMT{0|1|2|3} device nodes for r8a7796 SoC.
>
> Signed-off-by: Biju Das
> ---
> This patch is tested against renesas-dev
>
> I have executed on inconsistency-check, nanosleep and clocksource_switch
> selftests on this arm64 SoC. The
The PINMUX_IPSR_MSEL2() and PINMUX_IPSR_PHYS() macros are unused, and
will conflict with generic macros that are to be added.
Signed-off-by: Geert Uytterhoeven
---
To be queued in sh-pfc-for-v4.21, before "pinctrl: sh-pfc: Add physical
pin multiplexing helper macros".
On Fri, Nov 09, 2018 at 10:47:07AM +0100, Simon Horman wrote:
> On Fri, Nov 09, 2018 at 12:02:01AM +, Kuninori Morimoto wrote:
> >
> > Hi Simon
> >
> > > > These patches adds sound support for KingFisher.
> > > > We can enable it on top of v4.20-rc1, but, it is not stable.
> > > > We need
On Thu, Nov 08, 2018 at 02:18:16PM +0100, Simon Horman wrote:
> On Thu, Nov 08, 2018 at 01:25:45PM +0100, Geert Uytterhoeven wrote:
> > Hi Simon,
> >
> > On Thu, Nov 8, 2018 at 12:52 PM Simon Horman wrote:
> > > On Thu, Nov 08, 2018 at 11:27:31AM +0100, Geert Uytterhoeven wrote:
> > > > On Thu,
Hi Marek,
On Mon, Nov 19, 2018 at 10:06 AM Geert Uytterhoeven
wrote:
> On Sun, Nov 18, 2018 at 6:29 PM Marek Vasut wrote:
> > From: Takeshi Kihara
> >
> > This patch adds CAN FD{0,1} pins, groups and functions to the R8A77990
> > SoC.
> >
> > Signed-off-by: Takeshi Kihara
> > Signed-off-by:
Hi Wolfram,
On Mon, Nov 19, 2018 at 9:43 AM Geert Uytterhoeven wrote:
> On Mon, Nov 19, 2018 at 12:18 AM Wolfram Sang wrote:
> > > + - "renesas,r8a77965-canfd" for R8A77965 (R-Car M3-N) compatible
> > > controller.
> >
> > Eeeks, the 'canfd' is a suffix here not a prefix :( Not your issue,
>
Hi Rob,
On 17 November 2018 14:33 Rob Herring wrote:
> On Tue, Nov 13, 2018 at 01:09:09PM +, Phil Edworthy wrote:
> > Add device binding documentation for the Renesas RZ/N1 GPIO interrupt
> > multiplexer.
> >
> > Signed-off-by: Phil Edworthy
> > ---
> > v3:
> > - Use 'interrupt-map' DT
Hi Marek, Wolfram,
On Mon, Nov 19, 2018 at 12:46 AM Marek Vasut wrote:
> On 11/19/2018 12:14 AM, Wolfram Sang wrote:
> > On Sun, Nov 18, 2018 at 06:30:56PM +0100, Marek Vasut wrote:
> >> Document the support for rcar_can on R8A77990 SoC devices.
> >> Add R8A77990 to the list of SoCs which
On 26/10/2018 10:25, Biju Das wrote:
> This patch adds CMT{0|1|2|3} device nodes for r8a7796 SoC.
>
> Signed-off-by: Biju Das
> ---
> This patch is tested against renesas-dev
>
> I have executed on inconsistency-check, nanosleep and clocksource_switch
> selftests on this arm64 SoC. The
On Sun, Nov 18, 2018 at 6:29 PM Marek Vasut wrote:
> From: Takeshi Kihara
>
> This patch adds CAN FD{0,1} pins, groups and functions to the R8A77990
> SoC.
>
> Signed-off-by: Takeshi Kihara
> Signed-off-by: Marek Vasut
Reviewed-by: Geert Uytterhoeven
i.e. will queue in sh-pfc-for-v4.21.
On Sun, Nov 18, 2018 at 6:29 PM Marek Vasut wrote:
> From: Takeshi Kihara
>
> This patch adds CAN{0,1} pins, groups and functions to the R8A77990 SoC.
>
> Signed-off-by: Takeshi Kihara
> Signed-off-by: Marek Vasut
Reviewed-by: Geert Uytterhoeven
i.e. will queue in sh-pfc-for-v4.21.
On Sun, Nov 18, 2018 at 6:29 PM Marek Vasut wrote:
> From: Takeshi Kihara
>
> This patch adds CAN FD{0,1} pins, groups and functions to the R8A77965
> SoC.
>
> Signed-off-by: Takeshi Kihara
> Signed-off-by: Marek Vasut
Reviewed-by: Geert Uytterhoeven
i.e. will queue in sh-pfc-for-v4.21.
On Sun, Nov 18, 2018 at 6:29 PM Marek Vasut wrote:
> From: Takeshi Kihara
>
> This patch adds CAN{0,1} pins, groups and functions to the R8A77965 SoC.
>
> Signed-off-by: Takeshi Kihara
> Signed-off-by: Marek Vasut
Reviewed-by: Geert Uytterhoeven
i.e. will queue in sh-pfc-for-v4.21.
Hi Marek,
On Mon, Nov 19, 2018 at 12:46 AM Marek Vasut wrote:
> On 11/19/2018 12:02 AM, Wolfram Sang wrote:
> > On Sun, Nov 18, 2018 at 06:33:26PM +0100, Marek Vasut wrote:
> >> From: Takeshi Kihara
> >>
> >> This patch adds CAN{0,1} controller nodes for the R8A77965 SoC.
> >>
> >> Based on
Hi Chris-san,
> From: Chris Brandt, Sent: Thursday, November 15, 2018 9:34 PM
>
> Hi Shimodaさん
>
> > From: Yoshihiro Shimoda
> > Sent: Thursday, November 15, 2018 4:20 AM
>
> > > Host does NOT work:
> > > //else
> > > // /* No otg, so default to host mode */
> > > //
Hi Wolfram,
On Mon, Nov 19, 2018 at 12:18 AM Wolfram Sang wrote:
> > + - "renesas,r8a77965-canfd" for R8A77965 (R-Car M3-N) compatible
> > controller.
>
> Eeeks, the 'canfd' is a suffix here not a prefix :( Not your issue,
> of course. But Simon, shall we fix that for all CANFD?
Unfortunately
Hi All,
Gentle reminder, Is this patch looks ok to you? Or any changes needed.
Regards,
Biju
> -Original Message-
> From: Biju Das
> Sent: 26 October 2018 09:25
> To: Rob Herring ; Mark Rutland
>
> Cc: Biju Das ; Simon Horman
> ; Magnus Damm ;
> linux-renesas-soc@vger.kernel.org;
Hi Rob,
Thanks for the feedback.
> Subject: Re: [PATCH 1/7] dt-bindings: phy: rcar-gen2: Add r8a77470 support
>
> On Thu, Oct 25, 2018 at 02:56:53PM +0100, Biju Das wrote:
> > Add USB PHY support for r8a77470 SoC. Renesas RZ/G1C (R8A77470) USB
> > PHY is similar to the R-Car Gen2 family, but has
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