[+cc Bart, Tejun]
On Tue, Nov 06, 2018 at 12:25:00AM +0100, Marek Vasut wrote:
> From: Tho Vu
>
> This patch fixes deadlock warning in removing/rescanning through sysfs
> when CONFIG_PROVE_LOCKING is enabled.
>
> The issue can be reproduced by these steps:
> 1. Enable CONFIG_PROVE_LOCKING via
Hi Sergei,
On Tue, Nov 27, 2018 at 6:45 PM Sergei Shtylyov
wrote:
> On 11/23/2018 03:59 PM, Geert Uytterhoeven wrote:
> >> Add the RPCSRC internal clock on R-Car V3H (R8A77980) -- it's controlled
> >> by the RPCCKCR.DIV[4:3] on all the R-Car gen3 SoCs except V3M (R8A77970)
> >> but the encoding
On 11/23/2018 03:59 PM, Geert Uytterhoeven wrote:
>> Add the RPCSRC internal clock on R-Car V3H (R8A77980) -- it's controlled
>> by the RPCCKCR.DIV[4:3] on all the R-Car gen3 SoCs except V3M (R8A77970)
>> but the encoding of this field is different between SoCs.
>
> Given the tables and encoding
On 11/23/2018 03:55 PM, Geert Uytterhoeven wrote:
>> Add the RPC clock for the R-Car gen3 SoCs -- this clock is controlled by
>> the RPCCKCR register on all the R-Car gen3 SoCs except V3M (R8A77970).
>>
>> Signed-off-by: Sergei Shtylyov
>
> Thanks for your patch!
>
>> ---
Hello Sergei,
Thanks for the feedback.
> -Original Message-
> From: Sergei Shtylyov
> Sent: 27 November 2018 14:17
> To: Biju Das ; Rob Herring
> ; Mark Rutland
> Cc: Simon Horman ; Magnus Damm
> ; linux-renesas-soc@vger.kernel.org;
> devicet...@vger.kernel.org; Geert Uytterhoeven
> ;
Hello!
On 11/27/2018 02:56 PM, Biju Das wrote:
> Enable the SDHI0 controller on iWave RZ/G1N Qseven System On Module.
Why your subject has SDHI10?
> Signed-off-by: Biju Das
[...]
MBR, Sergei
On Wed, Nov 21, 2018 at 01:09:27PM +0100, Simon Horman wrote:
> Document support for the IIC code for the r8a77990 (R-Car E3).
>
> It is not considered compatible with existing fallback bindings
> due to the documented absence of automatic transmission registers.
>
> Signed-off-by: Simon Horman
On Wed, Nov 21, 2018 at 01:09:28PM +0100, Simon Horman wrote:
> Add support for the IIC code for the r8a77990 (R-Car E3).
>
> It is not considered compatible with existing fallback bindings
> due to the documented absence of automatic transmission registers.
>
> These registers are currently not
Add a device node for the PCIe controller on the Renesas
RZ/G1N (r8a7744) SoC.
Signed-off-by: Biju Das
---
arch/arm/boot/dts/r8a7744.dtsi | 28
1 file changed, 28 insertions(+)
diff --git a/arch/arm/boot/dts/r8a7744.dtsi b/arch/arm/boot/dts/r8a7744.dtsi
index
Add a device node for the Watchdog Timer (RWDT) controller on the Renesas
RZ/G1N (r8a7744) SoC.
Signed-off-by: Biju Das
---
arch/arm/boot/dts/r8a7744.dtsi | 10 ++
1 file changed, 10 insertions(+)
diff --git a/arch/arm/boot/dts/r8a7744.dtsi b/arch/arm/boot/dts/r8a7744.dtsi
index
Add a device node for the xhci controller on the Renesas
RZ/G1N (r8a7744) SoC.
Signed-off-by: Biju Das
---
arch/arm/boot/dts/r8a7744.dtsi | 20
1 file changed, 20 insertions(+)
diff --git a/arch/arm/boot/dts/r8a7744.dtsi b/arch/arm/boot/dts/r8a7744.dtsi
index
Describe the IRQC interrupt controller in the r8a7744 device tree.
Signed-off-by: Biju Das
---
arch/arm/boot/dts/r8a7744.dtsi | 20
1 file changed, 20 insertions(+)
diff --git a/arch/arm/boot/dts/r8a7744.dtsi b/arch/arm/boot/dts/r8a7744.dtsi
index e6662d9..b26315d 100644
Add the DT nodes needed by MSIOF[012] interfaces to the SoC dtsi.
Signed-off-by: Biju Das
---
arch/arm/boot/dts/r8a7744.dtsi | 48 ++
1 file changed, 48 insertions(+)
diff --git a/arch/arm/boot/dts/r8a7744.dtsi b/arch/arm/boot/dts/r8a7744.dtsi
index
This patch instantiates the thermal sensor module with thermal-zone
support.
Signed-off-by: Biju Das
---
arch/arm/boot/dts/r8a7744.dtsi | 31 +++
1 file changed, 31 insertions(+)
diff --git a/arch/arm/boot/dts/r8a7744.dtsi b/arch/arm/boot/dts/r8a7744.dtsi
index
Add support for the SPI NOR device used to boot up the system
to the iWave RZ/G1N Qseven System On Module DT.
Signed-off-by: Biju Das
---
arch/arm/boot/dts/r8a7744-iwg20m.dtsi | 26 ++
1 file changed, 26 insertions(+)
diff --git a/arch/arm/boot/dts/r8a7744-iwg20m.dtsi
Add the DT node for the QSPI interface to the SoC dtsi.
Signed-off-by: Biju Das
---
arch/arm/boot/dts/r8a7744.dtsi | 16
1 file changed, 16 insertions(+)
diff --git a/arch/arm/boot/dts/r8a7744.dtsi b/arch/arm/boot/dts/r8a7744.dtsi
index 39f309c..abe0ee3 100644
---
Add CMT[01] support to SoC DT.
Signed-off-by: Biju Das
---
arch/arm/boot/dts/r8a7744.dtsi | 32
1 file changed, 32 insertions(+)
diff --git a/arch/arm/boot/dts/r8a7744.dtsi b/arch/arm/boot/dts/r8a7744.dtsi
index 0eaf8a1..39f309c 100644
---
The iWave RZ/G1N board is almost identical to RZ/G1M. cmt and rwdt modules
are SoC specific and should be part of board dts rather than SoM dtsi. By
moving these nodes to the common dtsi it allows cmt and rwdt to be enabled
on both of these boards with less lines of code.
Signed-off-by: Biju Das
Add the definitions for can0 and can1 to the r8a7744 SoC dtsi.
Signed-off-by: Biju Das
---
arch/arm/boot/dts/r8a7744.dtsi | 22 --
1 file changed, 20 insertions(+), 2 deletions(-)
diff --git a/arch/arm/boot/dts/r8a7744.dtsi b/arch/arm/boot/dts/r8a7744.dtsi
index
Add SDHI nodes to the DT of the r8a7744 SoC.
Signed-off-by: Biju Das
---
arch/arm/boot/dts/r8a7744.dtsi | 39 +--
1 file changed, 37 insertions(+), 2 deletions(-)
diff --git a/arch/arm/boot/dts/r8a7744.dtsi b/arch/arm/boot/dts/r8a7744.dtsi
index
Enable the SDHI0 controller on iWave RZ/G1N Qseven System On Module.
Signed-off-by: Biju Das
---
arch/arm/boot/dts/r8a7744-iwg20m.dtsi | 16
1 file changed, 16 insertions(+)
diff --git a/arch/arm/boot/dts/r8a7744-iwg20m.dtsi
b/arch/arm/boot/dts/r8a7744-iwg20m.dtsi
index
This patch series aims to add support for some more interfaces to
RZ/G1N SoC (SCIF/HSCIF, I2C, IIC, SDHI, MMC, USBHost, USB Function,
rwdt, Audio, Display, CAN and CMT ).
This patch series tested against renesas-dev.
it depends on the the below patch series.
Add the I2C[0-5] and IIC[0,1,3] devices nodes to the R8A7744 device tree.
Signed-off-by: Biju Das
---
arch/arm/boot/dts/r8a7744.dtsi | 141 -
1 file changed, 139 insertions(+), 2 deletions(-)
diff --git a/arch/arm/boot/dts/r8a7744.dtsi
Describe [H]SCIF{|A|B} ports in the R8A7744 device tree.
Signed-off-by: Biju Das
---
arch/arm/boot/dts/r8a7744.dtsi | 257 -
1 file changed, 254 insertions(+), 3 deletions(-)
diff --git a/arch/arm/boot/dts/r8a7744.dtsi b/arch/arm/boot/dts/r8a7744.dtsi
Add du node to r8a7744 SoC DT. Boards that want to enable the DU
need to specify the output topology.
Signed-off-by: Biju Das
---
arch/arm/boot/dts/r8a7744.dtsi | 10 +-
1 file changed, 9 insertions(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/r8a7744.dtsi
Add sound support for the RZ/G1N SoC (a.k.a. R8A7744).
This work is based on similar work done on the R8A7743 SoC.
Signed-off-by: Biju Das
---
arch/arm/boot/dts/r8a7744.dtsi | 243 +++--
1 file changed, 235 insertions(+), 8 deletions(-)
diff --git
Describe internal PCI bridge devices, USB phy device and
link PCI USB devices to USB phy.
Signed-off-by: Biju Das
---
arch/arm/boot/dts/r8a7744.dtsi | 77 +++---
1 file changed, 72 insertions(+), 5 deletions(-)
diff --git a/arch/arm/boot/dts/r8a7744.dtsi
This patch adds support for the camera daughter board which is
connected to iWave's RZ/G1N Qseven carrier board.
Signed-off-by: Biju Das
---
arch/arm/boot/dts/Makefile | 1 +
arch/arm/boot/dts/r8a7744-iwg20d-q7-dbcm-ca.dts | 17 +
2 files changed, 18
Add MMC node to the DT of the r8a7744 SoC.
Signed-off-by: Biju Das
---
arch/arm/boot/dts/r8a7744.dtsi | 16
1 file changed, 16 insertions(+)
diff --git a/arch/arm/boot/dts/r8a7744.dtsi b/arch/arm/boot/dts/r8a7744.dtsi
index 660747d..7a0ccae 100644
---
Add eMMC support for iWave RZ/G1N Qseven System On Module.
Signed-off-by: Biju Das
---
arch/arm/boot/dts/r8a7744-iwg20m.dtsi | 17 +
1 file changed, 17 insertions(+)
diff --git a/arch/arm/boot/dts/r8a7744-iwg20m.dtsi
b/arch/arm/boot/dts/r8a7744-iwg20m.dtsi
index
Add usb dmac and hsusb device nodes on RZ/G1N SoC dtsi.
Signed-off-by: Biju Das
---
arch/arm/boot/dts/r8a7744.dtsi | 42 +-
1 file changed, 41 insertions(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/r8a7744.dtsi b/arch/arm/boot/dts/r8a7744.dtsi
index
On Tue, Nov 13, 2018 at 12:15:42PM +0100, Wolfram Sang wrote:
> From: Wolfram Sang
>
> We should check the bus state before reinitializing the IP core.
> Otherwise, the internal bus busy state which also tracks multi-master
> activity is lost.
>
> Credits go to the Renesas BSP team for
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