eup-source" in your DTS, e.g. gpio-keys.
Serial should work too, echo "enabled" to the corresponding wakeup
file in /sys first.
In case of issues, try "echo 0 > /sys/module/printk/parameters/console_suspend".
Good luck!
Gr{oetje,eeting}s,
Ge
've queued it up in topic/r8a7796-ipmmu-v1 at
https://git.kernel.org/cgit/linux/kernel/git/geert/renesas-drivers.git, and
will include it in next renesas-drivers release.
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- ge...@linux-m6
Hi Daniel,
On Wed, Jun 8, 2016 at 4:10 PM, Daniel Lezcano
<daniel.lezc...@linaro.org> wrote:
> On 06/07/2016 11:54 AM, Geert Uytterhoeven wrote:
>
> [ ... ]
>
>> in clockevents/clockevents/next breaks the boot on e.g. r8a7791/koelsch
>> (arm32) and r8a7795/s
<
> + R8A7792_CLK_HSCIF1 R8A7792_CLK_HSCIF0
> + R8A7792_CLK_SCIF3 R8A7792_CLK_SCIF2
> + R8A7792_CLK_SCIF1 R8A7792_CLK_SCIF0
> + >;
> + cl
is is a missing/incorrect drive strength configuration?
The pfc-r8a7795 does have support for drive strength, but only for pins that
also have GPIO capabilities. (At least some of) the RAVB pins don't seem
to be handled (e.g. DRVCTRL2).
Gr{oetje,eeting}s,
Geert
--
Geert Uytte
Hi Dirk,
On Thu, Jun 9, 2016 at 10:31 AM, Dirk Behme <dirk.be...@de.bosch.com> wrote:
> On 07.06.2016 10:17, Geert Uytterhoeven wrote:
>> On Tue, Jun 7, 2016 at 9:53 AM, Dirk Behme <dirk.be...@de.bosch.com>
>> wrote:
>>>
>>> I think I just want t
Hi Dirk,
On Thu, Jun 9, 2016 at 10:58 AM, Dirk Behme <dirk.be...@de.bosch.com> wrote:
> On 09.06.2016 10:22, Geert Uytterhoeven wrote:
>> On Thu, Jun 9, 2016 at 8:56 AM, Dirk Behme <dirk.be...@de.bosch.com>
>> wrote:
>>> with the R-Car3, the pinmux/drvctrl is
On Wed, Jun 8, 2016 at 11:04 PM, Sergei Shtylyov
<sergei.shtyl...@cogentembedded.com> wrote:
> Add macros usable by the device tree sources to reference the R8A7792
> clocks by index.
>
> Signed-off-by: Sergei Shtylyov <sergei.shtyl...@cogentembedded.com>
Reviewed-by: G
r8a7792_ca15_scu). But unfortunately that depends on the SYSC node always
be present in DT.
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- ge...@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
rectly?
i could take it through sh-pfc-for-v4.8.
I expect more pfc stuff to follow soon anyway.
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- ge...@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when
ng a completely different CPG block.
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- ge...@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
loop, resolution 100ns
Calibrating delay loop (skipped), value calculated using timer
frequency.. 20.00 BogoMIPS (lpj=10)
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- ge...@linux-m68k.org
In personal conversations with
n PORT_GP_CFG_12() with SH_PFC_PIN_CFG_IO_VOLTAGE,
and PORT_GP_CFG_4() without?
> + PORT_GP_CFG_18(4, fn, sfx, SH_PFC_PIN_CFG_DRIVE_STRENGTH |
> SH_PFC_PIN_CFG_IO_VOLTAGE), \
Apart from that:
Reviewed-by: Geert Uytterhoeven <geert+rene...@glider.be>
Gr{oetje,eeting}s,
...@sang-engineering.com>
Reviewed-by: Geert Uytterhoeven <geert+rene...@glider.be>
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- ge...@linux-m68k.org
In personal conversations with technical people, I call myself a
Hi Wolfram,
On Mon, Jun 6, 2016 at 1:03 PM, Wolfram Sang <w...@the-dreams.de> wrote:
> On Mon, Jun 06, 2016 at 09:23:35AM +0200, Geert Uytterhoeven wrote:
>> On Mon, Jun 6, 2016 at 8:50 AM, Wolfram Sang <w...@the-dreams.de> wrote:
>> > From: Wolfram Sang <
On Thu, Jun 2, 2016 at 11:24 PM, Laurent Pinchart
<laurent.pinch...@ideasonboard.com> wrote:
> On Wednesday 01 Jun 2016 15:27:59 Rob Herring wrote:
>> On Wed, Jun 1, 2016 at 2:50 PM, Geert Uytterhoeven wrote:
>> > When moving functionality from C code to DT, we're regularl
ching code
Thanks for your series!
For your convenience, I've queued it up in topic/r8a7795-ipmmu-v2 at
https://git.kernel.org/cgit/linux/kernel/git/geert/renesas-drivers.git, and
will include it in next renesas-drivers release.
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- The
On Mon, Jun 6, 2016 at 8:50 AM, Wolfram Sang <w...@the-dreams.de> wrote:
> From: Wolfram Sang <wsa+rene...@sang-engineering.com>
>
> Signed-off-by: Wolfram Sang <wsa+rene...@sang-engineering.com>
Reviewed-by: Geert Uytterhoeven <geert+rene...
git/kishon/linux-phy.git#next
-
git://git.kernel.org/pub/scm/linux/kernel/git/evalenti/linux-soc-thermal.git#next
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- ge...@linux-m68k.org
In personal con
fig on
renesas-drivers-2016-05-31-v4.7-rc1, which contained the previous version of
your patch set.
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- ge...@linux-m68k.org
In personal conversations with technical people, I call mys
8a7796_iommu_of, "renesas,ipmmu-r8a7796",
>> + ipmmu_vmsa_iommu_of_setup);
>
> How about a Gen3 generic compatible string in addition to the SoC-specific
> ones ?
Do we want to specify the number of utlbs here?
Does it differ between r8a7795, r8a7796, and future memb
lock-div = <24>;
> + clock-mult = <1>;
> + };
> + cp_clk: cp {
> + compatible = "fixed-factor-clock";
> + clocks = <_clocks R8A7792_CLK_PLL1>;
> + #clock-cells = <0>;
> +
Hi Dirk,
On Mon, Jun 6, 2016 at 2:03 PM, Dirk Behme <dirk.be...@de.bosch.com> wrote:
> On 30.05.2016 18:36, Dirk Behme wrote:
>> On 30.05.2016 18:28, Geert Uytterhoeven wrote:
>>> Add all R-Car M3-W Clock Pulse Generator Core Clock Outputs, as listed
>>> in Table
Name the Pin Function Controller subnode for SCIFA4 after its device
name, instead of after the serial port alias.
This avoids conflicts when adding support for more serial ports later,
either here or in a DT overlay.
Signed-off-by: Geert Uytterhoeven <geert+rene...@glider.be>
---
arch/ar
Name the Pin Function Controller subnode for QSPI after its device name,
instead of after the spi interface alias.
This avoids conflicts when enabl support for more spi interfaces later,
either here or in a DT overlay.
Signed-off-by: Geert Uytterhoeven <geert+rene...@glider.be>
---
ar
ot; for fsia_pins on SH-Mobile,
If you think these should be changed too, please let me know.
This series is against renesas-devel-20160606-v4.7-rc2.
Thanks!
Geert Uytterhoeven (19):
ARM: dts: ape6evm: Name serial port pfc subnode after device name
ARM: dts: ape6evm: Name mmc pfc subnode a
Name the Pin Function Controller subnode for SCIF0 after its device
name, instead of after the serial port alias.
This avoids conflicts when enabling support for more serial ports later,
either here or in a DT overlay.
Signed-off-by: Geert Uytterhoeven <geert+rene...@glider.be>
---
ar
Name the Pin Function Controller subnode for SCIFA0 after its device
name, instead of after the serial port alias.
This avoids conflicts when enabling support for more serial ports later,
either here or in a DT overlay.
Signed-off-by: Geert Uytterhoeven <geert+rene...@glider.be>
---
ar
Name the Pin Function Controller subnode for QSPI after its device name,
instead of after the spi interface alias.
This avoids conflicts when enabling support for more spi interfaces
later, either here or in a DT overlay.
Signed-off-by: Geert Uytterhoeven <geert+rene...@glider.be>
---
ar
Name the Pin Function Controller subnode for QSPI after its device name,
instead of after the spi interface alias.
This avoids conflicts when enabling support for more spi interfaces
later, either here or in a DT overlay.
Signed-off-by: Geert Uytterhoeven <geert+rene...@glider.be>
---
ar
Name the Pin Function Controller subnode for VIN1 after its device name,
instead of using the generic and indexless "vin".
This avoids conflicts when enabling support for more video inputs later,
either here or in a DT overlay.
Signed-off-by: Geert Uytterhoeven <geert+rene
Name the Pin Function Controller subnodes for SCIF0 and SCIF1 after
their device names, instead of after the serial port aliases.
This avoids conflicts when enabling support for more serial ports later,
either here or in a DT overlay.
Signed-off-by: Geert Uytterhoeven <geert+rene...@glider
Name the Pin Function Controller subnodes for QSPI and MSIOF1 after
their device names, instead of after the spi interface aliases.
This avoids conflicts when enabling support for more spi interfaces
later, either here or in a DT overlay.
Signed-off-by: Geert Uytterhoeven <geert+r
Name the Pin Function Controller subnode for SCIF0 after its device
name, instead of after the serial port alias.
This avoids conflicts when enabling support for more serial ports later,
either here or in a DT overlay.
Signed-off-by: Geert Uytterhoeven <geert+rene...@glider.be>
---
ar
-off-by: Geert Uytterhoeven <geert+rene...@glider.be>
---
arch/arm/boot/dts/r8a7794-alt.dts | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/r8a7794-alt.dts
b/arch/arm/boot/dts/r8a7794-alt.dts
index 383ad791f1db3151..1335664b2f886a17 100644
--- a/arch/ar
-off-by: Geert Uytterhoeven <geert+rene...@glider.be>
---
arch/arm/boot/dts/r8a7794-silk.dts | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/r8a7794-silk.dts
b/arch/arm/boot/dts/r8a7794-silk.dts
index b8c7a63c5ec456bc..7e88f6fe55cdcc02 100644
--- a/arch/ar
Name the Pin Function Controller subnode for MMC0 after its device name,
instead of using the generic and indexless "mmc".
This avoids conflicts when enabling support for more MMC interfaces
later, either here or in a DT overlay.
Signed-off-by: Geert Uytterhoeven <geert+rene
Name the Pin Function Controller subnode for SCIFA1 after its device
name, instead of after the serial port alias.
This avoids conflicts when enabling support for more serial ports later,
either here or in a DT overlay.
Signed-off-by: Geert Uytterhoeven <geert+rene...@glider.be>
---
ar
Name the Pin Function Controller subnode for QSPI after its device name,
instead of after the spi interface alias.
This avoids conflicts when enabl support for more spi interfaces later,
either here or in a DT overlay.
Signed-off-by: Geert Uytterhoeven <geert+rene...@glider.be>
---
ar
Name the Pin Function Controller subnodes for QSPI and MSIOF0 after
their device names, instead of after the spi interface aliases.
This avoids conflicts when enabling support for more spi interfaces
later, either here or in a DT overlay.
Signed-off-by: Geert Uytterhoeven <geert+r
overlay.
Signed-off-by: Geert Uytterhoeven <geert+rene...@glider.be>
---
arch/arm/boot/dts/r8a7779-marzen.dts | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm/boot/dts/r8a7779-marzen.dts
b/arch/arm/boot/dts/r8a7779-marzen.dts
index cec79a6347c036f7..013e6f510b
Name the Pin Function Controller subnodes for SCIF0 and SCIF1 after
their device names, instead of after the serial port aliases.
This avoids conflicts when enabling support for more serial ports later,
either here or in a DT overlay.
Signed-off-by: Geert Uytterhoeven <geert+rene...@glider
A7795_PD_A3VP>;
>
> This needs to be documented above too, not just the example.
Why? Power domains are an optional feature, whose presence depends
on the platform, not on the device.
Hence "power-domains" properties may appear in any device node.
Having to document them in every s
With C=1:
drivers/pinctrl/sh-pfc/pfc-sh7757.c:1613:9: warning: Initializer entry
defined twice
drivers/pinctrl/sh-pfc/pfc-sh7757.c:1628:9: also defined here
Remove the duplicate initializer to fix this.
Signed-off-by: Geert Uytterhoeven <geert+rene...@glider.be>
---
Hi,
This series contains various cleanups for the Renesas Pin Function
Controller driver subsystem.
This has been tested on r8a7791/koelsch, and compile-tested for other
ARM and SH platforms.
I plan to queue this in sh-pfc-for-v4.8.
Thanks for your comments!
Geert Uytterhoeven (3
on SH.
The sh_pfc_soc_info structure is defined in sh_pfc.h, while all forward
declarations for the SoC-specific versions are in core.h.
Move the forward declarations from core.h to sh_pfc.h to fix this.
Reported-by: Ben Dooks <ben.do...@codethink.co.uk>
Signed-off-by: Geert Uytterhoeven
This allows to remove the .remove() callback, and all functions and data
it needed for its own bookkeeping.
Suggested-by: Laxman Dewangan <ldewan...@nvidia.com>
Signed-off-by: Geert Uytterhoeven <geert+rene...@glider.be>
---
drivers/pinctrl/sh-pfc/core.c | 10 --
drivers/pi
to the various SoC-specific
callbacks, and used there.
Hence move its definition from core.h to sh_pfc.h, and remove the
inclusion of core.h from all SoC-specific files.
Signed-off-by: Geert Uytterhoeven <geert+rene...@glider.be>
---
drivers/pinctrl/sh-pfc/core.h
For consistency with a57_0/a57_1 cpu nodes, and all other nodes.
Signed-off-by: Geert Uytterhoeven <geert+rene...@glider.be>
---
arch/arm64/boot/dts/renesas/r8a7795.dtsi | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/r8a7795.dtsi
b/arch/arm64/boot/dts/r
;I was going to look at it yesterday but (wrongly) thought it somehow
> cured itself... I'll look at it now.
The RCAN parent is the second clock in the CPG node's "clocks" property,
which you didn't provide.
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- Th
ches in sh-pfc-for-v4.8, and will send a pull
request after next renesas-drivers release.
BTW, are these a hard dependency for patch 3, or will the missing power
source control just be ignored?
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32
Hi Kieran,
On Thu, Jun 9, 2016 at 6:12 PM, Kieran Bingham <kie...@bingham.xyz> wrote:
> Reviewed-by: Geert Uytterhoeven <geert+rene...@glider.be>
> Reviewed-by: Laurent Pinchart <laurent.pinch...@ideasonboard.com>
> Signed-off-by: Kieran Bingham <kie...@bingham.xyz
On Thu, Jun 9, 2016 at 6:56 PM, Kieran Bingham <kie...@ksquared.org.uk> wrote:
> Provide nodes for the FCP devices dedicated to the FDP device channels.
>
> Signed-off-by: Kieran Bingham <kie...@bingham.xyz>
Reviewed-by: Geert Uytterhoeven <geert+rene...@glide
According to the latest information, the parent clock of the LVDS module
clock is the S0D4 clock, not the S2D1 clock.
Note that this change has no influence on actual operation, as the
rcar-du LVDS encoder driver doesn't use the parent clock's rate.
Signed-off-by: Geert Uytterhoeven <geert+r
(I know this is really
> nitpicking)
To align the two paragraphs and lists.
> Apart from that, it's just a bit of a shame we can't have generic compatible
> strings, but that would require additional DT properties to describe the reset
> controller features, and I assume that's not a path
t);
>
> Given that rcar_rst_init() is only used as a support function for
> rcar_rst_read_mode_pins(), how about removing the initcall ?
Thanks, good idea!
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- ge...@linux-m68k.o
uot;mode" is a too generic word for a public API.
It's used a several contexts inside the RST module (secure mode, 64-bit
addressing mode, free-running mode, step-up mode).
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- ge
gt;
> Signed-off-by: Magnus Damm <damm+rene...@opensource.se>
Thanks for your series!
For your convenience, I've queued it up in topic/ipmmu-multi-arch-v3 at
https://git.kernel.org/cgit/linux/kernel/git/geert/renesas-drivers.git, and
will include it in next renesas-drivers release.
Improve documentation for the SCIFA/SCIFB Serial Port Control and Data
Registers:
- State clearly that the RTS and CTS lines are active-low,
- Document the bits related to the serial port's SCK, RXD, and TXD
pins.
Signed-off-by: Geert Uytterhoeven <geert+rene...@glider.be>
Re
when hardware-assisted flow control
is enabled, and userspace enables CRTSCTS.
The receive path is still broken, as RTS is never asserted.
Signed-off-by: Geert Uytterhoeven <geert+rene...@glider.be>
Reviewed-by: Peter Hurley <pe...@hurleysoftware.com>
---
v3:
- Add Reviewed-by,
v2:
Replace open-coded variants of sci_getreg() by function calls, and drop
intermediate variables where appropriate.
Signed-off-by: Geert Uytterhoeven <geert+rene...@glider.be>
Reviewed-by: Peter Hurley <pe...@hurleysoftware.com>
---
v3:
- Add Reviewed-by,
v2:
- New.
---
drivers/t
Improve documentation for the (H)SCIF Serial Port Register:
- Make it clear the RTS and CTS lines are active-low,
- Document the bits related to the serial port's clock pin.
Signed-off-by: Geert Uytterhoeven <geert+rene...@glider.be>
Reviewed-by: Peter Hurley <pe...@hurleysoftware.co
ays
branch of
https://git.kernel.org/cgit/linux/kernel/git/geert/renesas-drivers.git.
Regression testing on platforms without DT and/or GPIOLIB support
(SuperH) would be appreciated.
Compile-tested on ecovec24_defconfig(GPIOLIB=y) and se7780_defconfig
(GPIOLIB=n).
Please apply, thanks!
Geert Uytter
: if the
register exists, the RTS/CTS bits exist, too,
- Regardless of hardware flow control being enabled or not: RTS must
be deasserted.
Signed-off-by: Geert Uytterhoeven <geert+rene...@glider.be>
---
v3:
- No changes,
v2:
- New.
---
drivers/tty/serial/sh-sci.c | 23 ---
Before, the driver relied on initialization by the boot loader, or by
implicit reset state.
Note that unlike on (H)SCIF, the RTS/CTS bits exist only if dedicated
RTS/CTS pins are available, which depends on the SoC and UART instance.
Signed-off-by: Geert Uytterhoeven <geert+rene...@glider
Add support for indicating the availability of dedicated lines for
RTS/CTS hardware flow control, using the standard "uart-has-rtscts" DT
property.
Signed-off-by: Geert Uytterhoeven <geert+rene...@glider.be>
---
v3:
- No changes,
v2:
- New.
---
drivers/tty/serial/sh-sci.c
and
dedicated RTS/CTS are rejected.
Signed-off-by: Geert Uytterhoeven <geert+rene...@glider.be>
Reviewed-by: Peter Hurley <pe...@hurleysoftware.com>
---
Testing for regressions on platforms without DT and/or GPIOLIB support
(SuperH) would be appreciated.
Compile-tested on ecovec24_defconf
According to the datasheet, the frequency of the ARM architecture timer
on R-Car V2H depends on the frequency of the ZS clock, just like on
R-Car E2.
Signed-off-by: Geert Uytterhoeven <geert+rene...@glider.be>
---
Against renesas-devel-20160613-v4.7-rc3 with "ARM: shmobile: rcar-g
Hi Sergei,
On Fri, Jun 10, 2016 at 10:50 PM, Sergei Shtylyov
<sergei.shtyl...@cogentembedded.com> wrote:
> On 06/10/2016 11:42 PM, Geert Uytterhoeven wrote:
>>>The only problem I'm seeing (again) is the RCAN clock failing to
>>> register:
>>>
>>>
, removing
the dependency on the mode pins.
Signed-off-by: Geert Uytterhoeven <geert+rene...@glider.be>
---
Against renesas-devel-20160613-v4.7-rc3.
Tested on r8a7790/lager and r8a7791/koelsch.
---
arch/arm/mach-shmobile/setup-rcar-gen2.c | 42 +---
1 file chang
rive-strength", with a hyphen.
>>
>> Signed-off-by: Wolfram Sang <wsa+rene...@sang-engineering.com>
>
> Geert are you queuing this too?
Sure.
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- ge...@linux-m68k.
On Mon, Jun 6, 2016 at 1:33 PM, Geert Uytterhoeven
<geert+rene...@glider.be> wrote:
> The following changes since commit 1a695a905c18548062509178b98bc91e67510864:
>
> Linux 4.7-rc1 (2016-05-29 09:29:24 -0700)
>
> are available in the git repository at:
>
> git://g
Hi Jonsoo,
On Mon, Jun 13, 2016 at 9:43 PM, Geert Uytterhoeven
<ge...@linux-m68k.org> wrote:
> On Tue, Apr 12, 2016 at 6:51 AM, <js1...@gmail.com> wrote:
>> From: Joonsoo Kim <iamjoonsoo@lge.com>
>> To check whther free objects exist or not pre
Hi Joonsoo,
On Tue, Jun 14, 2016 at 10:11 AM, Joonsoo Kim <iamjoonsoo@lge.com> wrote:
> On Tue, Jun 14, 2016 at 09:31:23AM +0200, Geert Uytterhoeven wrote:
>> On Tue, Jun 14, 2016 at 8:24 AM, Joonsoo Kim <iamjoonsoo@lge.com> wrote:
>> > On Mon, Jun 13, 2
://git.kernel.org/pub/scm/linux/kernel/git/evalenti/linux-soc-thermal.git#next
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- ge...@linux-m68k.org
In personal conversations with technical people, I call myself a hacker
ere is no other impact to userspace than the change of the console
device to /dev/ttySC0, which may be handled automatically, depending on
your userspace.
Thanks for applying!
Geert Uytterhoeven (5):
ARM: dts: armadillo800eva: Update console parameters
ARM: dts: genmai: Update console parame
requires
referring to the port by alias.
Drop the "console=" parameters from the kernel command line, as they're
no longer needed for DT-based platforms.
Signed-off-by: Geert Uytterhoeven <geert+rene...@glider.be>
---
v2:
- Change one-line summary prefix to match current arm-soc
Add the serial port config to "chosen/stdout-path", which requires
referring to the port by alias.
Signed-off-by: Geert Uytterhoeven <geert+rene...@glider.be>
---
v2:
- Change one-line summary prefix to match current arm-soc practices,
- Reword patch description.
---
a
eded for DT-based platforms.
Signed-off-by: Geert Uytterhoeven <geert+rene...@glider.be>
---
v2:
- Change one-line summary prefix to match current arm-soc practices,
- Reword patch description.
---
arch/arm/boot/dts/emev2-kzm9d.dts | 8 ++--
1 file changed, 6 insertions(+), 2 deletions(-)
Hi Joonsoo,
On Wed, Jun 15, 2016 at 4:23 AM, Joonsoo Kim <iamjoonsoo@lge.com> wrote:
> On Tue, Jun 14, 2016 at 12:45:14PM +0200, Geert Uytterhoeven wrote:
>> On Tue, Jun 14, 2016 at 10:11 AM, Joonsoo Kim <iamjoonsoo@lge.com> wrote:
>> > On Tue, Jun 14, 2
Hi Sergei,
On Mon, Jun 13, 2016 at 1:24 PM, Sergei Shtylyov
<sergei.shtyl...@cogentembedded.com> wrote:
> On 6/13/2016 10:12 AM, Geert Uytterhoeven wrote:
>>>>>The only problem I'm seeing (again) is the RCAN clock failing to
>>>>> register:
>&g
; CPG_MOD 602>;
> + power-domains = < R8A7795_PD_A3VP>;
Adding it to the example doesn't hurt, though.
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- ge...@linux-m68k.org
In
for generic compatible 'FCP for VSP'
I guess checkpatch complained about your dtsi additions because you forgot
to add "renesas,fcpf" here?
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- ge...@linux-m68k.org
In personal
y are used as internal clock sources only, and never
referenced from DT.
Signed-off-by: Geert Uytterhoeven <geert+rene...@glider.be>
Tested-by: Simon Horman <horms+rene...@verge.net.au>
---
v2:
- Add Tested-by.
---
include/dt-bindings/clock/r8a7796-cpg-mssr.h | 69 ++
Initial support for R-Car M3-W (r8a7796), including basic core clocks,
and SCIF2 (console) and INTC-AP (GIC) module clocks.
Signed-off-by: Geert Uytterhoeven <geert+rene...@glider.be>
Tested-by: Simon Horman <horms+rene...@verge.net.au>
---
v2:
- Add Tested-by.
---
drivers/clk/ren
Signed-off-by: Geert Uytterhoeven <geert+rene...@glider.be>
Acked-by: Laurent Pinchart <laurent.pinch...@ideasonboard.com>
---
v2:
- Add Acked-by.
---
include/dt-bindings/power/r8a7796-sysc.h | 36
1 file changed, 36 insertions(+)
create mode 10064
been tested on r8a7796/salvator-x, and the code (minus the
acks, i.e. v1), has been part of renesas-drivers since 2016-05-10.
Thanks!
Geert Uytterhoeven (3):
soc: renesas: rcar-sysc: Document r8a7796 support
soc: renesas: Add r8a7796 SYSC PM Domain Binding Definitions
soc: renesas: rcar-sysc
Signed-off-by: Geert Uytterhoeven <geert+rene...@glider.be>
Acked-by: Laurent Pinchart <laurent.pinch...@ideasonboard.com>
Acked-by: Rob Herring <r...@kernel.org>
---
v2:
- Add Acked-by.
---
Documentation/devicetree/bindings/power/renesas,rcar-sysc.txt | 1 +
1 file ch
Add a device node for the System Controller.
Hook up the Cortex-A57 CPU core and L2 cache/SCU to their respective PM
Domains.
Signed-off-by: Geert Uytterhoeven <geert+rene...@glider.be>
---
arch/arm64/boot/dts/renesas/r8a7796.dtsi | 9 +
1 file changed, 9 insertions(+)
diff --git
--
1.9.1
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- ge...@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say
Hook up all devices that are part of the CPG/MSSR Clock Domain to the
SYSC "always-on" PM Domain, for a more consistent device-power-area
description in DT.
Signed-off-by: Geert Uytterhoeven <geert+rene...@glider.be>
---
arch/arm64/boot/dts/renesas/r8a7796.dtsi | 2 +-
1
it renesas/fcpf for
> convenience.
As this is based on previous renesas-drivers release, which included the
Salvator-X HDMI prototype, I created a topic branch topic/fcpf-v1 just
containing your changes.
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux
tje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- ge...@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
of the UART,
before the UART's FIFOs have been reset, causing reading of stale
data.
Inspired by a patch in the BSP by Koji Matsuoka
<koji.matsuoka...@renesas.com>.
Signed-off-by: Geert Uytterhoeven <geert+rene...@glider.be>
---
Extracted from "[PATCH/RFC v3 0/4] serial: s
-by: Geert Uytterhoeven <geert+rene...@glider.be>
---
drivers/tty/serial/sh-sci.c | 6 --
1 file changed, 6 deletions(-)
diff --git a/drivers/tty/serial/sh-sci.c b/drivers/tty/serial/sh-sci.c
index 0130feb069aee02f..d6ba90c572f7475c 100644
--- a/drivers/tty/serial/sh-sci.c
+++ b/drive
flowchart in the datasheet.
Signed-off-by: Geert Uytterhoeven <geert+rene...@glider.be>
---
drivers/tty/serial/sh-sci.c | 4
1 file changed, 4 insertions(+)
diff --git a/drivers/tty/serial/sh-sci.c b/drivers/tty/serial/sh-sci.c
index 4d2f916f45277e20..549d799cb18fafe7 100644
--- a/drive
Add the missing timeout bit definition for (H)SCIF.
Clear the timeout and overrun flag bits during UART reset, cfr. the
initialization flowchart in the datasheet.
Signed-off-by: Geert Uytterhoeven <geert+rene...@glider.be>
---
drivers/tty/serial/sh-sci.c | 5 +
drivers/tty/serial/sh
] https://github.com/geertu/sertest
[2] https://github.com/geertu/fifotest
[3] http://elinux.org/Tests:SCIF-FIFO
Geert Uytterhoeven (4):
serial: sh-sci: Do not start transfers from sci_startup()
serial: sh-sci: Stop transfers in sci_shutdown()
serial: sh-sci: Clear RX, error, and break flags
Hi Dirk,
On Thu, Jun 2, 2016 at 7:54 AM, Dirk Behme <dirk.be...@de.bosch.com> wrote:
> On 01.06.2016 21:21, Geert Uytterhoeven wrote:
>> The R-Car M1A board code no longer calls r8a7778_clocks_init().
>>
>> Signed-off-by: Geert Uytterhoeven <geert+rene...@glide
to an unordered
list in a table. The list of number is considered part of the DT bindings, and
thus append-only (to be considered in case the datasheet is updated).
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- ge...@linux-m68k
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