On Thu, Apr 06, 2017 at 11:53:45AM +0200, Geert Uytterhoeven wrote:
> Hi Simon,
>
> On Fri, Mar 17, 2017 at 11:02 PM, Sjoerd Simons
> wrote:
> > On Thu, 2017-01-26 at 17:53 +0300, Vladimir Barinov wrote:
> >> This adds the folowing:
> >> - R8A7796 SoC based M3ULCB board peripherals
> >>
> >> Vlad
On Thu, Apr 06, 2017 at 03:31:27PM +0200, Geert Uytterhoeven wrote:
> From: Takeshi Kihara
>
> This patch addes memory region:
>
> - After changes, the Salvator-X board has the following map:
> Bank0: 1GiB RAM : 0x4800 -> 0x0007fff
> Bank1: 1GiB RAM : 0x0005 -> 0x00
On Thu, Apr 06, 2017 at 11:40:55PM +, Kuninori Morimoto wrote:
>
> Hi Simon
>
> > From: Kuninori Morimoto
> >
> > This patch adds clkout-lr-synchronous property which synchronizes
> > L/R clock to the rcar_sound node.
> >
> > Signed-off-by: Kuninori Morimoto
> > Signed-off-by: Hiroyuki Yo
From: Magnus Damm
Update the r8a7795 SATA device node to use a 2MiB I/O space as specified
in the "72. Serial-ATA" section of R-Car-Gen3-rev0.52E.pdf
Signed-off-by: Magnus Damm
Reviewed-by: Geert Uytterhoeven
Signed-off-by: Simon Horman
---
arch/arm64/boot/dts/renesas/r8a7795.dtsi
Hi Olof, Hi Kevin, Hi Arnd,
Please consider these second round of Renesas ARM64 based SoC DT updates
for v4.12.
This pull request is based on the previous round of
such requests, tagged as renesas-arm64-dt-for-v4.12,
which you have already pulled.
The following changes since commit 3cbe33367d4f
From: Geert Uytterhoeven
Add the Z2 clock (Cortex-A7 CPU core clock), which uses a fixed divider,
and link the first CPU node to it.
Signed-off-by: Geert Uytterhoeven
Signed-off-by: Simon Horman
---
arch/arm/boot/dts/r8a7794.dtsi | 8
1 file changed, 8 insertions(+)
diff --git a
driver).
Fixes: 7c4163aae3d8e5b9 ("ARM: dts: r8a7792: initial SoC device tree")
Signed-off-by: Geert Uytterhoeven
Signed-off-by: Simon Horman
---
arch/arm/boot/dts/r8a7792.dtsi| 11 +--
include/dt-bindings/clock/r8a7792-clock.h | 1 -
2 files changed, 9 insert
From: Geert Uytterhoeven
Add the missing module clock for the second channel of the display unit.
Signed-off-by: Geert Uytterhoeven
Acked-by: Laurent Pinchart
Signed-off-by: Simon Horman
---
arch/arm/boot/dts/r8a7794.dtsi| 8 +---
include/dt-bindings/clock/r8a7794-clock.h
From: Geert Uytterhoeven
The current practice is to not add _clk suffixes to clock node names in
DT, as these names are used as the actual clock names.
Signed-off-by: Geert Uytterhoeven
Acked-by: Stephen Boyd
Signed-off-by: Simon Horman
---
arch/arm/boot/dts/r8a7790.dtsi | 2 +-
1 file
From: Geert Uytterhoeven
The current practice is to not add _clk suffixes to clock node names in
DT, as these names are used as the actual clock names.
Signed-off-by: Geert Uytterhoeven
Acked-by: Stephen Boyd
Signed-off-by: Simon Horman
---
arch/arm/boot/dts/r8a7791.dtsi | 2 +-
1 file
From: Chris Brandt
Reported-by: Geert Uytterhoeven
Signed-off-by: Chris Brandt
Fixes: 66474697923c ("ARM: dts: r7s72100: add sdhi to device tree")
Acked-by: Geert Uytterhoeven
Signed-off-by: Simon Horman
---
arch/arm/boot/dts/r7s72100.dtsi | 2 ++
1 file changed, 2 insertions(+)
From: Chris Brandt
Enable the 32.768 kHz RTC_X1 clock by setting the frequency value to
non-zero.
Signed-off-by: Chris Brandt
Reviewed-by: Geert Uytterhoeven
Signed-off-by: Simon Horman
---
arch/arm/boot/dts/r7s72100-rskrza1.dts | 4
1 file changed, 4 insertions(+)
diff --git a/arch
From: Geert Uytterhoeven
The current practice is to not add _clk suffixes to clock node names in
DT, as these names are used as the actual clock names.
Signed-off-by: Geert Uytterhoeven
Acked-by: Stephen Boyd
Signed-off-by: Simon Horman
---
arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts
roller API.
Note that all resets added match the corresponding module clocks.
Signed-off-by: Geert Uytterhoeven
Signed-off-by: Simon Horman
---
arch/arm64/boot/dts/renesas/r8a7795.dtsi | 93
1 file changed, 93 insertions(+)
diff --git a/arch/arm64/boot/dts/renes
roller API.
Note that all resets added match the corresponding module clocks.
Signed-off-by: Geert Uytterhoeven
Signed-off-by: Simon Horman
---
arch/arm/boot/dts/r8a7745.dtsi | 24
1 file changed, 24 insertions(+)
diff --git a/arch/arm/boot/dts/r8a7745.dtsi b/arch/ar
From: Chris Brandt
Enable the realtime clock.
Signed-off-by: Chris Brandt
Reviewed-by: Geert Uytterhoeven
Signed-off-by: Simon Horman
---
arch/arm/boot/dts/r7s72100-rskrza1.dts | 4
1 file changed, 4 insertions(+)
diff --git a/arch/arm/boot/dts/r7s72100-rskrza1.dts
b/arch/arm/boot
From: Chris Brandt
Add the realtime clock device node.
Signed-off-by: Chris Brandt
Reviewed-by: Geert Uytterhoeven
Signed-off-by: Simon Horman
---
arch/arm/boot/dts/r7s72100.dtsi | 14 ++
1 file changed, 14 insertions(+)
diff --git a/arch/arm/boot/dts/r7s72100.dtsi b/arch/arm
From: Jacopo Mondi
Enable the 32.768 kHz RTC_X1 clock by setting the frequency value to
non-zero and enable the realtime clock.
Signed-off-by: Jacopo Mondi
Signed-off-by: Simon Horman
---
arch/arm/boot/dts/r7s72100-genmai.dts | 8
1 file changed, 8 insertions(+)
diff --git a/arch
Signed-off-by: Simon Horman
---
arch/arm/boot/dts/r8a7791.dtsi | 7 +--
1 file changed, 5 insertions(+), 2 deletions(-)
diff --git a/arch/arm/boot/dts/r8a7791.dtsi b/arch/arm/boot/dts/r8a7791.dtsi
index b319ef4d57b0..a6478ca3f4ca 100644
--- a/arch/arm/boot/dts/r8a7791.dtsi
+++ b/arch/arm/boot/d
Signed-off-by: Simon Horman
---
arch/arm/boot/dts/r8a7790.dtsi | 7 +--
1 file changed, 5 insertions(+), 2 deletions(-)
diff --git a/arch/arm/boot/dts/r8a7790.dtsi b/arch/arm/boot/dts/r8a7790.dtsi
index 534525665bb3..fe6b8c2a2d71 100644
--- a/arch/arm/boot/dts/r8a7790.dtsi
+++ b/arch/arm/boot/d
Signed-off-by: Simon Horman
---
arch/arm/boot/dts/r8a7793.dtsi | 7 +--
1 file changed, 5 insertions(+), 2 deletions(-)
diff --git a/arch/arm/boot/dts/r8a7793.dtsi b/arch/arm/boot/dts/r8a7793.dtsi
index 9fcf3a9ca084..4de6041d61f9 100644
--- a/arch/arm/boot/dts/r8a7793.dtsi
+++ b/arch/ar
From: Geert Uytterhoeven
The second channel of the display unit uses a different module clock
than the first channel.
Fixes: 84e734f497cd48f6 ("ARM: dts: silk: add DU DT support")
Signed-off-by: Geert Uytterhoeven
Acked-by: Laurent Pinchart
Signed-off-by: Simon Horman
---
arch/ar
roller API.
Note that all resets added match the corresponding module clocks.
Signed-off-by: Geert Uytterhoeven
Signed-off-by: Simon Horman
---
arch/arm64/boot/dts/renesas/r8a7796.dtsi | 46
1 file changed, 46 insertions(+)
diff --git a/arch/arm64/boot/dts/renes
Hi Olof, Hi Kevin, Hi Arnd,
Please consider these second round of Renesas ARM based SoC DT updates for
v4.12.
This pull request is based on the previous round of
such requests, tagged as renesas-dt-for-v4.12,
which you have already pulled.
The following changes since commit d01ff18992218f3a13f4
roller API.
Note that all resets added match the corresponding module clocks.
Signed-off-by: Geert Uytterhoeven
Signed-off-by: Simon Horman
---
arch/arm/boot/dts/r8a7743.dtsi | 24
1 file changed, 24 insertions(+)
diff --git a/arch/arm/boot/dts/r8a7743.dtsi b/arch/ar
Tested-by: Niklas Söderlund
Signed-off-by: Simon Horman
---
arch/arm/boot/dts/r8a7791-koelsch.dts | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/r8a7791-koelsch.dts
b/arch/arm/boot/dts/r8a7791-koelsch.dts
index 59beb8402a36..001e6116c47c 100644
--- a/arc
From: Chris Brandt
Add the realtime clock functional clock source.
Signed-off-by: Chris Brandt
Reviewed-by: Geert Uytterhoeven
Signed-off-by: Simon Horman
---
arch/arm/boot/dts/r7s72100.dtsi| 9 +
include/dt-bindings/clock/r7s72100-clock.h | 3 +++
2 files changed, 12
From: Geert Uytterhoeven
The second channel of the display unit uses a different module clock
than the first channel.
Fixes: 876e7fb9f418fd86 ("ARM: shmobile: r8a7794: alt: Enable VGA port")
Signed-off-by: Geert Uytterhoeven
Acked-by: Laurent Pinchart
Signed-off-by: Simon Horman
From: Chris Brandt
Add the RTC clocks to device tree. The frequencies must be fixed values
according to the hardware manual.
Signed-off-by: Chris Brandt
Reviewed-by: Geert Uytterhoeven
Signed-off-by: Simon Horman
---
arch/arm/boot/dts/r7s72100.dtsi | 14 ++
1 file changed, 14
From: Chris Brandt
Technically, the Ethernet block is run off the 133MHz Bus (B) clock, not
the 33MHz Peripheral 0 (P0) clock.
Fixes: 969244f9c720 ("ARM: dts: r7s72100: add ethernet clock to device tree")
Signed-off-by: Chris Brandt
Reviewed-by: Geert Uytterhoeven
Signed-off-by: Si
From: Geert Uytterhoeven
The second channel of the display unit uses a different module clock
than the first channel.
Fixes: 46c4f13d04d729fa ("ARM: shmobile: r8a7794: Add DU node to device tree")
Signed-off-by: Geert Uytterhoeven
Acked-by: Laurent Pinchart
Signed-off-by: Si
ingle binary
for now,
2. Make it clear which code supports ES1.x, so it can easily be
identified and removed later, when production SoCs are deemed
ubiquitous.
Signed-off-by: Geert Uytterhoeven
Signed-off-by: Simon Horman
---
drivers/soc/renesas/r8a7795-sysc.c
Hi Olof, Hi Kevin, Hi Arnd,
Please consider these Renesas ARM based SoC sysc updates for v4.12.
This pull request is based on the soc-device-match-tag2 tag of
Geert Uytterhoeven's renesas-drivers tree which he has already
sent a pull-request for.
The following changes since commit 6e12db376b60b
-off-by: Simon Horman
---
drivers/soc/renesas/rcar-sysc.c | 25 -
drivers/soc/renesas/rcar-sysc.h | 10 ++
2 files changed, 34 insertions(+), 1 deletion(-)
diff --git a/drivers/soc/renesas/rcar-sysc.c b/drivers/soc/renesas/rcar-sysc.c
index 225c35c79d9a
to an early_initcall()
to fix this (renesas-soc.o is listed before rcar-sysc.o in the Makefile).
Signed-off-by: Geert Uytterhoeven
Signed-off-by: Simon Horman
---
drivers/soc/renesas/renesas-soc.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/soc/renesas/renesas-soc.c
b/driver
On Sat, Apr 08, 2017 at 01:27:57PM +0200, Wolfram Sang wrote:
> Simon,
>
> the driver patches for HS200 support are now upstream. So, based on the
> earlier discussion [1] it should be now safe to pick up the DTS patches.
> I rebased them to the arm64-dt-for-v4.12 branch.
Thanks, I have queued th
On Fri, Apr 07, 2017 at 09:52:13AM -0400, Simon Horman wrote:
> On Thu, Apr 06, 2017 at 11:53:45AM +0200, Geert Uytterhoeven wrote:
> > Hi Simon,
> >
> > On Fri, Mar 17, 2017 at 11:02 PM, Sjoerd Simons
> > wrote:
> > > On Thu, 2017-01-26 at 17:53 +0300, Vlad
On Sat, Apr 08, 2017 at 05:35:05PM +0200, Greg Kroah-Hartman wrote:
> On Mon, Apr 03, 2017 at 06:28:31AM -0400, Simon Horman wrote:
> > On Fri, Mar 31, 2017 at 10:54:20AM +0200, Geert Uytterhoeven wrote:
> > > Hi Greg,
> > > Hi Arnd, Kevin, Olof,
> > >
[Cc linux-renesas-soc]
On Thu, Apr 13, 2017 at 01:18:58PM +0100, David Woodhouse wrote:
> Less important than in user-visible messages, but still good practice as
> there's still no excuse for ARM64 code to look like it was written before
> 1996.
>
> Signed-off-by: David Woodhouse
Hi David,
I'
From: Tsutomu Izawa
This patch fixes ravb_ptp_interrupt clears GIS register of all interrupts
status. It corrects to clear PTCF bit or PTMF bit.
Also it fixes returned value to IRQ_HANDLED or IRQ_NONE.
Signed-off-by: Tsutomu Izawa
Signed-off-by: Kazuya Mizuguchi
Signed-off-by: Simon Horman
On Fri, Apr 07, 2017 at 09:52:13AM -0400, Simon Horman wrote:
> On Thu, Apr 06, 2017 at 11:53:45AM +0200, Geert Uytterhoeven wrote:
> > Hi Simon,
> >
> > On Fri, Mar 17, 2017 at 11:02 PM, Sjoerd Simons
> > wrote:
> > > On Thu, 2017-01-26 at 17:53 +0300, Vlad
a similar patch for the r8a7796 salvator-x by Kazuya Mizuguchi.
Signed-off-by: Simon Horman
---
Untested due to lack of hardware access.
---
arch/arm64/boot/dts/renesas/r8a7796-m3ulcb.dts | 13 +
1 file changed, 1 insertion(+), 12 deletions(-)
diff --git a/arch/arm64/boot/dts
Add the "1v8" pinctrl state and sd-uhs-sdr50 property to SDHI1.
Signed-off-by: Simon Horman
---
* Compile tested only; no access to silk board
---
arch/arm/boot/dts/r8a7794-silk.dts | 8
1 file changed, 8 insertions(+)
diff --git a/arch/arm/boot/dts/r8a7794-silk.dts
b/arc
access remotely
Simon Horman (2):
ARM: dts: r8a7793: set maximum frequency for SDHI clocks
ARM: dts: gose: Enable UHS-I SDR-50 and SDR-104
arch/arm/boot/dts/r8a7793-gose.dts | 34 +++---
arch/arm/boot/dts/r8a7793.dtsi | 3 +++
2 files changed, 34 insertions
Define the upper limit otherwise the driver cannot utilize max speeds.
Signed-off-by: Simon Horman
---
arch/arm/boot/dts/r8a7793.dtsi | 3 +++
1 file changed, 3 insertions(+)
diff --git a/arch/arm/boot/dts/r8a7793.dtsi b/arch/arm/boot/dts/r8a7793.dtsi
index 4de6041d61f9..08b7b0f97909 100644
Add the "1v8" pinctrl state and sd-uhs-sdr50 property to SDHI{0,1,2}.
And the sd-uhs-sdr104 property to SDHI0.
Signed-off-by: Simon Horman
---
* Verified:
- SDR104 for SDHI0
- SDR50 for SDHI1
- Results comprable to those listed for other Renesas R-Car Gen2 boards on
http://
Add the "1v8" pinctrl state and sd-uhs-sdr50 property to SDHI{0,2}.
And the sd-uhs-sdr104 property to SDHI0.
Signed-off-by: Simon Horman
--
Testing failed:
- SDHI0: mmc0: error -110 whilst initialising SD card
- It is unclear if this is something to do with my hardware/firmware
envi
.
Cc: Khiem Nguyen
Signed-off-by: Simon Horman
---
* Compile and boot tested only
---
drivers/ata/sata_rcar.c | 9 +
1 file changed, 1 insertion(+), 8 deletions(-)
diff --git a/drivers/ata/sata_rcar.c b/drivers/ata/sata_rcar.c
index 5d38245a7a73..4f4f7788a6cf 100644
--- a/drivers/ata
On Tue, Apr 18, 2017 at 09:22:24AM +0200, Geert Uytterhoeven wrote:
> On Tue, Apr 18, 2017 at 7:27 AM, Simon Horman
> wrote:
> > Add the "1v8" pinctrl state and sd-uhs-sdr50 property to SDHI1.
> >
> > Signed-off-by: Simon Horman
> > ---
> >
On Tue, Apr 18, 2017 at 04:17:38PM +0900, Tejun Heo wrote:
> On Tue, Apr 18, 2017 at 04:02:53PM +0900, Simon Horman wrote:
> > In the case where power is cut on suspend the SATA PHY state needs to be
> > suspended on resume.
> ^
> re-initialized?
Yes, sorry for the thin
Add the "1v8" pinctrl state and sd-uhs-sdr50 property to SDHI1.
Signed-off-by: Simon Horman
---
* Compile tested only; no access to silk board
---
arch/arm/boot/dts/r8a7794-silk.dts | 8
1 file changed, 8 insertions(+)
diff --git a/arch/arm/boot/dts/r8a7794-silk.dts
b/arc
On Sat, Apr 15, 2017 at 12:09:42AM +0300, Sergei Shtylyov wrote:
> Define the generic R8A7743 part of the PFC device node.
>
> Signed-off-by: Sergei Shtylyov
>
> ---
> arch/arm/boot/dts/r8a7743.dtsi |7 ++-
> 1 file changed, 6 insertions(+), 1 deletion(-)
>
> Index: renesas/arch/arm/bo
On Sat, Apr 15, 2017 at 12:09:41AM +0300, Sergei Shtylyov wrote:
> Hello.
>
> Here's the set of 3 patches against Simon Horman's 'renesas.git' repo,
> 'renesas-devel-20170410-v4.11-rc6' tag. We're adding the R8A7743 PFC node and
> then describe the pins for SCIF0 and Ether devices described erali
On Tue, Apr 18, 2017 at 03:42:25PM +0200, Geert Uytterhoeven wrote:
> On Sun, Apr 16, 2017 at 6:57 PM, Marek Vasut wrote:
> > Add the GyroADC clock to the R8A7791 device tree.
> >
> > Signed-off-by: Marek Vasut
>
> Reviewed-by: Geert Uytterhoeven
Thanks I have queued this patch (1/2) up for v4
On Tue, Apr 18, 2017 at 12:26:25PM +0300, Sergei Shtylyov wrote:
> Hello.
>
> On 4/18/2017 4:06 AM, Simon Horman wrote:
>
> >Set PHY rxc-skew-ps to 1500 and all other values to their default values.
> >
> >This is intended to to address failures in the case of 1Gbps
On Tue, Apr 18, 2017 at 12:20:20PM +0300, Sergei Shtylyov wrote:
> Hello.
>
> On 4/18/2017 10:02 AM, Simon Horman wrote:
>
> >In the case where power is cut on suspend the SATA PHY state needs to be
> >suspended on resume.
> >
> >This is the case on the
On Wed, Apr 19, 2017 at 10:37:37AM +0200, Geert Uytterhoeven wrote:
> Add device nodes for two Maxim max961x current sense amplifiers
> sensing the VDD_0.8V and DVFS_0.8V lines.
>
> Based on a patch for r8a7796-salvator-x.dts by Jacopo Mondi.
>
> Signed-off-by: Geert Uytterhoeven
> ---
> Binding
On Thu, Apr 20, 2017 at 06:10:19PM +0900, Simon Horman wrote:
> On Wed, Apr 19, 2017 at 10:37:37AM +0200, Geert Uytterhoeven wrote:
> > Add device nodes for two Maxim max961x current sense amplifiers
> > sensing the VDD_0.8V and DVFS_0.8V lines.
> >
> > Based on a patch
On Wed, Apr 19, 2017 at 10:40:21AM +0200, Geert Uytterhoeven wrote:
> Hi Jacopo,
>
> On Thu, Apr 6, 2017 at 4:20 PM, Jacopo Mondi
> wrote:
> > [PATCH v5 4/4] arm64: dts: salvator-x: Add current sense amplifiers
>
> This should be "arm64: dts: r8a7796: salvator-x: Add current sense
> amplifiers
On Wed, Apr 19, 2017 at 06:55:56AM -0700, Olof Johansson wrote:
> Hi,
>
> On Fri, Apr 07, 2017 at 02:14:07PM -0400, Simon Horman wrote:
> > Hi Olof, Hi Kevin, Hi Arnd,
> >
> > Please consider these Renesas ARM based SoC sysc updates for v4.12.
> >
> >
On Thu, Apr 20, 2017 at 11:46:44AM +0200, Geert Uytterhoeven wrote:
> Cfr. commit b2407c566ba29215 ("arm64: dts: r8a7795: enable nfs root on
> Salvator-X board").
>
> Signed-off-by: Geert Uytterhoeven
Thanks, I have queued this up.
It looks like we should also do something like this for [hm]3ul
On Thu, Apr 20, 2017 at 11:50:47AM +0200, Geert Uytterhoeven wrote:
> The EthernetAVB should not depend on the bootloader to setup correct
> drive-strength values. Values for drive-strength where found by
> examining the registers after the bootloader has configured the
> registers and successfull
On Thu, Apr 20, 2017 at 11:46:57PM +0900, Magnus Damm wrote:
> From: Magnus Damm
>
> r8a7792 Blanche has depending on dip switch and jumper settings
> either HSCIF0 or CAN0 exposed on the on-board CN5 connector.
>
> This patch adds HSCIF0 to the Blanche dts as serial2.
>
> Signed-off-by: Magnus
On Thu, Apr 20, 2017 at 09:51:32PM +0300, Sergei Shtylyov wrote:
> Hello.
>
>Here's the set of 3 patches against Simon Horman's 'renesas.git' repo,
> 'renesas-devel-20170420-v4.11-rc7' tag. We're adding the R8A7743 PFC node
> and then describing the pins for SCIF0 and Ether devices declared e
On Fri, Apr 21, 2017 at 09:26:04AM +0200, Ulrich Hecht wrote:
> On Thu, Apr 20, 2017 at 7:51 PM, Geert Uytterhoeven
> wrote:
> > And we already have a correct v3 from you in patchwork:
> > https://patchwork.kernel.org/patch/8711801/
>
> Whoops...
>
> In my defense, that was over a year ago. Simo
analysis is that this is a user-visible change to the extent that kernel
logs, and sysfs entries change from e606.pfc and pfc@e606 to
e606.pin-controller and pin-controller@e606.
Signed-off-by: Simon Horman
---
Before:
/sys/kernel/debug/pinctrl/e606.pfc
/sys/devices/platform/soc
On Tue, Apr 25, 2017 at 07:26:01PM +0200, Geert Uytterhoeven wrote:
> R-Car V2H does not have "DIV6" programmable clocks, hence there is no
> need to build clk-div6.o.
>
> Signed-off-by: Geert Uytterhoeven
> ---
> To be queued up in clk-renesas-for-v4.13.
Reviewed-by: Simon Horman
helper instead, for which a
> dummy version is provided if CONFIG_PM_CLK=n.
>
> Signed-off-by: Geert Uytterhoeven
Reviewed-by: Simon Horman
On Tue, Apr 25, 2017 at 07:36:25PM +0200, Geert Uytterhoeven wrote:
> If the R-Car RST driver is not included, compile-testing R-Car clock
> drivers fails with a link error:
>
> undefined reference to `rcar_rst_read_mode_pins'
>
> To fix this, provide a dummy version. Use the exact same test
Hi Kieran,
On Tue, Apr 25, 2017 at 03:55:00PM +0100, Kieran Bingham wrote:
> From: Kieran Bingham
>
> The rvin_digital_notify_bound() call dereferences the subdev->dev
> pointer to obtain the of_node. On some error paths, this dev node can be
> set as NULL. The of_node is mapped into the subdevi
On Wed, Apr 26, 2017 at 09:13:06AM +0200, Simon Horman wrote:
> On Tue, Apr 25, 2017 at 07:36:25PM +0200, Geert Uytterhoeven wrote:
> > If the R-Car RST driver is not included, compile-testing R-Car clock
> > drivers fails with a link error:
> >
> >
hanks for working on this. I am very pleased to see something that
is more robust with regards to adding new platforms without causing
build breakage - I have been burnt by this several times.
Acked-by: Simon Horman
On Mon, Apr 24, 2017 at 11:03:54AM +0200, Geert Uytterhoeven wrote:
> On Mon, Apr 24, 2017 at 10:51 AM, Simon Horman
> wrote:
> > The device trees for Renesas SoCs use either pfc or pin-controller
> > as the node name for the PFC device. This patch is intended to take a step
&g
On Mon, Apr 24, 2017 at 12:02:17PM +0200, Ulrich Hecht wrote:
> On Mon, Apr 24, 2017 at 10:35 AM, Laurent Pinchart
> wrote:
> > Hi Ulrich,
> >
> > On Monday 24 Apr 2017 10:22:31 Ulrich Hecht wrote:
> >> On Mon, Apr 24, 2017 at 9:59 AM, Laurent Pinchart wrote:
> >> > How about using pwm1 for backli
On Wed, Apr 19, 2017 at 09:27:09AM +0200, Wolfram Sang wrote:
> On Tue, Apr 18, 2017 at 04:34:47PM +0900, Simon Horman wrote:
> > Add the "1v8" pinctrl state and sd-uhs-sdr50 property to SDHI1.
> >
> > Signed-off-by: Simon Horman
> > ---
> > * C
Add the "1v8" pinctrl state and sd-uhs-sdr50 property to SDHI1.
Signed-off-by: Simon Horman
---
* Compile tested only; no access to silk board
v3
* Added missing pinctrl-1 to sdhi0
v2
* Correct mangled addition of sdhi*_pins
---
arch/arm/boot/dts/r8a7794-silk.dts | 11 +
Add the "1v8" pinctrl state and sd-uhs-sdr50 property to SDHI1.
Signed-off-by: Simon Horman
---
* Prepared on top of renesas-devel-20170424-v4.11-rc8
* Compile tested only; no access to silk board
v3
* Added missing pinctrl-1 to sdhi0
v2
* Correct mangled addition of sdhi*_pins
---
On Wed, Apr 26, 2017 at 08:48:25AM +0100, Kieran Bingham wrote:
> Hi Simon,
>
> On 26/04/17 08:23, Simon Horman wrote:
> > Hi Kieran,
> >
> > On Tue, Apr 25, 2017 at 03:55:00PM +0100, Kieran Bingham wrote:
> >> From: Kieran Bingham
> >>
> >>
Hi Geert,
On Fri, Apr 21, 2017 at 02:55:16PM +0200, Geert Uytterhoeven wrote:
> Hi all,
>
> The Renesas Salvator-X and ULCB development board can be equipped with
> either an R-Car H3 or M3-W SiP, which are pin-compatible. All boards
> use separate DTBs, but currently there's no sharing of
On Wed, Apr 26, 2017 at 10:11:55AM +0200, Geert Uytterhoeven wrote:
> Hi Simon,
>
> CC Vladimir (which I forgot to CC initially, sorry for that)
>
> On Wed, Apr 26, 2017 at 10:06 AM, Simon Horman wrote:
> > On Fri, Apr 21, 2017 at 02:55:16PM +0200, Geert Uytterhoeven wr
On Wed, Apr 26, 2017 at 11:00:30AM +0200, Niklas Söderlund wrote:
> Hi Simon,
>
> Thanks for your feedback.
>
> On 2017-04-26 09:23:20 +0200, Simon Horman wrote:
> > Hi Kieran,
> >
> > On Tue, Apr 25, 2017 at 03:55:00PM +0100, Kieran Bingham wrote:
> > &
analysis is that this is a user-visible change to the extent that kernel
logs, and sysfs entries change from e605.pfc and pfc@e605 to
e605.pin-controller and pin-controller@e605.
Signed-off-by: Simon Horman
---
arch/arm/boot/dts/r8a73a4.dtsi | 2 +-
1 file changed, 1 insertion(+), 1
/gose
sh73a9/kzm9g
Not tested on (due to lack of hw access):
evm2/kzm9d
r8a7789/marzen
Simon Horman (9):
ARM: dts: emev2: update PFC node name to pin-controller
ARM: dts: r8a73a4: update PFC node name to pin-controller
ARM: dts: r8a7740: update PFC node name to pin-controller
ARM: dts
analysis is that this is a user-visible change to the extent that kernel
logs, and sysfs entries change from fffc.pfc and pfc@fffc to
fffc.pin-controller and pin-controller@fffc.
Signed-off-by: Simon Horman
---
arch/arm/boot/dts/r8a7778.dtsi | 2 +-
1 file changed, 1 insertion(+), 1
analysis is that this is a user-visible change to the extent that kernel
logs, and sysfs entries change from e0140200.pfc and pfc@e0140200 to
e0140200.pin-controller and pin-controller@e0140200.
Signed-off-by: Simon Horman
---
arch/arm/boot/dts/emev2.dtsi | 2 +-
1 file changed, 1 insertion(+), 1
analysis is that this is a user-visible change to the extent that kernel
logs, and sysfs entries change from fffc.pfc and pfc@fffc to
fffc.pin-controller and pin-controller@fffc.
Signed-off-by: Simon Horman
---
arch/arm/boot/dts/r8a7779.dtsi | 2 +-
1 file changed, 1 insertion(+), 1
analysis is that this is a user-visible change to the extent that kernel
logs, and sysfs entries change from e605.pfc and pfc@e605 to
e605.pin-controller and pin-controller@e605.
Signed-off-by: Simon Horman
---
arch/arm/boot/dts/sh73a0.dtsi | 2 +-
1 file changed, 1 insertion(+), 1
analysis is that this is a user-visible change to the extent that kernel
logs, and sysfs entries change from e606.pfc and pfc@e606 to
e606.pin-controller and pin-controller@e606.
Signed-off-by: Simon Horman
---
arch/arm/boot/dts/r8a7790.dtsi | 2 +-
1 file changed, 1 insertion(+), 1
analysis is that this is a user-visible change to the extent that kernel
logs, and sysfs entries change from e605.pfc and pfc@e605 to
e605.pin-controller and pin-controller@e605.
Signed-off-by: Simon Horman
---
arch/arm/boot/dts/r8a7740.dtsi | 2 +-
1 file changed, 1 insertion(+), 1
analysis is that this is a user-visible change to the extent that kernel
logs, and sysfs entries change from e606.pfc and pfc@e606 to
e606.pin-controller and pin-controller@e606.
Signed-off-by: Simon Horman
---
arch/arm/boot/dts/r8a7791.dtsi | 2 +-
1 file changed, 1 insertion(+), 1
analysis is that this is a user-visible change to the extent that kernel
logs, and sysfs entries change from e606.pfc and pfc@e606 to
e606.pin-controller and pin-controller@e606.
Signed-off-by: Simon Horman
---
arch/arm/boot/dts/r8a7793.dtsi | 2 +-
1 file changed, 1 insertion(+), 1
On Wed, Apr 26, 2017 at 01:20:52PM +0200, Geert Uytterhoeven wrote:
> Hi Simon,
>
> On Wed, Apr 26, 2017 at 12:05 PM, Simon Horman
> wrote:
> > The device trees for Renesas SoCs use either pfc or pin-controller as the
> > node name for the PFC device. This patch is
On Wed, Apr 26, 2017 at 02:35:58PM +0200, Geert Uytterhoeven wrote:
> Hi Simon,
>
> On Wed, Apr 26, 2017 at 9:34 AM, Simon Horman wrote:
> > On Wed, Apr 26, 2017 at 09:13:06AM +0200, Simon Horman wrote:
> >> On Tue, Apr 25, 2017 at 07:36:25PM +0200, Geert Uytterhoeven wr
On Wed, Apr 26, 2017 at 06:56:06PM +0300, Laurent Pinchart wrote:
> Hi Ulrich,
>
> On Tuesday 21 Feb 2017 01:42:15 Laurent Pinchart wrote:
> > On Thursday 20 Oct 2016 10:49:11 Simon Horman wrote:
> > > On Tue, Oct 18, 2016 at 05:02:20PM +0200, Ulrich Hecht wrote:
> >
On Thu, Apr 27, 2017 at 10:38:39AM +0200, Geert Uytterhoeven wrote:
> On Thu, Apr 27, 2017 at 10:19 AM, Jacopo Mondi
> wrote:
> > Add dt-bindings for Renesas r7s72100 pin controller header file.
> >
> > Signed-off-by: Jacopo Mondi
>
> Reviewed-by: Geert Uytterhoeven
Thanks, I have queued this
On Thu, Apr 27, 2017 at 10:48:45AM +, Chris Brandt wrote:
> Hi Geert,
>
> On Thursday, April 27, 2017, Geert Uytterhoeven wrote:
> > > +ðer {
> > > + pinctrl-names = "default";
> > > + pinctrl-0 = <ðer_pins>;
> > > +
> > > + status = "okay";
> > > +
> > > + renesas,no-e
On Thu, Apr 27, 2017 at 10:19:51AM +0200, Jacopo Mondi wrote:
> Add pin configuration subnode for SCIF2 serial debug interface.
>
> Signed-off-by: Jacopo Mondi
> Reviewed-by: Geert Uytterhoeven
As the dt-bindings (documentation) has been acked by Geert I'd be happy
to queue up this and other "a
On Thu, Apr 27, 2017 at 10:42:02AM +0200, Geert Uytterhoeven wrote:
> Hi Jacopo,
>
> On Thu, Apr 27, 2017 at 10:19 AM, Jacopo Mondi
> wrote:
> >this is 5th round of gpio/pincontroller for RZ/A1 devices.
> >
> > I have updated the pin controller driver to use the newly introduced
> > "pinctrl_
On Thu, Apr 27, 2017 at 05:43:35PM +0300, Laurent Pinchart wrote:
> On Thursday 27 Apr 2017 17:42:53 Laurent Pinchart wrote:
> > On Thursday 27 Apr 2017 16:37:41 Ulrich Hecht wrote:
> > > From: Laurent Pinchart
> > >
> > > The panel backlight is controlled through a GPIO and a PWM channel.
> > >
On Thu, Apr 27, 2017 at 04:50:37PM +0200, Geert Uytterhoeven wrote:
> On Thu, Apr 27, 2017 at 4:37 PM, Ulrich Hecht
> wrote:
> > Add device tree bindings for the PWM controller found on R-Car M3-W SoCs.
> >
> > Signed-off-by: Ulrich Hecht
>
> Reviewed-by: Geert Uyt
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