Re: [RFC PATCH] arm64: dts: renesas: gen3: use 400kHz for I2C DVFS bus

[Simon Horman]

On Tue, Sep 18, 2018 at 11:24:49AM +0200, Geert Uytterhoeven wrote:
> On Tue, Sep 18, 2018 at 11:14 AM Wolfram Sang
>  wrote:
> > The PMIC and EEPROM can operate at 400kHz, so use this speed.
> >
> > Signed-off-by: Wolfram Sang 
> 
> Reviewed-by: Geert Uytterhoeven 

Thanks, applied for v4.20.

[RFC PATCH] arm64: dts: renesas: gen3: use 400kHz for I2C DVFS bus

[Wolfram Sang]

The PMIC and EEPROM can operate at 400kHz, so use this speed.

Signed-off-by: Wolfram Sang 
---

RFC because I couldn't find docs for the PMIC. Tests showed that it does
work at 400kHz (checksuming over 256 byte reads). Geert, do you happen
to have docs? Other than that, for the EEPROM it also works and is also
documented and BSP uses 400kHz as well. Tested on Salvator XS, not ULCB.

 arch/arm64/boot/dts/renesas/salvator-common.dtsi | 2 ++
 arch/arm64/boot/dts/renesas/ulcb.dtsi| 2 ++
 2 files changed, 4 insertions(+)

diff --git a/arch/arm64/boot/dts/renesas/salvator-common.dtsi 
b/arch/arm64/boot/dts/renesas/salvator-common.dtsi
index d298f7c9ada1..7f91ff524109 100644
--- a/arch/arm64/boot/dts/renesas/salvator-common.dtsi
+++ b/arch/arm64/boot/dts/renesas/salvator-common.dtsi
@@ -474,6 +474,8 @@
 _dvfs {
status = "okay";
 
+   clock-frequency = <40>;
+
pmic: pmic@30 {
pinctrl-0 = <_pins>;
pinctrl-names = "default";
diff --git a/arch/arm64/boot/dts/renesas/ulcb.dtsi 
b/arch/arm64/boot/dts/renesas/ulcb.dtsi
index 7e6078508ba0..30506c5ba4e9 100644
--- a/arch/arm64/boot/dts/renesas/ulcb.dtsi
+++ b/arch/arm64/boot/dts/renesas/ulcb.dtsi
@@ -241,6 +241,8 @@
 _dvfs {
status = "okay";
 
+   clock-frequency = <40>;
+
pmic: pmic@30 {
pinctrl-0 = <_pins>;
pinctrl-names = "default";
-- 
2.18.0