Hi Magnus,
On Thu, Aug 25, 2016 at 7:34 AM, Magnus Damm wrote:
> On Sat, Aug 13, 2016 at 1:38 AM, Geert Uytterhoeven
> wrote:
>> On R-Car H3, the various MSIOF instances (used for SPI) have a common
>> parent clock. This mso clock is a
Hi Geert,
On Sat, Aug 13, 2016 at 1:38 AM, Geert Uytterhoeven
wrote:
> Hi all,
>
> On R-Car H3, the various MSIOF instances (used for SPI) have a common
> parent clock. This mso clock is a programmable "DIV6" clock (divider
> 1 - 64). Its rate lies in the range
Hi all,
On R-Car H3, the various MSIOF instances (used for SPI) have a common
parent clock. This mso clock is a programmable "DIV6" clock (divider
1 - 64). Its rate lies in the range 12.5 to 800 MHz, or 6.25 to 400 MHz
(depending on the main crystal).
After boot up, the default