On Wed, Sep 19, 2018 at 04:50:42PM +0200, Geert Uytterhoeven wrote:
> PLL0 runs at 4.8 GHz, i.e. EXTAL x 100.
>
> Signed-off-by: Geert Uytterhoeven
Reviewed-by: Simon Horman
> ---
> To be queued in clk-renesas-for-v4.20.
>
> drivers/clk/renesas/r8a77990-cpg-mssr.c | 4 ++--
> 1 file
PLL0 runs at 4.8 GHz, i.e. EXTAL x 100.
Signed-off-by: Geert Uytterhoeven
---
To be queued in clk-renesas-for-v4.20.
drivers/clk/renesas/r8a77990-cpg-mssr.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/clk/renesas/r8a77990-cpg-mssr.c