On Fri, Nov 23, 2018 at 02:15:38PM +0100, Wolfram Sang wrote:
>
> > > > > +#define TMIO_STAT_ALWAYS_SET_27 BIT(27) /* only known on R-Car
> > > > > 2+ so far */
> > > >
> > > > The _27 seems to be odd to include in the name, but I assume it
> > > > was the least bad option you could come
> > > > +#define TMIO_STAT_ALWAYS_SET_27BIT(27) /* only known on R-Car
> > > > 2+ so far */
> > >
> > > The _27 seems to be odd to include in the name, but I assume it
> > > was the least bad option you could come up with.
> >
> > Yes :) I am open for better suggestions.
>
> Simply
Hi Wolfram,
Thanks for your work.
On 2018-11-23 13:57:32 +0100, Simon Horman wrote:
> On Thu, Nov 22, 2018 at 03:06:59PM +0100, Wolfram Sang wrote:
> >
> > > > +#define TMIO_STAT_ALWAYS_SET_27BIT(27) /* only known on R-Car
> > > > 2+ so far */
> > >
> > > The _27 seems to be odd to
On Thu, Nov 22, 2018 at 03:06:59PM +0100, Wolfram Sang wrote:
>
> > > +#define TMIO_STAT_ALWAYS_SET_27 BIT(27) /* only known on R-Car 2+ so
> > > far */
> >
> > The _27 seems to be odd to include in the name, but I assume it
> > was the least bad option you could come up with.
>
> Yes :) I am
> > +#define TMIO_STAT_ALWAYS_SET_27BIT(27) /* only known on R-Car 2+ so
> > far */
>
> The _27 seems to be odd to include in the name, but I assume it
> was the least bad option you could come up with.
Yes :) I am open for better suggestions.
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On Mon, Nov 19, 2018 at 02:13:57PM +0100, Wolfram Sang wrote:
> Some variants (namely Renesas SDHI) have bits in the STATS and IRQ_MASK
> registers which are 'always 1' and should be written as such. Introduce
> a seperate mask for this and apply it whenever such a register is
> written.
>
>
