Define the generic R8A7743 part of the Ether device node.
Based on the original (and large) patch by Dmitry Shifrin
.
Signed-off-by: Sergei Shtylyov
---
Changes in version 3:
- resoled a reject;
- updated the "clocks"
Describe the IRQC interrupt controller in the R8A7743 device tree.
Signed-off-by: Sergei Shtylyov
---
Changes in version 3:
- updated the "clocks" property for the CPG/MSSR driver.
Changes in version 2:
- new patch.
arch/arm/boot/dts/r8a7743.dtsi | 19
Hello Jithin,
On Tuesday 04 Oct 2016 10:24:06 Jithin T Raj wrote:
>Thank you..shmobile_defconfig solvs my problem..now Ibuild kernel and
> deployed through nfs tftp into ALT Board..The board is accepting kernel but
> after some time I am getting some errors..I have attached the error log
>
Hi Geert,
On Wednesday 05 Oct 2016 11:51:49 Geert Uytterhoeven wrote:
> On Wed, Oct 5, 2016 at 10:33 AM, Niklas Söderlund wrote:
> > On 2016-10-04 21:13:18 +0200, Geert Uytterhoeven wrote:
> >> On Tue, Sep 13, 2016 at 4:03 PM, Niklas Söderlund wrote:
> >> > ---
Hi Laurent,
On Wed, Oct 5, 2016 at 11:55 AM, Laurent Pinchart
wrote:
> On Friday 30 Sep 2016 10:38:48 Geert Uytterhoeven wrote:
>> On Thu, Sep 29, 2016 at 11:37 PM, Sergei Shtylyov wrote:
>> > Renesas RZ/G SoC also have the SCIF, SCIFA, SCIFB, and HSCIF ports.
Hi Laurent,
On Wed, Oct 5, 2016 at 12:28 PM, Laurent Pinchart
wrote:
> The SMP initialization function is only called if CONFIG_SMP is defined.
> Remove the duplicate check.
>
> Signed-off-by: Laurent Pinchart
On Friday 30 Sep 2016 10:38:48 Geert Uytterhoeven wrote:
> On Thu, Sep 29, 2016 at 11:37 PM, Sergei Shtylyov wrote:
> > Renesas RZ/G SoC also have the SCIF, SCIFA, SCIFB, and HSCIF ports.
> > Document RZ/G1[ME] (also known as R8A774[35]) SoC bindings along with
> > the RZ/G family bindings. The
The SMP initialization function is only called if CONFIG_SMP is defined.
Remove the duplicate check.
Signed-off-by: Laurent Pinchart
---
arch/arm/mach-shmobile/platsmp.c | 4
1 file changed, 4 deletions(-)
diff --git
Hi Sergei,
Thank you for the patch.
On Friday 30 Sep 2016 01:23:52 Sergei Shtylyov wrote:
> Add minimal support for the RZ/G1M (R8A7743) SoC.
>
> Based on the original (and large) patch by Dmitry Shifrin
> .
>
> Signed-off-by: Sergei Shtylyov
The three SoCs use the exact same machine definition, consolidate them
into a single one.
Signed-off-by: Laurent Pinchart
---
arch/arm/mach-shmobile/Makefile | 3 ---
arch/arm/mach-shmobile/setup-r8a7792.c | 35
Describe SYS-DMAC0/1 in the R8A7743 device tree.
Based on the original (and large) patch by Dmitry Shifrin
.
Signed-off-by: Sergei Shtylyov
Reviewed-by: Geert Uytterhoeven
---
Changes in version 3:
The initial R8A7743 SoC device tree including CPU cores, GIC, timer, SYSC,
CPG, and the required clock descriptions.
Based on the original (and large) patch by Dmitry Shifrin
.
Signed-off-by: Sergei Shtylyov
---
Changes in
Describe [H]SCIF[AB] ports in the R8A7743 device tree.
Based on the original (and large) patch by Dmitry Shifrin
.
Signed-off-by: Sergei Shtylyov
---
Changes in version 3:
- resolved a reject;
- updated the "clocks"
On Tue, Sep 13, 2016 at 4:03 PM, Niklas Söderlund
wrote:
> Group the AVB pins into similar groups found in other sh-pfc drivers.
> The pins can not be muxed between functions other then AVB but there
s/there/their/
> Signed-off-by: Niklas Söderlund
Hi Rob,
On Mon, Oct 3, 2016 at 10:30 PM, Rob Herring wrote:
> On Mon, Oct 3, 2016 at 2:42 PM, Geert Uytterhoeven
> wrote:
>> On Mon, Oct 3, 2016 at 8:25 PM, Rob Herring wrote:
>>> On Thu, Sep 29, 2016 at 10:31 AM, Geert Uytterhoeven
>>>
Hi Laurent,
2016-10-04 Laurent Pinchart :
> Hello,
>
> This patch series contains five simple cleanups and fixes for the rcar-du-drm
> driver, as well as an argument constification patch for video/of.
>
> The patches themselves are straightforward,
On Fri, Sep 30, 2016 at 12:34 AM, Sergei Shtylyov
wrote:
> Add the initial device tree for the R8A7743 SoC based SK-RZG1M board.
> The board has one debug serial port (SCIF0); include support for it, so
> that the serial console can work.
>
> Based on the
Hi Geert,
Thanks for your feedback.
On 2016-10-04 21:13:18 +0200, Geert Uytterhoeven wrote:
> Hi Niklas,
>
> On Tue, Sep 13, 2016 at 4:03 PM, Niklas Söderlund
> wrote:
> > There are pins on the Salvator-X which is not part of a GPIO bank nor
>
>
On Tue, Sep 13, 2016 at 4:03 PM, Niklas Söderlund
wrote:
> Group the QSPI0 and QSPI1 pins into similar groups found in other sh-pfc
> drivers. The pins can not be muxed between functions other then QSPI
> but there drive strength can be controlled.
>
>
Hi Chris,
On Wednesday 05 Oct 2016 13:50:18 Chris Brandt wrote:
> > There are 34 compatible strings defined, one per UART + SoC combination,
> > plus a set of more generic ones. So far, the driver handles the r7s72100
> > compatible string separately as the UART on that chip is quite peculiar,
>
Hi Geert,
I've been offline some weeks, so sorry if I'm not completely up to date,
yet, or miss anything.
Overall, having a quick look, the proposal in this patch series and your
second series "arm64: renesas: r8a7795: R-Car H3 ES2.0 Prototype" looks
nice to me. At least much better than
Hi Geert,
On Wednesday 05 Oct 2016 13:25:12 Geert Uytterhoeven wrote:
> On Wed, Oct 5, 2016 at 12:28 PM, Laurent Pinchart wrote:
> > The SMP initialization function is only called if CONFIG_SMP is defined.
> > Remove the duplicate check.
> >
> > Signed-off-by: Laurent Pinchart
> >
On Wednesday 05 Oct 2016 12:03:24 Geert Uytterhoeven wrote:
> Hi Laurent,
>
> On Wed, Oct 5, 2016 at 11:55 AM, Laurent Pinchart
>
> wrote:
> > On Friday 30 Sep 2016 10:38:48 Geert Uytterhoeven wrote:
> >> On Thu, Sep 29, 2016 at 11:37 PM, Sergei Shtylyov
On Wednesday 05 Oct 2016 08:28:05 Rob Herring wrote:
> On Wed, Oct 5, 2016 at 4:55 AM, Laurent Pinchart
>
> wrote:
> > On Friday 30 Sep 2016 10:38:48 Geert Uytterhoeven wrote:
> >> On Thu, Sep 29, 2016 at 11:37 PM, Sergei Shtylyov wrote:
> >> > Renesas RZ/G
On Fri, Sep 30, 2016 at 12:25:29AM +0300, Sergei Shtylyov wrote:
> Renesas RZ/G SoC have the R-Car gen2 compatible IRQC interrupt controllers.
> Document RZ/G1[ME] (also known as R8A774[35]) SoC bindings.
>
> Signed-off-by: Sergei Shtylyov
Applied, thanks.
> There are 34 compatible strings defined, one per UART + SoC combination,
> plus a set of more generic ones. So far, the driver handles the r7s72100
> compatible string separately as the UART on that chip is quite peculiar,
> but for all other SoCs we only need to match against
Just FYI...
There
Hi team,
sorry for my frequent disturbance ..I am not getting HDMI out in Koelsche
Board with source tree 4.7.5...but it does in 3.10.31-ltsi..if you don't
mind,please provide me the patch to support HDMI in
4.7.5
Best Regards
Jithin T Raj
On Wed, Oct 5, 2016 at 4:55 AM, Laurent Pinchart
wrote:
> On Friday 30 Sep 2016 10:38:48 Geert Uytterhoeven wrote:
>> On Thu, Sep 29, 2016 at 11:37 PM, Sergei Shtylyov wrote:
>> > Renesas RZ/G SoC also have the SCIF, SCIFA, SCIFB, and HSCIF ports.
>> > Document
On Wednesday 05 Oct 2016 13:31:29 Laurent Pinchart wrote:
> The three SoCs use the exact same machine definition, consolidate them
> into a single one.
>
> Signed-off-by: Laurent Pinchart
> ---
> arch/arm/mach-shmobile/Makefile | 3 ---
>
Hello.
Here's the set of 3 patches against the 'clk-next' branch of CLK group's
'linux.git' repo. The R8A7743 SoC support will be posted separately later --
this series depend on the Kconfig variable introduced there, however, the DTs
in that series will depend on the patch #2 of this
Add macros usable by the device tree sources to reference the R8A7743 CPG
clocks by index.
Signed-off-by: Sergei Shtylyov
---
include/dt-bindings/clock/r8a7743-cpg-mssr.h | 43 +++
1 file changed, 43 insertions(+)
Index:
Add RZ/G1M (R8A7743) Clock Pulse Generator / Module Standby and Software
Reset support, using the CPG/MSSR driver core and the common R-Car Gen2
(and RZ/G) code.
Based on the proof-of-concept R8A7791 CPG/MSSR patch by Geert Uytterhoeven
.
Signed-off-by: Sergei Shtylyov
Add the common R-Car Gen2 (and RZ/G) Clock Pulse Generator / Module Standby
and Software Reset support code, using the CPG/MSSR driver core.
Based on the proof-of-concept R8A7791 CPG/MSSR patch by Geert Uytterhoeven
.
Signed-off-by: Sergei Shtylyov
Hello.
Here's the set of 11 patches against Simon Horman's 'renesas.git' repo's
'renesas-devel-20161003-v4.8' tag. I'm adding the device tree support for
the R8A7743-based SK-RZG1M board. The SoC is close to R8A7791 and the board
seems identical to the R8A7791/Porter board. The device tree
Add macros usable by the device tree sources to reference R8A7743 SYSC power
domains by index.
Based on the original (and large) patch by Dmitry Shifrin
.
Signed-off-by: Sergei Shtylyov
Reviewed-by: Geert Uytterhoeven
Add support for RZ/G1M (R8A7743) SoC power areas to the R-Car SYSC driver.
Based on the original (and large) patch by Dmitry Shifrin
.
Signed-off-by: Sergei Shtylyov
Reviewed-by: Geert Uytterhoeven
Add minimal support for the RZ/G1M (R8A7743) SoC.
Based on the original (and large) patch by Dmitry Shifrin
.
Signed-off-by: Sergei Shtylyov
Reviewed-by: Geert Uytterhoeven
---
Changes in version
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