Hi Kieran,
On Mon, Aug 14, 2017 at 7:07 PM, Kieran Bingham
wrote:
> Please consider pulling the following changes into renesas-drivers.
>
> This series is based upon a merge of my previous pa-improvements/v4 and
> airlied-drm/drm-next to base on top of
Hi Stephen,
On Fri, Jul 21, 2017 at 10:16 PM, Stephen Boyd wrote:
> On 04/20, Yoshihiro Kaneko wrote:
>> From: Takeshi Kihara
>>
>> This patch fixed the SD divider settiing for corresponding to the change
>> in the HS200/HS400 mode.
>>
>>
Hi Fabrizio,
On Tue, Aug 15, 2017 at 6:21 PM, Fabrizio Castro
wrote:
> Enable low-level debugging support for RZ/G1E (r8a7745). RZ/G1E uses
> SCIF4 for the debug console.
>
> Signed-off-by: Fabrizio Castro
> Reviewed-by: Chris
Hi Geert,
>>
>> This series is based upon a merge of my previous pa-improvements/v4 and
>> airlied-drm/drm-next to base on top of all pending VSP1 changes.
>
> OK, so I'll drop your vsp1/pa-improvements/v2.
That sounds reasonable :D
>>
On Wed, Aug 2, 2017 at 2:51 PM, Yoshihiro Shimoda
wrote:
> From: Takeshi Kihara
>
> This patch adds USB{0,1} (USB2.0 host) pins, groups and functions to
> R8A7796 SoC.
>
> Signed-off-by: Takeshi Kihara
On Wed, Aug 2, 2017 at 2:51 PM, Yoshihiro Shimoda
wrote:
> From: Takeshi Kihara
>
> This patch adds USB30 (USB3.0 host) pin, group and function to R8A7796
> SoC.
>
> Signed-off-by: Takeshi Kihara
>
Enable low-level debugging support for RZ/G1E (r8a7745). RZ/G1E uses
SCIF4 for the debug console.
Signed-off-by: Fabrizio Castro
Reviewed-by: Chris Paterson
---
Changes in v2:
- Keep the list sorted by physical address
On Wed, Aug 9, 2017 at 2:19 PM, Yoshihiro Shimoda
wrote:
> From: Takeshi Kihara
>
> This patch adds initial pinctrl driver to support for the R8A77995 SoC.
>
> Signed-off-by: Takeshi Kihara
>
Hi Shimoda-san,
On Wed, Aug 9, 2017 at 2:19 PM, Yoshihiro Shimoda
wrote:
> From: Takeshi Kihara
>
> This patch adds SCIF{0,1,2,3,4,5} pins, groups and functions to R8A77995
> SoC.
>
> Signed-off-by: Takeshi Kihara
On Wed, Jul 26, 2017 at 1:28 PM, Yoshihiro Shimoda
wrote:
> Since the latest datasheet revises the names, this patch changes
> the definitions from USB3_{OVC,PWEN} to USB2_CH3_{OVC,PWEN}.
>
> Signed-off-by: Yoshihiro Shimoda
On Wed, Aug 9, 2017 at 2:19 PM, Yoshihiro Shimoda
wrote:
> This follows the style of existion PORT_GP_X macros and
> will be used by a follow-up patch for the r8a77995 SoC.
>
> Extracted from the initial r8a77995 patch in the BSP by Takeshi Kihara.
>
>
Hi Shimoda-san,
On Wed, Aug 9, 2017 at 2:19 PM, Yoshihiro Shimoda
wrote:
> This follows the style of existion PORT_GP_X macros and
> will be used by a follow-up patch for the r8a77995 SoC.
Apparently PORT_GP_20 won't be used by the follow-up patches ;-)
But I
From: Biju Das
Define the iWave RainboW-G20D-Qseven board dependent part of the
RTC device node.
Signed-off-by: Biju Das
[chris: corrected bq32000 compatible string]
Signed-off-by: Chris Paterson
---
v1 -> v2
Added
On Wed, Jul 26, 2017 at 1:28 PM, Yoshihiro Shimoda
wrote:
> Add pins, groups, and functions for USB 2.0 on R-Car H3 ES2.0.
>
> Signed-off-by: Yoshihiro Shimoda
Reviewed-by: Geert Uytterhoeven
i.e.
Hi Shimoda-san, Kihara-san,
On Wed, Aug 9, 2017 at 2:19 PM, Yoshihiro Shimoda
wrote:
> From: Takeshi Kihara
>
> Signed-off-by: Takeshi Kihara
> Signed-off-by: Yoshihiro Shimoda
On Wed, Aug 9, 2017 at 2:19 PM, Yoshihiro Shimoda
wrote:
> From: Takeshi Kihara
>
> Signed-off-by: Takeshi Kihara
> Signed-off-by: Yoshihiro Shimoda
Reviewed-by:
On Fri, Jul 28, 2017 at 1:41 PM, Yoshihiro Kaneko wrote:
> From: Takeshi Kihara
>
> This patch fixes the implementation incorrect of MOD_SEL1 bit[25:24]
> value when STP_ISEN_1_D pin function is selected for IPSR17 bit[27:24].
>
> This is a
On Wed, Aug 9, 2017 at 2:19 PM, Yoshihiro Shimoda
wrote:
> From: Takeshi Kihara
>
> Signed-off-by: Takeshi Kihara
> Signed-off-by: Yoshihiro Shimoda
Reviewed-by:
Hi Shimoda-san, Kihara-san,
On Wed, Aug 9, 2017 at 2:19 PM, Yoshihiro Shimoda
wrote:
> From: Takeshi Kihara
>
> Signed-off-by: Takeshi Kihara
> Signed-off-by: Yoshihiro Shimoda
Renesas RZ/G1E (R8A7745) SoC GPIO blocks are identical to the R-Car Gen2
family. Add support for its GPIO controllers.
Signed-off-by: Biju Das <biju@bp.renesas.com>
---
This patch is tested against linux-next tag next-20170816 as well as gpio-devel.
Documentation/devicetree/binding
On Fri, Jul 28, 2017 at 1:41 PM, Yoshihiro Kaneko wrote:
> From: Takeshi Kihara
>
> This patch fixes the implementation incorrect of MOD_SEL2 bit26 value
> when SCK5_A pin function is selected for IPSR16 bit[31:28].
>
> This is a correction
On Fri, Jul 28, 2017 at 1:41 PM, Yoshihiro Kaneko wrote:
> From: Takeshi Kihara
>
> This patch fixes the implementation incorrect of IPSR register value
> definitions for NFDATA{0..13} and NF{ALE,CLE,WE_N,RE_N} pins function.
>
> This is a
On Fri, Jul 28, 2017 at 1:41 PM, Yoshihiro Kaneko wrote:
> From: Takeshi Kihara
>
> This patch fixes to set MOD_SEL2 bit19 when using TCLK2_A pin function is
> selected for IPSR16 bit[23:20] or using TCLK2_B pin function is selected
> for
On Fri, Jul 28, 2017 at 1:41 PM, Yoshihiro Kaneko wrote:
> From: Takeshi Kihara
>
> This patch fixes the macro definitions of FSCLKST pins function and IPSR7
> bit[15:12] register deleted.
>
> This is a correction because IPSR register
On Fri, Jul 28, 2017 at 1:41 PM, Yoshihiro Kaneko wrote:
> From: Takeshi Kihara
>
> This patch renames the pin function macro definitions of the GPSR1 and
> IPSR4 registers value for the CS1# pin.
>
> This is a correction because GPSR and
On 08/15/2017 07:00 PM, Simon Horman wrote:
Define the generic R8A7745 part of the PFC device node.
Signed-off-by: Sergei Shtylyov
Reviewed-by: Geert Uytterhoeven
It looks like the dependencies for this patch are met now [1].
On Fri, Jul 28, 2017 at 1:41 PM, Yoshihiro Kaneko wrote:
> From: Takeshi Kihara
>
> This patch fixes the implementation incorrect of IPSR register value
> definitions for FMCLK{_C,_D} and FMIN{_C,_D} pins function.
>
> This is a correction to
On Fri, Jul 28, 2017 at 1:41 PM, Yoshihiro Kaneko wrote:
> From: Takeshi Kihara
>
> This is a correction because MOD_SEL register specification for R8A7795
> ES2.0 SoC was changed in R-Car Gen3 Hardware User's Manual Rev.0.54E.
>
> Fixes:
On Wed, Aug 9, 2017 at 2:19 PM, Yoshihiro Shimoda
wrote:
> From: Takeshi Kihara
>
> Signed-off-by: Takeshi Kihara
> Signed-off-by: Yoshihiro Shimoda
Reviewed-by:
On Fri, Jul 28, 2017 at 1:41 PM, Yoshihiro Kaneko wrote:
> From: Takeshi Kihara
>
> This patch fixes SCIF_CLK_{A,B} pin's MOD_SEL assignment from MOD_SEL1
> bit11 to MOD_SEL1 bit10.
>
> This is a correction to the incorrect implementation of
On Wed, Aug 9, 2017 at 2:20 PM, Yoshihiro Shimoda
wrote:
> Signed-off-by: Yoshihiro Shimoda
Reviewed-by: Geert Uytterhoeven
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven --
This adds a new DT property to define the index used by a multiplexer to
select the device.
Signed-off-by: Ulrich Hecht
---
Documentation/devicetree/bindings/serial/slave-device.txt | 2 ++
1 file changed, 2 insertions(+)
diff --git
Adds serial port SCIF1 and the MAX9260 deserializers connected to it.
Signed-off-by: Ulrich Hecht
---
arch/arm/boot/dts/r8a7792-blanche.dts | 52 +++
1 file changed, 52 insertions(+)
diff --git
Adds an interface for slave device multiplexing using the mux subsystem.
Signed-off-by: Ulrich Hecht
---
drivers/tty/serdev/Kconfig | 1 +
drivers/tty/serdev/Makefile | 2 +-
drivers/tty/serdev/core.c | 13 -
drivers/tty/serdev/mux.c| 66
This driver implements tunnelling of i2c requests over GMSL via a
MAX9260 deserializer. It provides an i2c adapter that can be used
to reach devices on the far side of the link.
Signed-off-by: Ulrich Hecht
---
drivers/media/i2c/Kconfig | 6 +
On Wed, Jul 19, 2017 at 1:06 AM, Rob Herring wrote:
>> static inline struct serdev_controller *to_serdev_controller(struct device
>> *d)
>> @@ -172,7 +180,7 @@ static inline void serdev_controller_write_wakeup(struct
>> serdev_controller *ctrl
>> {
>> struct
On Mon, Jul 31, 2017 at 1:13 PM, Laurent Pinchart
wrote:
>> +static int max9260_probe(struct serdev_device *serdev)
>> +{
>> + struct max9260_device *dev;
>> + struct i2c_adapter *adap;
>> + int ret;
>> +
>> + dev = kzalloc(sizeof(*dev),
Adds serdev_device_set_parity() and an implementation for ttyport.
Signed-off-by: Ulrich Hecht
---
drivers/tty/serdev/core.c | 12
drivers/tty/serdev/serdev-ttyport.c | 18 ++
include/linux/serdev.h | 10
On Wed, Jul 19, 2017 at 5:00 PM, Wolfram Sang wrote:
>> +{
>> + wait_event_interruptible_timeout(dev->rx_wq,
>> + dev->rx_state <= RX_FRAME_ERROR,
>> + HZ/2);
>
> I'd suggest to drop the interruptible. It can be done but it is usually
> not trivial
Hi Ulrich,
Thank you for the patch.
On Wednesday 16 Aug 2017 15:22:28 Ulrich Hecht wrote:
> This adds a new DT property to define the index used by a multiplexer to
> select the device.
>
> Signed-off-by: Ulrich Hecht
> ---
>
Hi!
Here's a new version of serdev multiplexing support. Thanks to everybody who
commented; I think I have included all non-optional suggestions. :)
Changes are manifold, please refer to the changelog below.
This version drops "mux: include compiler.h from mux/consumer.h",
which is on its way
Hi Ulrich,
On Wednesday 16 Aug 2017 15:23:52 Ulrich Hecht wrote:
> On Wed, Jul 19, 2017 at 5:00 PM, Wolfram Sang wrote:
> >> +{
> >> + wait_event_interruptible_timeout(dev->rx_wq,
> >> + dev->rx_state <= RX_FRAME_ERROR,
> >> + HZ/2);
> >
> > I'd
Hi Kieran,
On Wed, Jun 14, 2017 at 10:23 PM, Kieran Bingham wrote:
> Please consider this pull request for the next renesas-drivers release.
>
> This driver is based on linux-media/master branch
>
> --
> Regards
>
> Kieran
>
> The following changes since commit
Hi Wolfram,
On Thu, Jun 15, 2017 at 9:25 PM, Wolfram Sang wrote:
> here is a topic branch for renesas-drivers adding better DMA support to
> the I2C core. It is based on i2c/for-next with the branch
> 'renesas/arm64-dt-for-v4.13' from Simon merged as well. Please pull.
>
>
Hi Laurent,
On Mon, Jun 26, 2017 at 8:58 PM, Laurent Pinchart
wrote:
> The following changes implement display support for the R-Car H3 ES2.0. They
> have been split in two distinct branches:
> - tags/drm-h3-es2-vsp-du-20170626 contains the VSP changes and is
Hi Wolfram,
On Tue, Jul 18, 2017 at 12:23 PM, Wolfram Sang
wrote:
> One helper checks if DMA is suitable and optionally creates a bounce
> buffer, if not. The other function returns the bounce buffer and makes
> sure the data is properly copied back to the
> Right:
>
> drivers/i2c/i2c-core-base.c:2310:15: error: 'i2c_release_bounce_buf'
> undeclared here (not in a function)
> EXPORT_SYMBOL_GPL(i2c_release_bounce_buf);
Thanks. I am just now working on V4 currently which is a redesign.
I'll write more in an hour or so.
signature.asc
On Mon, Jul 31, 2017 at 5:04 PM, Simon Horman
wrote:
> Renesas ARM Based SoC DT Bindings Updates for v4.14
>
> * Document R-Car D3 (r8a77995) SoC and Draak board
>
> * Document reserved SRAM for the SMP jump stub on R-Car Gen2 and RZ/G1 SoCs
>
> Geert Uytterhoeven
On Mon, Jul 31, 2017 at 5:03 PM, Simon Horman
wrote:
>
> Renesas ARM64 Based SoC DT Updates for v4.14
>
> * Add usb2.0 for R-Car H3 (r8a7795) ES2.0 SoC
>
> * Add R-Car D3 (r8a77995) SoC and Draak board
On line 149, it looks like one extal should instead be xtal.
julia
-- Forwarded message --
Date: Thu, 17 Aug 2017 02:43:28 +0800
From: kbuild test robot
To: kbu...@01.org
Cc: Julia Lawall
Subject:
On Thu, Aug 10, 2017 at 12:09 AM, Rob Herring wrote:
> On Tue, Jul 18, 2017 at 4:43 PM, Rob Herring wrote:
>> Now that we have a custom printf format specifier, convert users of
>> full_name to use %pOF instead. This is preparation to remove storing
>> of the
On Mon, Jul 31, 2017 at 5:04 PM, Simon Horman
wrote:
>
> Renesas ARM Based SoC Drivers Updates for v4.14
>
> Add R-Car D3 (r8a77995) support to the Renesas-specific SoC drivers
> - SoC identification
> -
I have pushed renesas-drivers-2017-08-16-v4.13-rc5 to
https://git.kernel.org/cgit/linux/kernel/git/geert/renesas-drivers.git
This tree is meant to ease development of platform support and drivers
for Renesas ARM SoCs. It is created by merging (a) the for-next branches
of various subsystem trees
On Mon, Jul 31, 2017 at 5:05 PM, Simon Horman
wrote:
>
> * Add debug-ll support to RZ/G1M (r8a7743) SoC
>
> Chris Paterson says, "RZ/G1M uses SCIF0 for the debug console, like most
> of the R-Car Gen2 SoCs."
>
> * Remove ARCH_SHMOBILE_MULTI
>
> Geert Uytterhoeven
Hi Jonathan,
> I like the basic idea of this patch set a lot btw!
Thanks!
> Jonathan
Could you delete irrelevant parts of the message, please? I nearly
missed your other comment which would have been a great loss!
> I'm trying to get my head around whether this is a sufficient set of
>
On Mon, Jul 31, 2017 at 5:19 PM, Simon Horman
wrote:
> Renesas ARM Based SoC DT Updates for v4.14
>
> Changes of note:
>
> * Add pin controller support to the RZ/G1M (r8a7743) SoC and
> RZ/A1 (r7s72100) SoCs now that the driver is available in v4.13-rc1.
>
> * Add
Hi Kieran,
Thank you for the patch.
On Monday 14 Aug 2017 16:13:24 Kieran Bingham wrote:
> The fragment write function relies on the code never asking it to
> write more than the entries available in the list.
>
> Currently with each list body containing 256 entries, this is fine,
> but we can
On Thu, Aug 10, 2017 at 12:06 AM, Rob Herring wrote:
> On Fri, Jul 21, 2017 at 2:28 PM, Rob Herring wrote:
>> Now that we have a custom printf format specifier, convert users of
>> full_name to use %pOF instead. This is preparation to remove storing
>> of the
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