Hi,
This is intended as a submission to LTSI-4.14. It is the backport
of a fixes for safe DMA buffer handling for the SH-Mobile I2C driver
and I2C code. All patches are present in v4.19-rc3.
This pull-request is based on
"[GIT PULL LTSI-4.14] LTSI-v4.14 Backport or I2C R-Car Fix"
tagged as
The PMIC and EEPROM can operate at 400kHz, so use this speed.
Signed-off-by: Wolfram Sang
---
RFC because I couldn't find docs for the PMIC. Tests showed that it does
work at 400kHz (checksuming over 256 byte reads). Geert, do you happen
to have docs? Other than that, for the EEPROM it also
Hi Simon,
On Tue, Sep 18, 2018 at 10:51 AM Simon Horman wrote:
> This is intended as a submission to LTSI-4.14. It is the backport
> of a fixes for safe DMA buffer handling for the SH-Mobile I2C driver
> and I2C code. All patches are present in v4.19-rc3.
>
> This pull-request is based on
>
From: Hiromitsu Yamasaki
This patch adds the R-Car E3 serial documentation.
Signed-off-by: Hiromitsu Yamasaki
Signed-off-by: Wolfram Sang
---
I cannot test this. But we have other devices added for E3 meanwhile, so
people surely used a console to do that? Can somebody confirm this?
After
On Tue, May 22, 2018 at 12:05:14AM +0200, Marek Vasut wrote:
> From: Phil Edworthy
>
> The PCIe DMA controller on RCar Gen2 and earlier is on 32bit bus,
> so limit the DMA range to 32bit.
>
> Signed-off-by: Phil Edworthy
> Signed-off-by: Marek Vasut
> Cc: Arnd Bergmann
> Cc: Geert
On Wed, Sep 12, 2018 at 12:42 PM Fabrizio Castro
wrote:
> Add all RZ/G2E (a.k.a. R8A774C0) Clock Pulse Generator Core
> Clock Outputs, as listed in Table 8.2g ("List of Clocks
> [RZ/G2E]") of the RZ/G2 Hardware User's Manual.
>
> Signed-off-by: Fabrizio Castro
> Reviewed-by: Biju Das
On Wed, Sep 12, 2018 at 12:42 PM Fabrizio Castro
wrote:
> This patch documents RZ/G2E (a.k.a. R8A774C0) bindings for the
> Clock Pulse Generator driver.
>
> Signed-off-by: Fabrizio Castro
> Reviewed-by: Biju Das
Reviewed-by: Geert Uytterhoeven
i.e. will queue in clk-renesas-for-v4.20.
Hi Chris,
CC linux-clk
On Mon, Sep 17, 2018 at 8:57 PM Chris Brandt wrote:
> On Friday, September 14, 2018, Geert Uytterhoeven wrote:
> > > Just FYI, for the heck of it, I tried and hacked in registering the
> > > clock driver using CLK_OF_DECLARE since that happens before the
> > >
Hi Geert,
On Tuesday, September 18, 2018 1, Geert Uytterhoeven wrote:
> > So I see what the mediatek is doing, but I can't seem to reproduce it.
> I
> > must be missing something.
>
> It's using CLK_OF_DECLARE_DRIVER(), which clears OF_POPULATED:
Yup, that's what I was missing.
Works now.
Hi Geert,
On Tuesday, September 18, 2018 1, Geert Uytterhoeven wrote:
> > What do you see the .dtsi and .dts looking like?
>
> The part using CLK_OF_DECLARE() is not a platform driver. It does not
> operate on a device (struct platform_device), but on a device node
> (struct
> device_node).
Hi Chris,
On Tue, Sep 18, 2018 at 5:52 PM Chris Brandt wrote:
> On Tuesday, September 18, 2018 1, Geert Uytterhoeven wrote:
> > > What do you see the .dtsi and .dts looking like?
> >
> > The part using CLK_OF_DECLARE() is not a platform driver. It does not
> > operate on a device (struct
On Tue, Sep 18, 2018 at 11:15:55AM +0100, Lorenzo Pieralisi wrote:
> On Tue, May 22, 2018 at 12:05:14AM +0200, Marek Vasut wrote:
> > From: Phil Edworthy
> >
> > The PCIe DMA controller on RCar Gen2 and earlier is on 32bit bus,
> > so limit the DMA range to 32bit.
> >
> > Signed-off-by: Phil
Hi Wolfram,
On Tue, Sep 18, 2018 at 12:09 PM Wolfram Sang
wrote:
> From: Hiromitsu Yamasaki
>
> This patch adds the R-Car E3 serial documentation.
>
> Signed-off-by: Hiromitsu Yamasaki
> Signed-off-by: Wolfram Sang
Reviewed-by: Geert Uytterhoeven
> ---
>
> I cannot test this. But we have
On 09/05/2018 01:55 PM, Geert Uytterhoeven wrote:
> Hi Marek,
>
> On Mon, Jun 11, 2018 at 2:15 PM Marek Vasut wrote:
>> Rather than hard-coding the quirk topology, which stopped scaling,
>> parse the information from DT. The code looks for all compatible
>> PMICs -- da9063 and da9210 -- and
Rather than hard-coding the quirk topology, which stopped scaling,
parse the information from DT. The code looks for all compatible
PMICs -- da9063 and da9210 -- and checks if their IRQ line is tied
to the same pin. If so, the code sends a matching sequence to the
PMIC to deassert the IRQ.
On Wed, Sep 12, 2018 at 12:42 PM Fabrizio Castro
wrote:
> Add RZ/G2E (R8A774C0) Clock Pulse Generator / Module Standby and
> Software Reset support.
>
> Based on Table 8.2g of "RZ/G Series, 2nd Generation User's Manual:
> Hardware (Rev. 0.61, June 12, 2018)".
>
> Signed-off-by: Fabrizio Castro
>
Hi Geert,
On Tuesday, September 18, 2018, linux-renesas-soc-ow...@vger.kernel.org wrote:
> > I've coded this up and it works fine.
>
> While I don't doubt this works fine, your DT is no longer describing
> hardware, but also software policy.
>
> I think the proper solution, maximizing code
Dear All,
this series adds I2C4/DU0/QSPI0/SDHI2/USB0/USB1 pin groups and
functions to the RZ/G1C (a.k.a. r8a77470).
Thanks,
Fab
Fabrizio Castro (5):
pinctrl: sh-pfc: r8a77470: Add I2C4 pin groups
pinctrl: sh-pfc: r8a77470: Add DU0 pin groups
pinctrl: sh-pfc: r8a77470: Add QSPI0 pin groups
Add I2C4 pin groups and function to the R8A77470 SoC.
Signed-off-by: Fabrizio Castro
Reviewed-by: Biju Das
---
drivers/pinctrl/sh-pfc/pfc-r8a77470.c | 51 +++
1 file changed, 51 insertions(+)
diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a77470.c
Add QSPI0 pin groups and function to the R8A77470 SoC.
Signed-off-by: Fabrizio Castro
Reviewed-by: Biju Das
---
drivers/pinctrl/sh-pfc/pfc-r8a77470.c | 34 ++
1 file changed, 34 insertions(+)
diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a77470.c
Add DU0 pin groups and function to the R8A77470 SoC.
Signed-off-by: Fabrizio Castro
Reviewed-by: Biju Das
---
drivers/pinctrl/sh-pfc/pfc-r8a77470.c | 109 ++
1 file changed, 109 insertions(+)
diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a77470.c
Add SDHI2 pin groups and functions to the R8A77470 SoC.
Signed-off-by: Fabrizio Castro
Reviewed-by: Biju Das
---
drivers/pinctrl/sh-pfc/pfc-r8a77470.c | 51 +++
1 file changed, 51 insertions(+)
diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a77470.c
Add USB[01] pin groups and functions to the R8A77470 SoC.
Signed-off-by: Fabrizio Castro
Reviewed-by: Biju Das
---
drivers/pinctrl/sh-pfc/pfc-r8a77470.c | 30 ++
1 file changed, 30 insertions(+)
diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a77470.c
On Tue, Sep 18, 2018 at 2:23 PM Marek Vasut wrote:
> Rather than hard-coding the quirk topology, which stopped scaling,
> parse the information from DT. The code looks for all compatible
> PMICs -- da9063 and da9210 -- and checks if their IRQ line is tied
> to the same pin. If so, the code sends
Hi Chris,
On Tue, Sep 18, 2018 at 1:55 PM Chris Brandt wrote:
> On Tuesday, September 18, 2018, linux-renesas-soc-ow...@vger.kernel.org wrote:
> > > I've coded this up and it works fine.
> >
> > While I don't doubt this works fine, your DT is no longer describing
> > hardware, but also software
Hi Geert,
On Tuesday, September 18, 2018, Geert Uytterhoeven wrote:
> Then the early init from CLK_OF_DECLARE() will just register the
> early clocks, and cpg_mssr_probe() can take care of the remaining parts?
What is not clear to me is what goes in DT
I will have this in .dtsi for
Hi Chris,
On Tue, Sep 18, 2018 at 5:04 PM Chris Brandt wrote:
> On Tuesday, September 18, 2018, Geert Uytterhoeven wrote:
> > Then the early init from CLK_OF_DECLARE() will just register the
> > early clocks, and cpg_mssr_probe() can take care of the remaining parts?
>
> What is not clear to me
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