RE: [PATCH 5/8] pinctrl: sh-pfc: r8a77995: Add EthernetAVB pins, groups and functions
Hi Geert-san,
> -Original Message-
> From: Yoshihiro Shimoda
> Sent: Wednesday, August 30, 2017 10:14 PM
>
> Hi Geert-san,
>
> Sorry, I also missed this email...
>
> > -Original Message-
> > From: Geert Uytterhoeven
> > Sent: Wednesday, August 16, 2017 8:06 PM
> >
> > Hi Shimoda-san, Kihara-san,
> >
> > On Wed, Aug 9, 2017 at 2:19 PM, Yoshihiro Shimoda
> > wrote:
> > > From: Takeshi Kihara
> > >
> > > Signed-off-by: Takeshi Kihara
> > > Signed-off-by: Yoshihiro Shimoda
> >
> > Reviewed-by: Geert Uytterhoeven
> >
> > But before I apply this, please see my question below...
> >
> > > --- a/drivers/pinctrl/sh-pfc/pfc-r8a77995.c
> > > +++ b/drivers/pinctrl/sh-pfc/pfc-r8a77995.c
> >
> > > +static const char * const avb0_groups[] = {
> > > + "avb0_td",
> > > + "avb0_rd",
> > > + "avb0_tx_ctl",
> > > + "avb0_rx_ctl",
> > > + "avb0_txc",
> > > + "avb0_rxc",
> > > + "avb0_txcrefclk",
> > > + "avb0_link",
> > > + "avb0_magic",
> > > + "avb0_phy_int",
> > > + "avb0_mdc",
> > > + "avb0_mdio",
> > > + "avb0_avtp_pps_a",
> > > + "avb0_avtp_match_a",
> > > + "avb0_avtp_capture_a",
> > > + "avb0_avtp_pps_b",
> > > + "avb0_avtp_match_b",
> > > + "avb0_avtp_capture_b",
> > > +};
> >
> > Is there any specific reason this uses a different split than the
> > EtherAVB groups
> > in pinctrl drivers for other SoCs?
>
> I will check this tomorrow (or later...).
I asked Kihara-san about this and he doesn't know other SoC (r8a7795) has mii
group.
So, I will modify the patch like r8a7795's group.
But...
> > Note that I do understand that the different prefix ("avb0" vs. "avb")
> > was used to
> > match the R-Car D3 datasheet, which is thus OK.
I checked this on the datasheet, but it seems error in it.
PFC section names "AVB0", but Ethernet AVB section names "AVB".
So, I'm asking hw team about this. After I got reply from them,
I will send v2 patch.
Best regards,
Yoshihiro Shimoda
> > Thanks!
> >
> > Gr{oetje,eeting}s,
> >
> > Geert
> >
> > --
> > Geert Uytterhoeven -- There's lots of Linux beyond ia32 --
> > ge...@linux-m68k.org
> >
> > In personal conversations with technical people, I call myself a hacker. But
> > when I'm talking to journalists I just say "programmer" or something like
> > that.
> > -- Linus Torvalds
RE: [PATCH 5/8] pinctrl: sh-pfc: r8a77995: Add EthernetAVB pins, groups and functions
Hi Geert-san,
Sorry, I also missed this email...
> -Original Message-
> From: Geert Uytterhoeven
> Sent: Wednesday, August 16, 2017 8:06 PM
>
> Hi Shimoda-san, Kihara-san,
>
> On Wed, Aug 9, 2017 at 2:19 PM, Yoshihiro Shimoda
> wrote:
> > From: Takeshi Kihara
> >
> > Signed-off-by: Takeshi Kihara
> > Signed-off-by: Yoshihiro Shimoda
>
> Reviewed-by: Geert Uytterhoeven
>
> But before I apply this, please see my question below...
>
> > --- a/drivers/pinctrl/sh-pfc/pfc-r8a77995.c
> > +++ b/drivers/pinctrl/sh-pfc/pfc-r8a77995.c
>
> > +static const char * const avb0_groups[] = {
> > + "avb0_td",
> > + "avb0_rd",
> > + "avb0_tx_ctl",
> > + "avb0_rx_ctl",
> > + "avb0_txc",
> > + "avb0_rxc",
> > + "avb0_txcrefclk",
> > + "avb0_link",
> > + "avb0_magic",
> > + "avb0_phy_int",
> > + "avb0_mdc",
> > + "avb0_mdio",
> > + "avb0_avtp_pps_a",
> > + "avb0_avtp_match_a",
> > + "avb0_avtp_capture_a",
> > + "avb0_avtp_pps_b",
> > + "avb0_avtp_match_b",
> > + "avb0_avtp_capture_b",
> > +};
>
> Is there any specific reason this uses a different split than the
> EtherAVB groups
> in pinctrl drivers for other SoCs?
I will check this tomorrow (or later...).
Best regards,
Yoshihiro Shimoda
> Note that I do understand that the different prefix ("avb0" vs. "avb")
> was used to
> match the R-Car D3 datasheet, which is thus OK.
>
> Thanks!
>
> Gr{oetje,eeting}s,
>
> Geert
>
> --
> Geert Uytterhoeven -- There's lots of Linux beyond ia32 --
> ge...@linux-m68k.org
>
> In personal conversations with technical people, I call myself a hacker. But
> when I'm talking to journalists I just say "programmer" or something like
> that.
> -- Linus Torvalds
Re: [PATCH 5/8] pinctrl: sh-pfc: r8a77995: Add EthernetAVB pins, groups and functions
Hi Shimoda-san, Kihara-san,
On Wed, Aug 9, 2017 at 2:19 PM, Yoshihiro Shimoda
wrote:
> From: Takeshi Kihara
>
> Signed-off-by: Takeshi Kihara
> Signed-off-by: Yoshihiro Shimoda
Reviewed-by: Geert Uytterhoeven
But before I apply this, please see my question below...
> --- a/drivers/pinctrl/sh-pfc/pfc-r8a77995.c
> +++ b/drivers/pinctrl/sh-pfc/pfc-r8a77995.c
> +static const char * const avb0_groups[] = {
> + "avb0_td",
> + "avb0_rd",
> + "avb0_tx_ctl",
> + "avb0_rx_ctl",
> + "avb0_txc",
> + "avb0_rxc",
> + "avb0_txcrefclk",
> + "avb0_link",
> + "avb0_magic",
> + "avb0_phy_int",
> + "avb0_mdc",
> + "avb0_mdio",
> + "avb0_avtp_pps_a",
> + "avb0_avtp_match_a",
> + "avb0_avtp_capture_a",
> + "avb0_avtp_pps_b",
> + "avb0_avtp_match_b",
> + "avb0_avtp_capture_b",
> +};
Is there any specific reason this uses a different split than the
EtherAVB groups
in pinctrl drivers for other SoCs?
Note that I do understand that the different prefix ("avb0" vs. "avb")
was used to
match the R-Car D3 datasheet, which is thus OK.
Thanks!
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- ge...@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
[PATCH 5/8] pinctrl: sh-pfc: r8a77995: Add EthernetAVB pins, groups and functions
From: Takeshi Kihara
Signed-off-by: Takeshi Kihara
Signed-off-by: Yoshihiro Shimoda
---
drivers/pinctrl/sh-pfc/pfc-r8a77995.c | 178 ++
1 file changed, 178 insertions(+)
diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a77995.c
b/drivers/pinctrl/sh-pfc/pfc-r8a77995.c
index 96c97ff..9eb0cef 100644
--- a/drivers/pinctrl/sh-pfc/pfc-r8a77995.c
+++ b/drivers/pinctrl/sh-pfc/pfc-r8a77995.c
@@ -936,6 +936,144 @@ enum {
PINMUX_GPIO_GP_ALL(),
};
+/* - EtherAVB ---
*/
+static const unsigned int avb0_td_pins[] = {
+ /*
+* AVB0_TD0, AVB0_TD1,
+* AVB0_TD2, AVB0_TD3,
+*/
+ RCAR_GP_PIN(5, 11), RCAR_GP_PIN(5, 12),
+ RCAR_GP_PIN(5, 13), RCAR_GP_PIN(5, 14),
+};
+static const unsigned int avb0_td_mux[] = {
+ AVB0_TD0_MARK, AVB0_TD1_MARK,
+ AVB0_TD2_MARK, AVB0_TD3_MARK,
+};
+static const unsigned int avb0_rd_pins[] = {
+ /*
+* AVB0_RD0, AVB0_RD1,
+* AVB0_RD2, AVB0_RD3,
+*/
+ RCAR_GP_PIN(5, 5), RCAR_GP_PIN(5, 6),
+ RCAR_GP_PIN(5, 7), RCAR_GP_PIN(5, 8),
+};
+static const unsigned int avb0_rd_mux[] = {
+ AVB0_RD0_MARK, AVB0_RD1_MARK,
+ AVB0_RD2_MARK, AVB0_RD3_MARK,
+};
+static const unsigned int avb0_tx_ctl_pins[] = {
+ /* AVB0_TX_CTL */
+ RCAR_GP_PIN(5, 9),
+};
+static const unsigned int avb0_tx_ctl_mux[] = {
+ AVB0_TX_CTL_MARK,
+};
+static const unsigned int avb0_rx_ctl_pins[] = {
+ /* AVB0_RX_CTL */
+ RCAR_GP_PIN(5, 3),
+};
+static const unsigned int avb0_rx_ctl_mux[] = {
+ AVB0_RX_CTL_MARK,
+};
+static const unsigned int avb0_txc_pins[] = {
+ /* AVB0_TXC */
+ RCAR_GP_PIN(5, 10),
+};
+static const unsigned int avb0_txc_mux[] = {
+ AVB0_TXC_MARK,
+};
+static const unsigned int avb0_rxc_pins[] = {
+ /* AVB0_RXC */
+ RCAR_GP_PIN(5, 4),
+};
+static const unsigned int avb0_rxc_mux[] = {
+ AVB0_RXC_MARK,
+};
+static const unsigned int avb0_txcrefclk_pins[] = {
+ /* AVB0_TXCREFCLK */
+ RCAR_GP_PIN(5, 15),
+};
+static const unsigned int avb0_txcrefclk_mux[] = {
+ AVB0_TXCREFCLK_MARK,
+};
+static const unsigned int avb0_link_pins[] = {
+ /* AVB0_LINK */
+ RCAR_GP_PIN(5, 20),
+};
+static const unsigned int avb0_link_mux[] = {
+ AVB0_LINK_MARK,
+};
+static const unsigned int avb0_magic_pins[] = {
+ /* AVB0_MAGIC */
+ RCAR_GP_PIN(5, 18),
+};
+static const unsigned int avb0_magic_mux[] = {
+ AVB0_MAGIC_MARK,
+};
+static const unsigned int avb0_phy_int_pins[] = {
+ /* AVB0_PHY_INT */
+ RCAR_GP_PIN(5, 19),
+};
+static const unsigned int avb0_phy_int_mux[] = {
+ AVB0_PHY_INT_MARK,
+};
+static const unsigned int avb0_mdc_pins[] = {
+ /* AVB0_MDC */
+ RCAR_GP_PIN(5, 17),
+};
+static const unsigned int avb0_mdc_mux[] = {
+ AVB0_MDC_MARK,
+};
+static const unsigned int avb0_mdio_pins[] = {
+ /* AVB0_MDIO */
+ RCAR_GP_PIN(5, 16),
+};
+static const unsigned int avb0_mdio_mux[] = {
+ AVB0_MDIO_MARK,
+};
+static const unsigned int avb0_avtp_pps_a_pins[] = {
+ /* AVB0_AVTP_PPS_A */
+ RCAR_GP_PIN(5, 2),
+};
+static const unsigned int avb0_avtp_pps_a_mux[] = {
+ AVB0_AVTP_PPS_A_MARK,
+};
+static const unsigned int avb0_avtp_match_a_pins[] = {
+ /* AVB0_AVTP_MATCH_A */
+ RCAR_GP_PIN(5, 1),
+};
+static const unsigned int avb0_avtp_match_a_mux[] = {
+ AVB0_AVTP_MATCH_A_MARK,
+};
+static const unsigned int avb0_avtp_capture_a_pins[] = {
+ /* AVB0_AVTP_CAPTURE_A */
+ RCAR_GP_PIN(5, 0),
+};
+static const unsigned int avb0_avtp_capture_a_mux[] = {
+ AVB0_AVTP_CAPTURE_A_MARK,
+};
+static const unsigned int avb0_avtp_pps_b_pins[] = {
+ /* AVB0_AVTP_PPS_B */
+ RCAR_GP_PIN(4, 16),
+};
+static const unsigned int avb0_avtp_pps_b_mux[] = {
+ AVB0_AVTP_PPS_B_MARK,
+};
+static const unsigned int avb0_avtp_match_b_pins[] = {
+ /* AVB0_AVTP_MATCH_B */
+ RCAR_GP_PIN(4, 18),
+};
+static const unsigned int avb0_avtp_match_b_mux[] = {
+ AVB0_AVTP_MATCH_B_MARK,
+};
+static const unsigned int avb0_avtp_capture_b_pins[] = {
+ /* AVB0_AVTP_CAPTURE_B */
+ RCAR_GP_PIN(4, 17),
+};
+static const unsigned int avb0_avtp_capture_b_mux[] = {
+ AVB0_AVTP_CAPTURE_B_MARK,
+};
+
/* - I2C
*/
static const unsigned int i2c0_pins[] = {
/* SCL, SDA */
@@ -1165,6 +1303,24 @@ enum {
};
static const struct sh_pfc_pin_group pinmux_groups[] = {
+ SH_PFC_PIN_GROUP(avb0_td),
+ SH_PFC_PIN_GROUP(avb0_rd),
+ SH_PFC_PIN_GROUP(avb0_tx_ctl),
+ SH_PFC_PIN_GROUP(avb0_rx_ctl),
+ SH_PFC_PIN_GROUP(avb0_txc),
+ SH_PFC_PIN_GROUP(avb0_rxc),
+ SH_PFC_PIN_GROUP(avb0_txcrefclk),
+ SH_PFC_PIN_GROUP(avb0_link),
+ SH_PFC_PIN_GROUP(avb0_magic),
+ SH_PFC_PIN_GROUP(avb0_phy_int),
+ SH_P
