2010/7/21 Kukjin Kim kgene@samsung.com:
From: Atul Dahiya atul.dah...@samsung.com
This Patch updates existing Samsung RTC driver for clock enabling support.
Signed-off-by: Atul Dahiya atul.dah...@samsung.com
Signed-off-by: Kukjin Kim kgene@samsung.com
---
drivers/rtc/rtc-s3c.c |
Hello,
On Thursday, July 22, 2010 1:12 AM
On Fri, 16 Jul 2010 08:24:26 +0200
Marek Szyprowski m.szyprow...@samsung.com wrote:
arch/arm/mach-s3c64xx/setup-sdhci-gpio.c | 14 +---
arch/arm/mach-s5pc100/setup-sdhci-gpio.c | 21 ++
-
prepared against linux-next kernel tree from 20100722.
Changes since V3:
- renamed patch to avoid confusion with the patch for the s3c-sdhci driver
itself - added (platform part) in subject
Changes since V2:
- added support for HSMMC3 device
Changes since V1:
- added support for gpio external
On some Samsung SoCs not all SDHCI controllers have card detect (CD)
line. For some embedded designs it is not even needed, because ususally
the device (like SDIO flash memory or wifi controller) is permanently
wired to the controller. There are also systems which have a card detect
line connected
S5PV210 CPUFREQ Initial Support.
This is a series of patches to enable CPUFREQ for S5PV210.
Although this works without PMIC's DVS support, it is not
as effective without DVS support as supposed. AVS is not
supported in this version.
MyungJoo Ham (7):
ARM: S5PV210: Allow to probe whether
Early products of S5PV210 had several errata that require kernel to
avoid using some parts/instructions of the CPU or to add protection
instructions. There are products with such early production CPUs;
thus, we want to distinguish them in kernel. This patch is to
distinguish such products.
S5PV210 requires msys/dsys info as well; thus, we've included those at
struct s3c_freq, which is used by CPUFREQ of S5PV210.
Signed-off-by: MyungJoo Ham myungjoo@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
---
arch/arm/plat-samsung/include/plat/cpu-freq.h |6 ++
The CPUFREQ driver requires an access to DMCx registers. We
define virtual addresses of DMCx registers.
Signed-off-by: MyungJoo Ham myungjoo@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
---
arch/arm/plat-s5p/include/plat/map-s5p.h |3 +++
1 files changed, 3
Previously, most of CLK_DIV/SRC register accessing mask and shift
values were used at arch/arm/mach-s5pv210/clock.c only; thus we
had not been using macros for these. However, as CPUFREQ uses
those shift and mask values as well, we'd better define them at a single
location, whose proper location
On Thu, Jul 22, 2010 at 06:22:53PM +0900, MyungJoo Ham wrote:
S5PV210 CPUFREQ Support.
This CPUFREQ may work without PMIC's DVS support. However, it is not
as effective without DVS support as supposed. AVS is not supported in
this version.
Note that CLK_SRC of some clocks including
On Tue, 2010-07-20 at 08:07 +0200, Marek Szyprowski wrote:
From: MyungJoo Ham myungjoo@samsung.com
Two issues are addressed for max8998_set_voltage function.
1. Min/Max Voltage.
max8998_set_voltage had been using the voltage value of
min ( voltage[i] = max_vol , i )
can be merged as well.
The patch has been prepared against linux-next kernel tree from 20100722.
Changes since V3:
- renamed patch to avoid confusion with the patch for the s3c-sdhci driver
itself - added (platform part) in subject
Changes since V2:
- added support for HSMMC3 device
these changes to platform specific code gets merged soon, so the
changes to the driver can be merged as well.
The patch has been prepared against linux-next kernel tree from 20100722.
Changes since V3:
- renamed patch to avoid confusion with the patch for the s3c-sdhci
driver
itself - added
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