S5PV210 requires msys/dsys info as well; thus, we've included those at
struct s3c_freq, which is used by CPUFREQ of S5PV210.
Signed-off-by: MyungJoo Ham myungjoo@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
---
arch/arm/plat-samsung/include/plat/cpu-freq.h |6 ++
CPUFREQ of S5PV210 uses different APLL settings according to
different CPU frequencies. We provide such settings values for
CPUFREQ at pll.h.
Note that at 1GHz of ARMCLK, APLL should be 1GHz and for other lower
ARMCLK, APLL should be 800MHz.
Signed-off-by: MyungJoo Ham myungjoo@samsung.com
The CPUFREQ driver requires an access to DMCx registers. We
define virtual addresses of DMCx registers.
Signed-off-by: MyungJoo Ham myungjoo@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
---
arch/arm/plat-s5p/include/plat/map-s5p.h |3 +++
1 files changed, 3
S5PV210 CPUFREQ Initial Support.
This is a series of patches to enable CPUFREQ for S5PV210.
Although this works without PMIC's DVS support, it is not
as effective without DVS support as supposed. AVS is not
supported in this version.
At the patch revision v5, the following patches are updated
Previously, most of CLK_DIV/SRC register accessing mask and shift
values were used at arch/arm/mach-s5pv210/clock.c only; thus we
had not been using macros for these. However, as CPUFREQ uses
those shift and mask values as well, we'd better define them at a single
location, whose proper location
S5PV210 CPUFREQ Support.
This CPUFREQ may work without PMIC's DVS support. However, it is not
as effective without DVS support as supposed. AVS is not supported in
this version.
Note that CLK_SRC of some clocks including ARMCLK, G3D, G2D, MFC,
and ONEDRAM are modified directly without updating
Hello.
MyungJoo Ham wrote:
CPUFREQ of S5PV210 uses different APLL settings according to
different CPU frequencies. We provide such settings values for
CPUFREQ at pll.h.
Note that at 1GHz of ARMCLK, APLL should be 1GHz and for other lower
ARMCLK, APLL should be 800MHz.
Signed-off-by:
S3C SDHCI host controller can change the source for generating mmc
clock. By default host bus clock is used, what causes some problems on
machines with 133MHz bus, because the SDHCI divider cannot be as high
get proper clock value for identification mode. This is not a problem
for the controller,
Hello,
This is an updated version of the patches I've sent yesterday. I've
fixed issues reported by Maurus Cuelenaere and Ben Dooks.
This patch series includes various updates to sdhci-s3c driver. The
patches has been rebased onto latest -mm kernel tree from
git://zen-kernel.org/kernel/mmotm.git
On some Samsung SoCs not all SDHCI controllers have card detect (CD)
line. For some embedded designs it is not even needed, because ususally
the device (like SDIO flash memory or wifi controller) is permanently
wired to the controller. There are also systems which have a card detect
line connected
This patch adds support for regulator API to sdhci core driver. Regulators
can be used to disable power in suspended state to reduce dissipated
energy.
Signed-off-by: Marek Szyprowski m.szyprow...@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
---
Changes since V1:
- moved
On Thu, Jul 29, 2010 at 02:34:35PM +0200, Marek Szyprowski wrote:
This patch adds support for regulator API to sdhci core driver. Regulators
can be used to disable power in suspended state to reduce dissipated
energy.
Signed-off-by: Marek Szyprowski m.szyprow...@samsung.com
Signed-off-by:
On Wed, Jul 28, 2010 at 12:04:44PM +0900, Chanwoo Choi wrote:
+static struct regulator_consumer_supply wm8994_fixed_voltage0_supplies[] = {
+ {
+ .dev_name = 5-001a,
+ .supply = DBVDD,
+ }, {
+ .dev_name = 5-001a,
+
On Thu, Jul 29, 2010 at 6:42 PM, Kukjin Kim kgene@samsung.com wrote:
From: Naveen Krishna Ch ch.nav...@samsung.com
This patch adds HAVE_S3C2410_I2C to control inclusion of I2C bus driver
on Samsung SoCs and makes I2C bus driver dependency SoC specific instead
of machine specific. This
Kyungmin Park wrote:
On Thu, Jul 29, 2010 at 6:42 PM, Kukjin Kim kgene@samsung.com wrote:
From: Naveen Krishna Ch ch.nav...@samsung.com
This patch adds HAVE_S3C2410_I2C to control inclusion of I2C bus driver
on Samsung SoCs and makes I2C bus driver dependency SoC specific instead
On Fri, Jul 30, 2010 at 10:03 AM, Kukjin Kim kgene@samsung.com wrote:
Kyungmin Park wrote:
On Thu, Jul 29, 2010 at 6:42 PM, Kukjin Kim kgene@samsung.com wrote:
From: Naveen Krishna Ch ch.nav...@samsung.com
This patch adds HAVE_S3C2410_I2C to control inclusion of I2C bus driver
-Original Message-
From: kyungmi...@gmail.com [mailto:kyungmi...@gmail.com] On Behalf Of
Kyungmin Park
Sent: Friday, July 30, 2010 11:43 AM
To: Kukjin Kim
Cc: linux-arm-ker...@lists.infradead.org;
linux-samsung-soc@vger.kernel.org;
linux-...@vger.kernel.org; ben-li...@fluff.org;
17 matches
Mail list logo
