Marek Szyprowski wrote:
>
> Hello,
>
Hi :-)
> This short patch series performs a little cleanup in clock source
> definitions for S5PC100 and S5PV210 SoCs.
>
> A complete list of patches:
> [PATCH 1/2] ARM: S5PC100: cleanup hsmmc clock definitions
> [PATCH 2/2] ARM: S5PV210: cleanup hsmmc clock
Acked-by: Kyungmin Park
On Thu, Aug 5, 2010 at 8:07 AM, Kukjin Kim wrote:
> This patch fixes on inclusion to .
>
> Signed-off-by: Kukjin Kim
> Cc: Ben Dooks
> ---
> arch/arm/mach-s3c64xx/dev-audio.c | 2 +-
> arch/arm/mach-s3c64xx/dev-spi.c | 2 +-
> arch/arm/mach-s3c64
This patch fixes on inclusion to .
Signed-off-by: Kukjin Kim
Cc: Ben Dooks
---
arch/arm/mach-s3c64xx/dev-audio.c|2 +-
arch/arm/mach-s3c64xx/dev-spi.c |2 +-
arch/arm/mach-s3c64xx/gpiolib.c |2 +-
arch/arm/mach-s3c64xx/setup-fb-24bpp.c |2 +-
arch/ar
On 25/07/10 17:41, Vasily Khoruzhick wrote:
> This patch adds gpiolib support for h1940 latch.
> With this patch it's possible to use leds-gpio and uda1380
> drivers (they require gpiolib support for appropriate pins).
> And now it's possible to drop leds-h1940 driver.
I'm reasonably happy with th
On 30/07/10 01:22, Kyungmin Park wrote:
> On Thu, Jul 29, 2010 at 6:42 PM, Kukjin Kim wrote:
>> From: Naveen Krishna Ch
>>
>> This patch adds HAVE_S3C2410_I2C to control inclusion of I2C bus driver
>> on Samsung SoCs and makes I2C bus driver dependency SoC specific instead
>> of machine specific.
On Wed, Aug 4, 2010 at 8:17 PM, Kukjin Kim wrote:
> MyungJoo Ham wrote:
>>
>> The CPUFREQ driver requires an access to DMCx registers. We
>> define physical addresses and mapping between physical and virtual
>> addresses of DMCx registers.
>>
>> Signed-off-by: MyungJoo Ham
>> Signed-off-by:
MyungJoo Ham wrote:
>
> S5PV210 CPUFREQ Support.
>
> This CPUFREQ may work without PMIC's DVS support. However, it is not
> as effective without DVS support as supposed. AVS is not supported in
> this version.
>
> Note that CLK_SRC of some clocks including ARMCLK, G3D, G2D, MFC,
> and ONEDRAM ar
MyungJoo Ham wrote:
>
> Previously, most of CLK_DIV/SRC register accessing mask and shift
> values were used at arch/arm/mach-s5pv210/clock.c only; thus we
> had not been using macros for these. However, as CPUFREQ uses
> those shift and mask values as well, we'd better define them at a single
> l
MyungJoo Ham wrote:
>
> Early products of S5PV210, EVT0, had several errata that require
> kernel to avoid using some parts/instructions of the CPU or to
> add protection instructions. There are products with such early
> production CPUs; thus, we want to distinguish them in kernel.
> This patch i
MyungJoo Ham wrote:
>
> The CPUFREQ driver requires an access to DMCx registers. We
> define physical addresses and mapping between physical and virtual
> addresses of DMCx registers.
>
> Signed-off-by: MyungJoo Ham
> Signed-off-by: Kyungmin Park
> ---
> arch/arm/mach-s5pv210/cpu.c
Marek Szyprowski wrote:
>
> This patch add support for SDHCI blocks on Samsung Goni board. The
> following host controllers are defined:
> 1. Internal MoviNAND device (permanently wired to the controller)
> 2. Internal WiFI SDIO device (card is activated by power regualor)
> 3. External MMC/SD soc
Marek Szyprowski wrote:
>
> This patch add support for SDHCI blocks on Samsung Aquila board. The
> following host controllers are defined:
> 1. Internal MoviNAND device (permanently wired to the controller)
> 2. Internal WiFI SDIO device (card is activated by power regualor)
> 3. External MMC/SD s
Marek Szyprowski wrote:
>
> From: Sylwester Nawrocki
>
> FIMC (CAMIF) device is a camera interface embedded in S3C/S5P Samsung
> SOC series. It supports ITU-R BT.601/656 and MIPI-CSI2 standards,
> memory to memory operations, color conversion, resizing and rotation.
>
> Signed-off-by: Sylwester
On Wed, Aug 04, 2010 at 03:16:51PM +0900, Chanwoo Choi wrote:
> Mark Brown wrote:
> > OK, good - the fact that the connection wasn't being made with the PMIC
> > was my main point here.
> Did you read writed mail about consumer supply of WM8994 by MyungJoo Ham?
I saw it, yes.
> He is in charge
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