Hi Tomasz,
On Wed, Oct 03, 2012 at 01:20:00PM +0200, Tomasz Figa wrote:
On modern platforms using device tree and non-legacy IRQ domains there
is usually no way to perform direct translation between GPIO and IRQ,
because the IRQ of interest is not mapped yet into sparse IRQ namespace.
This
On Wednesday, Oct 03, 2012 at 8:47 AM, Thomas Abraham wrote:
Subject: [alsa-devel] [PATCH] ASoC: SAMSUNG: i2s: use clk_prepare_enable and
clk_disable_unprepare
Convert clk_enable/clk_disable to clk_prepare_enable/clk_disable_unprepare
calls as required by common clock framework.
On Wednesday, Oct 03, 2012 at 8:46 AM, Thomas Abraham wrote:
Subject: [alsa-devel] [PATCH] ASoC: SAMSUNG: ac97: use clk_prepare_enable and
clk_disable_unprepare
Convert clk_enable/clk_disable to clk_prepare_enable/clk_disable_unprepare
calls as required by common clock framework.
On Wednesday, Oct 03, 2012 at 8:47 AM, Thomas Abraham wrote:
Subject: [alsa-devel] [PATCH] ASoC: SAMSUNG: pcm: use clk_prepare_enable and
clk_disable_unprepare
Convert clk_enable/clk_disable to clk_prepare_enable/clk_disable_unprepare
calls as required by common clock framework.
On Wednesday, Oct 03, 2012 at 8:48 AM, Thomas Abraham wrote:
Subject: [alsa-devel] [PATCH] ASoC: SAMSUNG: spdif: use clk_prepare_enable and
clk_disable_unprepare
Convert clk_enable/clk_disable to clk_prepare_enable/clk_disable_unprepare
calls as required by common clock framework.
Remove I2S0 clk from peril since peril clock doesn't have I2S0 clk for EXYNOS4.
Audio Subsystem block has I2S0 clk.
Signed-off-by: Sangsu Park sangsu4u.p...@samsung.com
---
arch/arm/mach-exynos/clock-exynos4.c |5 -
1 file changed, 5 deletions(-)
diff --git
On 10/04/2012 05:17 PM, Florian Fainelli :
Merge ohci_finish_controller_resume with ohci_resume as suggested by Alan
Stern. Since ohci_finish_controller_resume no longer exists, update the
various OHCI drivers to call ohci_resume() instead. Some drivers used to set
themselves the bit
Hi Dmitry,
On Thursday 04 of October 2012 23:23:15 Dmitry Torokhov wrote:
Hi Tomasz,
On Wed, Oct 03, 2012 at 01:20:00PM +0200, Tomasz Figa wrote:
On modern platforms using device tree and non-legacy IRQ domains there
is usually no way to perform direct translation between GPIO and IRQ,
Based on for-next branch of linux-samsung.
Vivek Gautam (2):
ARM: Exynos5250: Enabling ehci-s5p driver
ARM: Exynos5250: Enabling ohci-exynos driver
.../devicetree/bindings/usb/exynos-usb.txt | 40
arch/arm/boot/dts/exynos5250-smdk5250.dts |4 ++
Adding EHCI device tree node for Exynos5250 along with
the device base adress and gpio line for vbus.
Signed-off-by: Vivek Gautam gautam.vi...@samsung.com
---
.../devicetree/bindings/usb/exynos-usb.txt | 25
arch/arm/boot/dts/exynos5250-smdk5250.dts |4
Adding OHCI device tree node for Exynos5250 along with
the device base address.
Signed-off-by: Vivek Gautam gautam.vi...@samsung.com
---
.../devicetree/bindings/usb/exynos-usb.txt | 15 +++
arch/arm/boot/dts/exynos5250.dtsi |6 ++
The first 2 patches of this series fix memory leaks because the memory
allocated for peripheral channels and DMA descriptors were not getting
freed.
The last 2 patches balance the module's remove function.
This series depends on 61c6e7531d3b66b3 DMA: PL330: Check the
pointer returned by
Since peripheral channel resources are not being allocated at probe,
no need to flush the channels and free the resources in remove function.
In case, the channel is in use by some client, return EBUSY.
Signed-off-by: Inderpal Singh inderpal.si...@linaro.org
---
drivers/dma/pl330.c | 13
unregister dma_device in module's remove function.
Signed-off-by: Inderpal Singh inderpal.si...@linaro.org
---
drivers/dma/pl330.c |2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/dma/pl330.c b/drivers/dma/pl330.c
index 4b7a34d..e7dc040 100644
--- a/drivers/dma/pl330.c
+++
The allocated memory for peripheral channels is not being freed upon
failure in probe and in module's remove funtion. It will lead to memory
leakage. Hence free the allocated memory.
Signed-off-by: Inderpal Singh inderpal.si...@linaro.org
---
drivers/dma/pl330.c |5 -
1 file changed, 4
In probe, memory for multiple DMA descriptors were being allocated at once
and then it was being split and added into DMA pool one by one. The address
of this memory allocation is not being saved anywhere. To free this memory,
the address is required. Initially the first node of the pool will be
EXYNOS5_USB_CFG macro should actually point to USB20PHY_CFG
system register (base addr + 0x230). It's wrongly placed in regs-pmu.
Actual register at offset 0x230 in PMU is SEQ_TRANSITION4.
Signed-off-by: Vivek Gautam gautam.vi...@samsung.com
---
arch/arm/mach-exynos/include/mach/regs-pmu.h |
There is a subtle difference between dma_transfer_direction and
dma_data_direction: the former is used by the dmaengine framework,
while the latter is used by the dma-mapping API. Although the
purpose is comparable, the actual values are different and must
not be mixed. In this case, the driver
Hello,
On 10/01/2012 02:09 PM, chander.kash...@linaro.org wrote:
From: Thomas Abrahamthomas.abra...@linaro.org
Register clocks for Exynos4 platfotms using common clock framework.
Also included are set of helper functions for clock registration
that can be reused on other Samsung platforms
Merge ohci_finish_controller_resume with ohci_resume as suggested by Alan
Stern. Since ohci_finish_controller_resume no longer exists, update the
various OHCI drivers to call ohci_resume() instead. Some drivers used to set
themselves the bit HCD_FLAG_HW_ACCESSIBLE, which is now handled by
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