Kukjin Kim wrote:
Re-sending due to e-mail client problem :(
Padma Venkat wrote:
Hi,
On Wed, Dec 19, 2012 at 10:39 PM, Mark Brown
broo...@opensource.wolfsonmicro.com wrote:
On Wed, Dec 19, 2012 at 01:24:14PM +, Grant Likely wrote:
On Thu, 13 Dec 2012 16:12:53 +0530,
Kukjin Kim wrote:
Re-sending due to e-mail client problem...
Doug Anderson wrote:
On Fri, Dec 21, 2012 at 12:14 AM, Vivek Gautam
gautamvivek1...@gmail.com wrote:
On Wed, Dec 19, 2012 at 7:16 PM, Vivek Gautam
gautamvivek1...@gmail.com wrote:
On Sat, Dec 15, 2012 at 12:50 PM,
Hi,
On Sat, Dec 22, 2012 at 12:32 AM, Kukjin Kim kgene@samsung.com wrote:
Padma Venkat wrote:
Hi,
On Wed, Dec 19, 2012 at 10:39 PM, Mark Brown
broo...@opensource.wolfsonmicro.com wrote:
On Wed, Dec 19, 2012 at 01:24:14PM +, Grant Likely wrote:
On Thu, 13 Dec 2012 16:12:53 +0530,
Hi Choi,
The method Save/restore clock source register - CLK_SRC_TOP3 was
suggested as well as preferred by our hardware team.
Would it be possible to give more information on this alternate method ?
On Fri, Dec 21, 2012 at 7:07 AM, jonghwan Choi jhbird.c...@gmail.com wrote:
Hi~
This code
Hi tomasz,
On Fri, Dec 21, 2012 at 2:36 AM, tomasz.f...@gmail.com wrote:
Hi Prasanna,
On Thursday 20 of December 2012 17:56:18 Prasanna Kumar wrote:
This patch adds a software workaround to the hardware
problem found in exynos5 while powergating.
It is observed that CLK_TOP_SRC3 register
Hi Choi,
On Mon, Dec 24, 2012 at 9:56 AM, Prasanna Kumar
prasannapadubi...@gmail.com wrote:
Hi Choi,
The method Save/restore clock source register - CLK_SRC_TOP3 was
suggested as well as preferred by our hardware team.
Would it be possible to give more information on this alternate method