This patch series contains a couple of fixes in cpuidle/PM due to
1) clock migration in driver folder.
2) exynos5440 platform which does not support cpuidle C1 state.
3) Compilations error when generic PM options are enabled.
All these patches are based on Samsung maintainer's for-next tree.
Now with common clock support added for exynos5250 it is necessary to move
this code to exynos5250 common clock driver as clock registers should be
handled there. This change is tested in exynos5250 based arndale platform.
Cc: Abhilash Kesavan a.kesa...@samsung.com
Cc: Thomas Abraham
This patch enables the selection of samsung pm related stuffs
when SAMSUNG_PM config is enabled and not just when generic PM
config is enabled. Power management for s3c64XX and s3c24XX
is enabled by default and for other platform depends on S5P_PM.
This patch also fixes the following compilation
This patch registers the basic C0 state for all exynos SOC's but
limits the C1(AFTR -Arm off top running) state in only the supported
SOC's(ie. EXYNOS 4210, 4212, 4412 and 5250).
Signed-off-by: Amit Daniel Kachhap amit.dan...@samsung.com
---
arch/arm/mach-exynos/cpuidle.c |4 +++-
1 files
Changes from v6:
- Changing the file names accordingly as per
[PATCH] usb: phy: rename all phy drivers to phy-$name.c
- Using devm_clk_get for PHY ref clocks ext_xtal and xusbxti
- Adding the bindings documentation for separate USB 2.0 phy and
USB 3.0 phy.
Based on 'usb-next' plus
Moving register and structure definitions to header file,
and keeping the generic functions to be used across
multiple PHYs in common phy helper driver under SAMSUNG_USBPHY,
and moving USB 2.0 PHY driver under SAMSUNG_USB2PHY.
Also allowing samsung PHY drivers be built as modules.
Signed-off-by:
Adding PHY driver support for USB 3.0 controller for Samsung's
SoCs.
Signed-off-by: Vivek Gautam gautam.vi...@samsung.com
Signed-off-by: Felipe Balbi ba...@ti.com
Acked-by: Kukjin Kim kgene@samsung.com
---
.../devicetree/bindings/usb/samsung-usbphy.txt | 54 +++
drivers/usb/phy/Kconfig
Used of_platform_populate() to create dwc3 core platform_device
from device tree data. Additionally some cleanup is also done.
Signed-off-by: Vivek Gautam gautam.vi...@samsung.com
CC: Felipe Balbi ba...@ti.com
CC: Kukjin Kim kgene@samsung.com
---
drivers/usb/dwc3/dwc3-exynos.c | 46
Hi,
On Thu, Mar 14, 2013 at 04:14:57PM +0530, Vivek Gautam wrote:
@@ -170,7 +155,6 @@ static int dwc3_exynos_remove(struct platform_device
*pdev)
{
struct dwc3_exynos *exynos = platform_get_drvdata(pdev);
- platform_device_unregister(exynos-dwc3);
don't you want to do
Hi,
On Thu, Mar 14, 2013 at 04:14:58PM +0530, Vivek Gautam wrote:
Convert clk_enable/clk_disable to clk_prepare_enable/clk_disable_unprepare
calls as required by common clock framework.
Signed-off-by: Vivek Gautam gautam.vi...@samsung.com
CC: Felipe Balbi ba...@ti.com
CC: Kukjin Kim
On 14.03.2013, at 05:19, Thomas Abraham wrote:
On 14 March 2013 05:29, Alexander Graf ag...@suse.de wrote:
On my Exynos 5 based Arndale system, I need to pull the reset line down
and then let it go up again to actually perform a reset. Without that
reset, I can't find any USB hubs on my bus,
On 14.03.2013, at 04:38, Doug Anderson wrote:
Alexander,
On Wed, Mar 13, 2013 at 4:59 PM, Alexander Graf ag...@suse.de wrote:
On my Exynos 5 based Arndale system, I need to pull the reset line down
and then let it go up again to actually perform a reset. Without that
reset, I can't find
On Thu, Mar 14, 2013 at 4:21 PM, Felipe Balbi ba...@ti.com wrote:
Hi,
On Thu, Mar 14, 2013 at 04:14:57PM +0530, Vivek Gautam wrote:
@@ -170,7 +155,6 @@ static int dwc3_exynos_remove(struct platform_device
*pdev)
{
struct dwc3_exynos *exynos = platform_get_drvdata(pdev);
-
Used of_platform_populate() to create dwc3 core platform_device
from device tree data. Additionally some cleanup is also done.
Signed-off-by: Vivek Gautam gautam.vi...@samsung.com
CC: Felipe Balbi ba...@ti.com
CC: Kukjin Kim kgene@samsung.com
---
Changes from v1:
- Added method to
On 14 March 2013 17:31, Alexander Graf ag...@suse.de wrote:
On 14.03.2013, at 05:19, Thomas Abraham wrote:
On 14 March 2013 05:29, Alexander Graf ag...@suse.de wrote:
On my Exynos 5 based Arndale system, I need to pull the reset line down
and then let it go up again to actually perform a
Hi,
On Thu, Mar 14, 2013 at 7:58 AM, Thomas Abraham
thomas.abra...@linaro.org wrote:
I can see your point, but as I mentioned earlier there seems to be some
timing issue here. By simply doing the reset a few ms earlier (in the first
probe, before the driver detects that it needs to defer
On 14.03.2013, at 15:58, Thomas Abraham wrote:
On 14 March 2013 17:31, Alexander Graf ag...@suse.de wrote:
On 14.03.2013, at 05:19, Thomas Abraham wrote:
On 14 March 2013 05:29, Alexander Graf ag...@suse.de wrote:
On my Exynos 5 based Arndale system, I need to pull the reset line down
Hello.
On 14-03-2013 4:59, Alexander Graf wrote:
When running on an exynos 5250 SoC, we don't initialize the architected
timers. The chip however supports architected timers.
When we don't initialize them, KVM will try to access them and run into
NULL pointer dereferences attempting to do
On Wednesday 13 March 2013, Kukjin Kim wrote:
Here is Samsung fixes for v3.9.
Please pull from:
git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung.git
v3.9-samsung-fixes-1
There are two commits for fix pl330 dma clkdev entries on s5pv210 and generic
dma binding support on
Hi,
On 13 March 2013 20:09, Rob Herring robherri...@gmail.com wrote:
The subject is completely misleading. Make it clear what the scope of
this patch is.
On 03/13/2013 06:26 AM, Vikas Sajjan wrote:
The FIMD driver expects the vsync interrupt to be mentioned as the 1st
parameter in the FIMD
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