Hi,
On Monday 18 of March 2013 22:31:49 Tomasz Figa wrote:
This series makes necessary preparations to add support for pin
controller available on Samsung S3C64xx using pinctrl-samsung driver
and then adds pinctrl-s3c64xx driver which implements SoC-specific part
of the code.
It has been
Leela Krishna Amudala wrote:
Add gate clocks for fimd, mie, dsim, dp, mixer and hdmi.
Register it to common clock framework.
Signed-off-by: Leela Krishna Amudala l.kris...@samsung.com
---
Documentation/devicetree/bindings/clock/exynos5250-clock.txt | 6 ++
Leela Krishna Amudala wrote:
This patch series adds support for FIMD DT for Exynos5 DT Machines
Adds display timing node for smdk5250 board.
changes since V3:
- changed the clock names sclk_fimd1 and fimd1 to sclk_fimd
and fimd
in the exynos5250.dtsi file
changes since
Arnd Bergmann wrote:
On Tuesday 26 March 2013, Heiko Stübner wrote:
This v6 addresses more comments from Arnd Bergmann, setting the
compatible
property to the first supported SoC (s3c2410) instead of using the
s3c24xx
wildcard. It also switches the parent-irq and controller irq in the
Rob Herring wrote:
On 03/26/2013 05:10 PM, Heiko Stübner wrote:
Add the necessary code to initialize the interrupt controller
thru devicetree data using the irqchip infrastructure.
Signed-off-by: Heiko Stuebner he...@sntech.de
Acked-by: Rob Herring rob.herr...@calxeda.com
Rob,
Arndale board support has been updated using pin-control and
common clock framework.
The patchset is based on Kukjin's for-next.
commit d58f6a153f40 (Merge branch 'next/clk-exynos-2' into for-next)
It depends on following patchset.
[PATCH 0/2] ARM: dts: Add default pin states for client nodes
Signed-off-by: Tushar Behera tushar.beh...@linaro.org
---
This is a new patch in the patch-set.
arch/arm/boot/dts/exynos5250-arndale.dts | 13 -
1 file changed, 4 insertions(+), 9 deletions(-)
diff --git a/arch/arm/boot/dts/exynos5250-arndale.dts
Added GPIO buttons DT node to Arndale board file.
Signed-off-by: Tushar Behera tushar.beh...@linaro.org
Signed-off-by: Sachin Kamat sachin.ka...@linaro.org
---
Changes for V3:
* Removed redundant #address-cells and #size-cells
* Pin-control related modifications.
From: Amit Daniel Kachhap amit.dan...@samsung.com
Added S5M8767 PMIC DT nodes for Arndale board. Only the used
LDO's/BUCK are defined here. Also the nodes describe the default/reset
state LDO's and no power mangement tuning is implemented. The usage
desription can be found in s5m8767 device tree
From: Sachin Kamat sachin.ka...@linaro.org
Added vmmc regulator node to Arndale DT file.
Signed-off-by: Sachin Kamat sachin.ka...@linaro.org
Signed-off-by: Tushar Behera tushar.beh...@linaro.org
---
Changes for V3:
* Pin-control related modifications.
arch/arm/boot/dts/exynos5250-arndale.dts |
From: Sachin Kamat sachin.ka...@linaro.org
This is required to keep the existing functionality of having no
write protect pin on Arndale board.
Signed-off-by: Sachin Kamat sachin.ka...@linaro.org
Signed-off-by: Tushar Behera tushar.beh...@linaro.org
---
This is a new patch in the patchset.
From: Sachin Kamat sachin.ka...@linaro.org
Added MFC codec node to Arndale DT file.
Signed-off-by: Sachin Kamat sachin.ka...@linaro.org
---
No changes for V3
arch/arm/boot/dts/exynos5250-arndale.dts |5 +
1 file changed, 5 insertions(+)
diff --git
From: Sachin Kamat sachin.ka...@linaro.org
Added HDMI hot plug and regulator nodes to Arndale DT file.
Signed-off-by: Sachin Kamat sachin.ka...@linaro.org
Signed-off-by: Tushar Behera tushar.beh...@linaro.org
---
Changes for V3:
* Pin-control related modifications.
On Mon, Apr 01, 2013 at 07:24:00PM +0530, Vivek Gautam wrote:
Adding APIs to handle runtime power management on PHY
devices. PHY consumers may need to wake-up/suspend PHYs
when they work across autosuspend.
Signed-off-by: Vivek Gautam gautam.vi...@samsung.com
---
include/linux/usb/phy.h
Ping !!!
On 03/08/2013 04:39 PM, Tushar Behera wrote:
As per commit b3377d186572 (ARM: 7064/1: vexpress: Use wfi macro
in platform_do_lowpower.), wfi macro should be used instead
of the hardcoded WFI instruction.
This fixes following oops when the kernel is compiled in Thumb-2 mode
on
Tomasz Figa wrote:
On Saturday 30 of March 2013 15:33:00 Thomas Abraham wrote:
Hi Tomasz,
On 27 March 2013 16:32, Tomasz Figa t.f...@samsung.com wrote:
This series is a collection of various fixes and extensions to Exynos4
clock driver, which improve coverage of clocks present on
Hi,
On Mon, Apr 01, 2013 at 07:24:03PM +0530, Vivek Gautam wrote:
+#else
+#define dwc3_runtime_suspend NULL
+#define dwc3_runtime_resume NULL
this #else branch is unnecessary. Look at the definition for
SET_RUNTIME_PM_OPS()
--
balbi
signature.asc
Description: Digital
On Mon, Apr 01, 2013 at 07:24:04PM +0530, Vivek Gautam wrote:
Enabling runtime power management on dwc3-exynos
letting dwc3 controller to be autosuspended on exynos
platform when not in use.
Signed-off-by: Vivek Gautam gautam.vi...@samsung.com
---
drivers/usb/dwc3/dwc3-exynos.c | 12
Mark Brown wrote:
From: Charles Keepax ckee...@opensource.wolfsonmicro.com
This patch clears the DMA flags when a DMA channel is requested. This is
necessary because otherwise the channel may inherit incompatible
settings from its last usage.
Signed-off-by: Charles Keepax
Mark Brown wrote:
From: Charles Keepax ckee...@opensource.wolfsonmicro.com
A slightly slower rate provides more reliable jack detection during
slower insertions.
Signed-off-by: Charles Keepax ckee...@opensource.wolfsonmicro.com
Signed-off-by: Mark Brown
Sylwester Nawrocki wrote:
This patch adds device tree node for the SYSREG registers block
found in Samsung S5P/Exynos SoC series. The SYSREG module
generates control signals for the ARM CPU and various IP blocks
and buses. SYSREG block registers are exposed through APB bus
interface. A
Paul Bolle wrote:
Commit ebc433c2890f8ecad2da39fe2dbf2b6e7b309afa (ARM: S5P64X0: Add
HSMMC setup for host Controller) added the Kconfig symbol
S5P64X0_SETUP_SDHCI_GPIO. By accident it also used a macro
CONFIG_S5P64X0_SETUP_SDHCI. Fix that typo.
Signed-off-by: Paul Bolle pebo...@tiscali.nl
Paul Bolle wrote:
s3c_rtc_setname() tests for CONFIG_SAMSUNG_DEV_RTC or
CONFIG_PLAT_S3C24XX. But of these two macros only CONFIG_PLAT_S3C24XX
actually exists. Now we can see that s3c_device_rtc is only defined if
either CONFIG_PLAT_S3C24XX or CONFIG_S3C_DEV_RTC are defined. So,
apparently,
On 03/25/2013 12:01 PM, Kukjin Kim wrote:
Hi all,
As we discussed before, it's time to decide to support non-DT for EXYNOS
SoCs.
If everybody else agrees to drop non-DT support from v3.10, I will. Feel
free to talk your opinion about that.
I'm fine with supporting Exynos as dt-only from
Amit Daniel Kachhap wrote:
This patchset adds TMU(Thermal management Unit) driver support for
exynos5440 platform. There are 3 instances of the TMU controllers so
necessary cleanup is done to handle multiple thermal zone.
Patch 1 [thermal: exynos: Adapt to temperature emulation core
Hi,
On Tue, Apr 2, 2013 at 1:53 PM, Felipe Balbi ba...@ti.com wrote:
On Mon, Apr 01, 2013 at 07:24:00PM +0530, Vivek Gautam wrote:
Adding APIs to handle runtime power management on PHY
devices. PHY consumers may need to wake-up/suspend PHYs
when they work across autosuspend.
Giridhar Maruthy wrote:
Exynos5440 has GIC which has virtualization support
in them. These are used by KVM.
Signed-off-by: Giridhar Maruthy giridha...@samsung.com
---
arch/arm/boot/dts/exynos5440.dtsi |6 +-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git
Alexander Graf wrote:
When running on an exynos 5250 SoC, we don't initialize the architected
timers. The chip however supports architected timers.
Yes, exynos5250 can support, mct(multi core timer) is used though.
When we don't initialize them, KVM will try to access them and run into
This patch register the dma controller with generic dma helpers only
in DT case. This also adds some extra error handling in the driver.
Signed-off-by: Padmavathi Venna padm...@samsung.com
Reported-by: Sachin Kamat sachin.ka...@linaro.org
---
Based on Vinod Koul next branch.
Changes since V2:
From: Prathyush K prathyus...@samsung.com
This patch fixes a possible crash in case drvdata for the secondary
device is not set.
Signed-off-by: Prathyush K prathyus...@samsung.com
Signed-off-by: Padmavathi Venna padm...@samsung.com
---
Based on Kukjin for-next branch
sound/soc/samsung/i2s.c |
This patch removes the usage of DMACH_DT_PROP and dt_dmach_prop
from dma code as the new generic dma dt binding support has been
added.
Signed-off-by: Padmavathi Venna padm...@samsung.com
Acked-by: Arnd Bergmann a...@arndb.de
---
arch/arm/mach-s3c24xx/include/mach/dma.h |1 -
On 04/02/2013 12:44 PM, Kukjin Kim wrote:
Alexander Graf wrote:
When running on an exynos 5250 SoC, we don't initialize the architected
timers. The chip however supports architected timers.
Yes, exynos5250 can support, mct(multi core timer) is used though.
When we don't initialize them, KVM
2013/4/1 Ning Jiang ning.n.ji...@gmail.com:
2013/4/1 Daniel Lezcano daniel.lezc...@linaro.org:
On 03/29/2013 10:24 AM, ning.n.ji...@gmail.com wrote:
From: Ning Jiang ning.n.ji...@gmail.com
Currently there are two problems when we try to stop local timer.
First, it calls set_mode function
This patchset support device_prep_dma_sg functionality for pl330 dmaengine
driver. The prep_dma_sg function prepares descriptors to transfer between src
and dest memory which consists of scatter/gather list. The patchset contains
code clean-up to eliminate duplications.
Chanho Park (2):
dma:
This patch adds __pl330_giveback_descs which give back descriptors when fails
allocating descriptors. It requires to eliminate duplication for
pl330_prep_dma_sg which will be added later.
Signed-off-by: Chanho Park chanho61.p...@samsung.com
Signed-off-by: Myungjoo Ham myungjoo@samsung.com
This patch adds prep_dma_sg function to transfer memory to memory which mapped
in scatter/gather list. The patch move get_burst_len to upwards to call in the
__pl330_prep_dma_mecpy. Some duplicated code was splitted off from
prep_dma_memcpy.
Signed-off-by: Chanho Park chanho61.p...@samsung.com
Hi,
On Tue, Apr 02, 2013 at 04:04:01PM +0530, Vivek Gautam wrote:
On Mon, Apr 01, 2013 at 07:24:00PM +0530, Vivek Gautam wrote:
Adding APIs to handle runtime power management on PHY
devices. PHY consumers may need to wake-up/suspend PHYs
when they work across autosuspend.
Hi,
On Tue, Apr 2, 2013 at 5:40 PM, Felipe Balbi ba...@ti.com wrote:
Hi,
On Tue, Apr 02, 2013 at 04:04:01PM +0530, Vivek Gautam wrote:
On Mon, Apr 01, 2013 at 07:24:00PM +0530, Vivek Gautam wrote:
Adding APIs to handle runtime power management on PHY
devices. PHY consumers may need to
On 03/05/2013 06:42 PM, Arnd Bergmann wrote:
In multiplatform configurations, we cannot include headers
provided by only the exynos platform. Fortunately a number
of drivers that include those headers do not actually need
them, so we can just remove the inclusions.
Signed-off-by: Arnd
Currently the whole driver depends on MFD_SYSCON, which in turn
depends on OF. To allow to use the driver on non-dt platforms
(S5PV210) the SYSREG support is made conditional (it is needed
only for dt enabled platforms) and MFD_SYSCON is selected if
OF is enabled, instead of depending on OF.
The 'camera' DT node needs to have sclk_cam0/1 and pxl_async0/1 clocks
specified, while 'fimc' nodes should have only fimc and sclk_fimc.
mux and parent are leftovers from early versions of patches adding
DT support, when the IP bus clock parent clock was being set by the
driver. A better solution
Thomas,
On Mon, Apr 1, 2013 at 11:09 PM, Thomas Abraham
thomas.abra...@linaro.org wrote:
With device core now able to setup the default pin configuration,
the pin configuration code based on the deprecated Samsung specific
gpio bindings is removed.
Signed-off-by: Thomas Abraham
This iteration includes mostly headers inclusion and comments cleanup,
minor DT binding documentation update and added missing cleanup steps
at the I2C bus driver. Detailed changes are listed at individual
patches.
Below is a full cover letter of v3. If there is no more comments
I would send a
This patch adds the ISP I2C bus controller driver files.
Creating a standard I2C bus adapter, even if the driver doesn't
actually communicates with the hardware and it is instead used
by the ISP firmware running on the Cortex-A5, allows to use
standard hardware description in the device tree. As
This patch adds ISP processing parameters interface files.
Signed-off-by: Younghwan Joo yhwan@samsung.com
Signed-off-by: Sylwester Nawrocki s.nawro...@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
---
Changes since v3:
- dropped unused headers,
- removed get_is_cfg()
This patch adds a common image sensor driver and Makefile/Kconfig
to enable cpmpilation of the whole IS drives.
The sensor subdev driver currently only handles an image sensor's
power supplies and reset signal. There is no an I2C communication
as it is handled by the ISP's firmware.
This patch adds DT binding documentaton for the Imaging Subsystem
(camera ISP) found on Samsung Exynos4x12 SoCs.
Signed-off-by: Sylwester Nawrocki s.nawro...@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
---
Changes since v3:
- specified order of the interrupts,
- added a
Create disabled links from the FIMC-LITE subdevs to the FIMC-IS-ISP
subdev and from FIMC-IS-ISP to all FIMC subdevs.
Signed-off-by: Sylwester Nawrocki s.nawro...@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
---
drivers/media/platform/exynos4-is/media-dev.c | 79
On Tue, Apr 02, 2013 at 04:46:45PM +0530, Padmavathi Venna wrote:
This patch register the dma controller with generic dma helpers only
in DT case. This also adds some extra error handling in the driver.
Signed-off-by: Padmavathi Venna padm...@samsung.com
Reported-by: Sachin Kamat
Am Dienstag, 5. März 2013, 18:42:17 schrieb Arnd Bergmann:
No other file in the kernel besides i2c-s3c2410.c uses
the current plat/regs-iic.h, so we can simply move the
header file to live in the same directory as the driver,
as a preparation to multiplatform builds.
A patch doing the same is
Doug Anderson wrote:
to make suspend/resume reliable on the ARM Chromebook
(exynos5250-snow).
A few more details:
- The first patch is not strictly needed but was a nice cleanup. Our
understanding was that EINT0 was originally turned on for exynos
evt0 silicon and not needed for
Kukjin Kim wrote:
Doug Anderson wrote:
to make suspend/resume reliable on the ARM Chromebook
(exynos5250-snow).
A few more details:
- The first patch is not strictly needed but was a nice cleanup. Our
understanding was that EINT0 was originally turned on for exynos
evt0
Alexander Graf wrote:
On 04/02/2013 12:44 PM, Kukjin Kim wrote:
Alexander Graf wrote:
When running on an exynos 5250 SoC, we don't initialize the architected
timers. The chip however supports architected timers.
Yes, exynos5250 can support, mct(multi core timer) is used though.
Hi Balbi,
On Tue, Apr 2, 2013 at 2:02 PM, Felipe Balbi ba...@ti.com wrote:
Hi,
On Mon, Apr 01, 2013 at 07:24:03PM +0530, Vivek Gautam wrote:
+#else
+#define dwc3_runtime_suspend NULL
+#define dwc3_runtime_resume NULL
this #else branch is unnecessary. Look at the
Hi,
On Monday 01 April 2013 07:24 PM, Vivek Gautam wrote:
Adding APIs to handle runtime power management on PHY
devices. PHY consumers may need to wake-up/suspend PHYs
when they work across autosuspend.
Signed-off-by: Vivek Gautam gautam.vi...@samsung.com
---
include/linux/usb/phy.h | 141
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